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Eduardo Montanez | Omar Cruz
NXP Powerhouse MCU Portfolio
September 2019 | Session #AMF-SMH-T3512
COMPANY PUBLIC 1COMPANY PUBLIC 1
• Broadest Arm-based MCU Portfolio
• Ease-of-Use Enablement
• Product Spotlights
• Summary
Agenda
COMPANY PUBLIC 2
Broadest Arm-based MCU
Portfolio
COMPANY PUBLIC 3
Technology
InsightsLearning from our 26,000+ end customers
across thousands of diverse applications
Expansive
EcosystemCommon software platform combined with
large partner network
Broad
PortfolioHigh-performance crossover processors to
Low-power secure and connected MCUs
PUBLIC
Industrial & IoT Microcontrollers
COMPANY PUBLIC 4
Commitment to MCU Innovation & Market Leadership
Source: IC Insights
First to license
Arm Core for
MCUs (2002)
First Arm®
Cortex®-M4-
based MCU
Introduce M0,
M0+ and 5V
World’s smallest
Arm-based
MCU at 1.6mmx
2mm
First Cortex-
M7 based MCU
targeting motor control
Launch of new
integrated TSI
solution
Introducing i.MX RT Series 1st
600MHz general purpose
MCU
1st to introduce flash-based M33 in 40nm
Sampling 1st
28nm FDSOI MCU
2010 2011-
20132014 2015 2016 2017 2018 2019
• Technology & IP
sharing to unify
roadmap
• Maximize
developer re-use
NXP+FSL
ranked #1 in
MCUs*
COMPANY PUBLIC 5
NXP’s Scalable Edge Computing ContinuumMarket need for differentiated platforms to address broad range of requirements
Functional Integration
Perf
orm
ance
Purpose-built, dedicated
SoC platforms
• Enhanced Embedded Security by Design
• Development Simplicity & Compatibility
i.MX RT Series
COMPANY PUBLIC 6
Look Ahead NXP’s Arm® Cortex®-M Portfolio EvolutionIntroducing i.MX RT for Ultimate Performance & Extensibility
• 600 MHz with advanced HMI and real-time control
• Highest Performance (3020 CoreMark/ 1284 DMIPs) ; Cortex-M7 M33
• From 128KB to 5MB SRAM with unlimited extensibility (Quad/Octal SPI flash)
Coming next
From $1 to 1GHz
• i.MX RT1010 <$1
• i.MX RT1170 1GHz
Available Q2 ‘19
• i.MXRT1060 1st AVS certified
MCU
Introducing LPC5500 for Unrivaled Compute Efficiency
• ≥ 100 MHz, Cortex-M33, TrustZone, & DSP acceleration
• enhanced security & accelerators
• Balance power & performance (150-500 DMIPs) Cortex-M33
Coming next
• Path to lower cost
• Increased MIPS
• More integration (Memory,
analog, graphic eng.,
CAN)
Available Q2 ‘19
• LPC55S6x, first Cortex-M33 to
market, based on cost &
performance efficient 40nm
technology
Introducing K32 L for Extended Battery Life
• < 100 MHz, fast wake-up, security, & high-precision analog
• Target low leakage across operating range (40-120 DMIPs) ; Cortex-M4 & M0+
• From 32KB to 1MB internal flash and 4-8:1 Flash to SRAM ratio
Coming next
• Path to lower cost with
scalable L2 family
based on Cortex-M0+
Available Q3 ‘19
• Introduced first L3 power
optimized, dual-core
superset
Introducing LPC800 for 8-bit Alternative
• ≤ 30 MHz with range of features & package options
• High power efficiency (10-50 DMIPs) Cortex-M0+
• From 8KB to 64KB internal flash and 4-8:1 Flash to SRAM ratio
Introducing KE/KV/KM & S32K for their Target markets
• KE: 5V/Robust/Touch/CAN
• KV: High Performance Control
• KM: Metering & Metrology
Performance &
Integration
Mainstream
Efficiency
Ultra-low
Power
Value
Vertical Focus
Coming next
• Looking at expansion
options for memory,
security and analog
Available Q2 ’19
• LPC84x, LPC82x, LPC81x,
LPC80x all MP
• Added WLCSP (LPC802 and
LPC804)
Coming next
• Increasing memory on KM
Available Q2 ‘19
• Introduced 32 – 64KB KE
version with CAN & Touch
• KE, KV, KM in many different
variants
COMPANY PUBLIC 7
Consumer
Smart watches
Headphones
Gaming Accessory
Home & Building
Automation
Thermostats
Door locks
Lighting
Industrial & Control Systems
Sensing
Agriculture
Building Control
HVAC
Motors, Drives, Power
Drones, UAVs
Industrial Robotics
Circuit breakers
Power Tools
Solar/Inverters
Home appliances
Cookers
Refrigerators
Washers & dryers
Small Appliance
Secure Transactions &
Access, Payment & Metering
Mobile POS reader
PIN pads
Scale with Online & Local Communities + Accessibility through Distribution/E-shop
Enabling Breadth of Industrial & IoT market applications General purpose MCUs + Domain Expertise + Support
COMPANY PUBLIC 8
Strength in Product Longevity
• NXP has a longstanding track record of providing long-term production support for our products
• NXP has a formal product longevity program for the market segments we serve
– For the automotive, medical segments and 99% of the Kinetis MCU portfolio, NXP will make a broad range of solutions available for a minimum of 15 years
– For all other market segments in which NXP participates, NXP will make a broad range of solutions available for a minimum of 10 years
– Life cycles begin at the time of launch
– Includes NXP’s standard end-of-life notification policy
• For a complete list of participating products, visit, nxp.com/productlongevity
COMPANY PUBLIC 9
Commitment to Product SupportOnline Technical Support Platform with 24/7 Access to Information & Expertise
Visit us https://nxp.com/MCU
https://community.nxp.com
COMPANY PUBLIC 10
NXP MCU Software and Enablement Overview
Connectivity Solutions
Evaluation Kits:
Comprehensive frameworks
and solutions for low-power,
connected, and secure
embedded systems
Runtime Software
Industry leading IDE support
and intuitive software
configuration tools to
accelerate application
development
Software
Development Tools
Low cost hardware platforms
for evaluation and application
development. Partner
solutions for hardware
debugging solutions
Hardware
Development Tools
Software frameworks and
development tools for targeted
applications and certified
connectivity solutions
Application Specific
Get started quickly and
get the support you
need, when you need it
Support
NXP Solutions: IDE / Toolchains:
• OOB Walkthroughs
• NXP Community
• Solution Designs
• Application Notes
• Schematics
RTOS, Middleware Partners:Partner Solutions
• Graphics• Cloud Connectivity• Voice activation• USB Audio• Touch HMI• Camera interface• ML/AI
802.15.4
Broad Market:
• Professional Support
• Professional Services
High Touch:
COMPANY PUBLIC 11
MCUXpresso SW and Tool Release Overview
• Dec 2018 Release:
SDK v2.5.0
• Support for current Kinetis, LPC,
i.MX RT, and i.MX (Cortex M)
devices
• New device support released
throughout year as required to
support device availability.
• Major semi-annual releases
include updated drivers,
middleware releases, and
improvements
• Comprised of three primary tools:
SDK, IDE,
and Config Tools
• Current release
Dec 2018
• Major releases targeted for
twice a year
(typically Q2 / Q4)
• Next major release date
scheduled for
Jun 2019
• Dec 2018 Release:
Config Tool v5.0
• Includes configuration for Pins,
Clocks, and Peripherals
• New device data and peripheral
support released throughout
year, tool will update when
connected online
• Major semi-annual releases
include new features, additional
peripheral support, and workflow
improvements
• Feb 2019 Release:
IDE v10.3.1
• Support for current Kinetis,
LPC, and i.MX RT devices
• Additional support for legacy
LPC devices
• Device support is included via
SDK releases.
• Major semi-annual releases
include updated eclipse
framework, compiler versions,
and performance
improvements
COMPANY PUBLIC 12
MCUXpresso Software and ToolsAdditional Resources
Web pages
• MCUXpresso Software and Tools – www.nxp.com/mcuxpresso
– MCUXpresso SDK: www.nxp.com/mcuxpresso/sdk
– MCUXpresso IDE: www.nxp.com/mcuxpresso/ide
– MCUXpresso Config Tools: www.nxp.com/mcuxpresso/config
Communities
• MCUXpresso Software and Tools – https://community.nxp.com/community/mcuxpresso
– MCUXpresso SDK: https://community.nxp.com/community/mcuxpresso/mcuxpresso-sdk
– MCUXpresso IDE: https://community.nxp.com/community/mcuxpresso/mcuxpresso-ide
– MCUXpresso Config Tools: https://community.nxp.com/community/mcuxpresso/mcuxpresso-config
Supported Devices
• Supported Devices Table (Community Doc)
COMPANY PUBLIC 13
Enabling the next wave of
Industrial & IoT applications
13
LPC5500
MCU Series
COMPANY PUBLIC 14
NXP’s LPC55S6x MCU Family
Single & Dual-core Arm Cortex-M33 MCU Series with TrustZone
and 40nm flash technology
• Ultra-efficient processing:
– As High as 755 CoreMarks1 and as low as 32uA/MHz2
– 10x improvement for signal processing & cryptography
• Numerous interfaces to sense, connect, control
• Enhanced safety and security
• MCUXpresso developer ecosystem
1: 2xCM33 @ 100MHz, 2: 1xCM33 @ 100MHz
COMPANY PUBLIC 15
Key Features and Comparisons
• Nearly 20% performance improvement over Cortex-M3 based MCUs
(over 60% vs Cortex-M0) with redesigned pipeline - up to two
instructions per clock cycle
• TrustZone for system-wide, secure resource isolation enabling
trusted runtime execution and physical protection in embedded MCU
applications
• Tightly coupled accelerators with coprocessor interface & extensions
(Arm’s single precision FPU along with NXP accelerators)
Cortex-M0+ Cortex-M23 Cortex-M3 Cortex-M4 Cortex-M33
DMIPS/MHz 0.95 0.98 1.25 1.25 1.50
CoreMark®/MHz 2.46 2.50 3.32 3.40 4.02
Prelim. Data from Arm for Cortex-M33 implementation at 40LP (9-track, typical 1.1v, 25°C)
NXP LPC5500 MCU Series
Industry’s ONLY Full ArmV8-M Implementation
COMPANY PUBLIC 16
NXP LPC5500 MCU Series
Leading Edge Performance Across Competing Solutions
• ’’Estimated by NXP
• ** source: http://www.eembc.org/coremark/index.php
0
1000
LPC55S6x STM32L5xx SAML11 STMF205xx'' STM32F405xx'' STM32L4xx
755**
100MHz†
32uA/MHz
84.54**
32MHz
25uA/MHz
557.76’’
168MHz
517uA/MHz
404.8**
120MHz
43uA/MHz
Coremark
Frequency
uA/MHz (Active)
427.25**
110MHz
60uA/MHz
398.4’’
120MHz
408uA/MHz
† Dual-core
Arm V8-M
Architecture
Cortex-M33
Cortex-M23
Cortex-M3
Cortex-M4
Core
Mark
s
COMPANY PUBLIC 17
HARDWARE PROTECTEDKEY STORE & DEVICE ID
SECURE BOOTMANAGER SECURE RUNTIME &
PHYSICAL PROTECTIONTRUSTZONE PROTECTED
RESOURCE ISOLATION PROTECTED DATAENCRYPTED FIRMWARE
SECURE DATAENCRYPTED COMMUNICATION
Ro
ot o
f T
rust
SECURE
DEBUGACCESS
CONTROL
Protecting end products from unexpected threats over their entire lifecycle
Expanding NXP’s MCUXpresso Software & Tools
• MCUXpresso Configuration Tools, now including TrustZone Configurator
• Flash programming command line tool (vcom/USB HID) including SRAM PUF key provisioning
(Blhost for Linux/Mac/Windows)
• Host-side command line/GUI tool to create and sign a secure flash image (elf2sb)
• Secure debug authentication & debug credential certificate generator tool
Third-Party Ecosystem to Reinforce Product Accessibility
• From Secure Product Development/Mastering/Provisioning to Programming/Deployment/Management
NXP LPC5500 MCU Series
NXP‘s Secure Execution Environment
COMPANY PUBLIC 18
LPC55S6x Product Block Diagram
ADC 16b 1MSPS
Arm Cortex-M33Up to 100 MHz
Secure DMA0Up to 22ch
SCTimer/PWM
RTC
5 x 32b Timers
Windowed WDTMulti-Rate Timer
Micro Timer
Clock Generation UnitOSCs, System PLL, USB PLL, Clock Out
Power ControlSingle Vdd power supply, POR, BOD,
reduced power modes – DCDC converter
AES-256FLASH
Up to 640KB
Programmable Logic Unit
6 input, 8 output
Arm Cortex-M33 Up to 100 MHz
TrustZone, MPU, FPU, SIMD
Core Platform
System Control
Secure DMA1Up to 10ch
Timers
Memory
RAMUp to 320KB
ROMBoot code
DSP
AcceleratorCrypto Engine
8 x FlexcommSupports UART, SPI, I2C, I2S
Interfaces
HS LSPI
HS USB + PHY
SDIO
FS USB + PHY
Analog
ACMP
Temp Sensor
Security
SHA-2
SRAM PUF PRINCE
RNG
PFR UID
Programmable Features
Secure Debug Auth.
Back to Roadmap
• High Efficiency
• Dual Core + Accelerators
• Advanced Security
• 10K RSL - $2.05- $2.69
Core Platform
• Up to 100MHz Cortex-M33
- TrustZone, MPU, FPU, SIMD
• Up to 100MHz Cortex-M33
• Coprocessors
- DSP Accelerator
- Crypto Engine
• Multilayer Bus Matrix
Memory
• Up to 640KB FLASH
• Up to 320KB RAM
• 128KB ROM
Timers
• 5 x 32b Timers
• SCTimer/PWM
• Muiti-Rate Timer
• Windowed Watchdog Timer
• RTC
• Micro Timer
Interfaces
• USB High-speed (H/D) w/ on-chip HS PHY
• USB Full-speed (H/D), Crystal-less
• SDIO, Support 2 cards
• 1 x High-Speed SPI up to 50MHz
• 8 x Flexcomms support up to 8x SPI, 8x I2C,
8x UART, 4x I2S channels (total 8 instances)
Advanced Security
• Protected Flash Region (PFR)
• AES-256 HW Encryption/Decryption
Engine
• SHA-2
• SRAM PUF for Key Generation
support
• PRINCE – Real-time
Encrypt/Decrypt for flash data
• Secure debug authentication
• RNG
Analog
• 2x 16b ADC, 16ch, 1MSPS
• Analog Comparator
• Temperature Sensor
Packages
• LQFP100, 14x14mm
• VFBGA98, 6x6mm
• LQFP64 or QFN64
Other
• Programmable Logic Unit
• Buck DC-DC
• Operating voltage: 1.8 to 3.6V
• Temperature range: -40 to 105 C
Subject to Change, NDA Required
COMPANY PUBLIC 19
LPC552x/S2x Product Overview
Subject to Change, NDA Required
• High Efficiency Cortex-M33
• Advanced Security
• Rich Integration
• 10K RSL - $1.63 - $2.21
ADC 16b 1MSPS
Arm Cortex-M33Up to 200 MHz
DMA0Up to 22ch
SCTimer/PWM
RTC
5 x 32b Timers
Windowed WDTMulti-Rate Timer
Micro Timer
Clock Generation UnitOSCs, System PLL, USB PLL, Clock Out
Power ControlSingle Vdd power supply, POR, BOD,
reduced power modes – DCDC converter
FLASHUp to 512KB
FPU, SIMD
Core Platform
System Control
DMA1Up to 10ch
Timers
Memory
RAMUp to 256KB
ROM (128KB)Boot code + USB driver
8 x FlexcommSupports UART, SPI, I2C, I2S
Interfaces
HS LSPI
HS USB + PHY(not on the smallest
device)
SDIO (not on the smallestt device)
FS USB + PHY
Analog
ACMP
Temp Sensor
Security
SRAM PUF PRINCE
eCRP RNG
PFR UID
Crypto Engine
Core Platform
• Up to 100MHz Cortex-M33
• Multilayer Bus Matrix
Memory
• Up to 512KB FLASH
• Up to 256KB RAM
• 128KB ROM
Timers
• 5 x 32b Timers
• SCTimer/PWM
• Muiti-Rate Timer
• Windowed Watchdog Timer
• RTC
• Micro Timer
Interfaces
• USB High-speed (H/D) w/ on-chip HS PHY
(not in the 128k version)
• USB Full-speed (H/D), Crystal-less
• SDIO, Support 2 cards (not in the 128k
version)
• 1 x High-Speed SPI up to 50MHz
• 8 x Flexcomms support up to 8x SPI, 8x
I2C, 8x UART, 4x I2S channels (total 8
instances)
Advanced Security
• Protected Flash Region (PFR)
• AES-256 HW Encryption/Decryption
Engine
• SHA-2
• SRAM PUF for Key Generation support
• PRINCE – Real-time Encrypt/Decrypt for
flash data
• Secure debug authentication
• RNG
Analog
• 16b ADC, 16ch, 1MSPS
• Analog Comparator
• Temperature Sensor
Packages
• LQFP100
• VFBGA98
• LQFP64
Other
• Buck DC-DC
• Operating voltage: 1.8 to 3.6V
• Temperature range: -40 to 105 C
COMPANY PUBLIC 20
NXP LPC5500 MCU Series
Roadmap
2018 2019 2020
COMMON PLATFORM ARCHITECTURE FOR COMPLETE SCALABILITY
AREA & PERFORMANCE EFFICIENT
100 MHz Cortex-M33
Up to 512KB Flash/256KB SRAM
SDIO
Security (‘S’ version)
Execution
Production
Proposal
Product
Samples
Planning
LPC55S6x
LPC55S1x/1x
100 MHz Cortex-M33
Up to 256KB Flash/96KB SRAM
Single CAN-FD
Trust Zone & Security (‘S’ version)
100 MHz Cortex-M33 (dual, PQ)
Up to 640KB Flash/320KB SRAM
SDIO
Trust Zone & Security (‘S’ version)
LPC55S2x/2x
Advanced
Efficiency &
Integration
Balanced
Entry
10Ku S/R is budgetary range; will vary for specific package/memory variants
Large Memory & Graphics
Analog & Motor Control
ArmCM7
ArmCM4
ArmCM33
ArmCM0+
COMPANY PUBLIC 21
NXP LPC5500 MCU Series
MCUXpresso Software & Tools EcosystemComplimentary with Extensive Support
Hardware Platform for Ease of Development
• On-board debug circuit
• PCB Layout, Schematic and Board Files Available
Simplify secure embedded development; Reduce time to market.
LPC5500 MCU Series
LPC55S69-EVK
COMPANY PUBLIC 22
NXP LPC5500 MCU Series
Highlights
Main Highlights of LPC5500
• World’s First General Purpose Cortex-M33 based MCU in the market Today
• Leading Performance Efficiency with 32uA/MHz in Active Mode
• PowerQuad DSP for math intensive functions
• Advanced security featuring TrustZone, SRAM PUF, real-time encryption/decryption, etc
• Pin and Software Compatibility across the LPC5500 MCU Series
• Robust Enablement with MCUXpresso Software & Tools
Start your Development Now! www.nxp.com/LPC55S69-EVK
COMPANY PUBLIC 23
Product Spotlight: i.MX RT Series
COMPANY PUBLIC 24
Ultra-low Power
Dynamic & Static
ARM v8/v8m + GPU/DSP
ARM v7/v7m + 2D/3D
ARM v7m + Audio
i.MX 6UL/ULL
i.MX 6DQ+
i.MX 8
i.MX 8M
i.MX 8X
i.MX RT
i.MX 7ULP
Scalability of Embedded Processing: The New Normal
COMPANY PUBLIC 25
• ARM Cortex-A class
and Cortex-M cores
• 600 MHz to 2 GHz performance
• Rich HMI experience
• Full open-source OS platforms
APPLICATIONS PROCESSORS
i.MX
MCUs
KINETIS & LPC
• ARM Cortex-M cores
• Performance
up to 300 MHz
• Embedded memory
• Easy to use tools
• RTOS support
Best of
Both Worlds
COMPANY PUBLIC 26
CROSSOVER PROCESSORS
i.MX RT
• Arm Cortex-M cores (v7m/v8m)
• Up to GHz performance
• DSP & Co-processor Acceleration
• High integration
• Deterministic instructions
• Short latency
• Easy to use tools
• RTOS support
26
COMPANY PUBLIC 27
i.MX RT Series Key Highlights
High Performance
Real-time Processing• Cortex-M7 up to 1GHz (RT1xxx)
(50% faster than current existing M7 products)
• Cortex-M33 up to 275MHz with Trust Zone
(RT6xx/5xx)
• Up to 600MHz DSP and other co-processor
accelerators (RT6xx/5xx)
• Up to 5MB On Chip SRAM
High Level
of Integration
• High Security enabled by AES-256, HAB and
On-the-fly QSPI Flash Decryption
• 2D graphics acceleration engine with Parallel &
MIPI DSI/CSI
• LCD display controller up to WXGA (1366x768)
• Digital microphone and I2S interfaces for
multichannel, high performance audio and voice
• Up to 3x Ethernet and 3x CANFD
Low BOM Cost
• Competitive Pricing
– starting @ $0.99 100K RSL
• Fully integrated PMIC with DC-DC
• Low cost packages enabling 4 layer (BGA) & 2 layer
(LQFP) PCB design
• Quad/Octal Serial and SDRAM interface
Easy to Use• MCU customers can leveraging their current
toolchain (MCUXpresso, IAR, Keil)
• Rapid and easy prototyping and development with
NXP FreeRTOS, SDK, ARM mbed and the
global ARM ecosystem
• Single voltage input simplifies power circuit design
• Scalability to LPC, Kinetis & i.MX products
COMPANY PUBLIC 282017 2018 2019
1MB
512KB
256KB
600MHz Cortex-M7, 32K/32K L18/16-bit EMI (SDRAM/SRAM)
LCD / CSI / 2D acceleration
Standard Security
i.MX RT1050
LQFP144 LQFP100
BGA196
Arm
CM7
Arm
CM3
3
VFBGA
176
>250 MHz Cortex-M33 with TrustZoneAdvanced Audio Integration
Advanced Security, SRAM PUF, root of trust
4…5MB SRAM for IoT Stacks and Algorithms
2MB
3 – 5
MB
Inte
gra
ted
SR
AM
Execution
Production
Proposal
Product
Samples
Planning
i.MXRT600General-
purpose
MCUsP
erf
orm
an
ce
600MHz Cortex-M7, 32K/32K L18/16-bit EMI (SDRAM/SRAM)
LCD / CSI / 2D acceleration
Standard Security
i.MX RT1060 i.MX RT1064
i.MX RT1020
Cortex-M7, 16K/16K L1
256KB SRAM, 16-bit EMI (SDRAM/SRAM)
Standard Security
LQFP100
i.MX RT1010
LQFP80
BGA196
Cortex-M7, 32K/32K L11MB SRAM, 4MB Flash
8/16-bit EMI (SDRAM/SRAM)
LCD / CSI / 2D acceleration
Standard Security
Cortex-M7, 16K/16K L1128KB SRAM, 1x QSPI
Standard Security
Cortex-M7, 16K/16K L1128KB SRAM, 1x QSPI
Standard Security
800MHz Cortex-M7, 32K/32K L18/16-bit EMI (SDRAM/SRAM)
2D graphics acceleration, MIPI DSI/CSI
Automotive, TSN, Security
i.MX RT1170
BGA289
i.MX RT1015
NXP 32-bit Arm based MCUs
i.MX Series MCU Roadmap | High Performance
COMPANY PUBLIC 29
Arm® Cortex®-M7
Security
Secure JTAG
PLL, OSC
FPU
6 x GP Timer
4 x FlexPWM
ADC / DAC
2 x ADC (16-ch.)
eDMA
512KB TCM/OCRAM
32 KB D-cache
Connectivity
2 x eMMC 4.5/SD 3.0
8 x UART
Power Mgmt
4 x Watch Dog
Temp Monitor
NVIC
32 KB I-cache
External Memory
2 x Dual-Channel Quad-SPI
with Bus Encryption Engine
4 x I2C
S/PDIF Tx/Rx
3 x I2S/SAI
2 x FlexIO
2 x 10/100 ENET
with IEEE 1588
2 x USB2.0 OTG
with PHY
2 x FlexCAN + CANFD
4 x SPI
8 x 8 Keypad
MPU
Internal Memory
96KB ROM
512 KB SRAM
4 x ACMP
DCDC & LDO
4 x QuadTimer
4 x Quadrature ENC
External Memory Controller
8/16-bit SDRAM
Parallel NOR Flash
NAND Flash
System Control Main CPU Platform
Core
IOMUX
HABCiphers & RNG Secure RTC eFuse
Multimedia
8-/16-bit Parallel Camera Interface
24-bit Parallel LCD (RGB)
Pixel Processing Pipeline (PXP)
2D Graphics Acceleration
Resize, CSC, Overlay, Rotation
HS_GPIO FlexIO
Available on certain product families
High Performance Real Time system
• Cortex-M7 up to 600MHz , 50% faster than any other existing M7 products
• 20ns interrupt latency, a TRUE Real time processor
• 512KB SRAM + 512KB TCM/OCRAM
Rich Peripheral
• Motor Control: Flex PWM X 4, Quad Timer X 4, ENC X 4
• 2x USB, 2x SDIO, 2x CAN + 1x CANFD, 2x ENET with 1588, 8xUART, 4x SPI, 4X I2C
• 8/16-bit CSI interface and 8/16/24-bit LCD interface
• 2x Qual-SPI interface, with Bus Encryption Engine
• Audio interface: 3x SAI/ SPDIF RX & TX/ 1x ESAI
Security
• TRNG&PRNG(NIST SP 800-90 Certified)
• 128-AES cryptography
• Bus Encryption Engine: Protect QSPI Flash Content
Specifications
• Package: MAPBGA196 | 10x10mm^2, 0.65mm pitch (130 GPIOs)
MAPBGA196 | 12x12mm^2, 0.8mm pitch
• Temp / Qual: -40 to 105°C (Tj) Industrial / 0 to 95°C (Tj) Consumer
Ease of Use
• MCUXpresso with SDK, IAR, Keil
• FreeRTOS
• Comprehensive ecosystem
Low BOM Cost
• Competitive Price
• Fully integrated PMIC with DC-DC
• QSPi and SDRAM interface
NXP 32-bit Arm based MCUs – High Performance
i.MX RT1060: Block Diagram
COMPANY PUBLIC 30
i.MX RT1010: The Most Cost Efficient Crossover Processor
✓1/2 of the competitors Cost, and even less− $0.99 for volume production
✓2x of the competitors Performance, and even more− Up to 500MHz frequency
− 128KB SRAM/TCM
− HS USB OTG, I2S, FlexPWM, etc
✓Feature Improvement− OTFAD for high performance on-the-fly decryption
− Bug fixes
Breaks the $1 barrier, enables RT series to compete in the main stream low
cost MCU market.
NDA REQUIRED, SUBJECT TO CHANGE
COMPANY PUBLIC 31
High Performance and Integration
• Cortex-M7 up to 500MHz with 16KB/8KB I/D cache
• High Speed USB with PHY
• Security (On-The-Fly FlexSPI decryption)
• Rich Audio features
Low cost and easy to develop
• Starting from $0.99 @ 100Ku
• LQFP Packages enable low cost 2-layer PCB design
• Integrated power management module reduces complexity of external power supply
• FreeRTOS with SDK
• MCUXpresso / Keil / IAR
Specifications• Package: 80LQFP, 12x12, 0.5p• Temp / Qual: -40 to 105°C (Tj) Industrial
0 to 95°C (Tj) Consumer
Arm® Cortex®-M7
Security
Secure JTAG
PLL, OSC
FPU
3 x GP Timer
1 x FlexPWM
ADC
1 x ADC (15-ch.)
eDMA
Up to 128KB TCM
8 KB D-cache
Connectivity
4 x UART
Power Mgmt
4 x Watch Dog
Temp Monitor
NVIC
16 KB I-cache
External Memory
Dual-Channel Quad-SPI
with On-The-Fly Decryption
2 x I2C
S/PDIF Tx/Rx
2 x I2S/SAI
FlexIO
USB2.0 OTG
with PHY
2 x SPI
4 x 4 Keypad
MPU
Internal Memory
64KB ROM
128KB SRAM/TCM DCDC & LDO
System Control Main CPU Platform
Core
IOMUX
Ciphers & RNG Secure RTC eFuse HAB
NDA REQUIRED, SUBJECT TO CHANGE
NXP 32-BIT ARM BASED MCUS – HIGH PERFORMANCE
i.MX RT1010: Block Diagram
COMPANY PUBLIC 32
i.MX RT1170 Key Differentiation
1GHz Cortex-M7
with 512KB TCM
Over 5000 Coremark
28nm FD-SOI Process
Optimized for both active
power & leakage power
High Performance
High-Performance Crypto
Tamper Detection
On-The-Fly Memory
Encryption & Decryption
Secure Boot
Up to 2MB SRAM
High-speed ADC, DAC
1Gbps Ethernet
MIPI CSI / DSI
Advanced Security Rich Feature Set Low Power
COMPANY PUBLIC 33
i.MX RT1170: The State-of-Art Implementation of Cortex-M7
World’s Fastest Cortex-M7
• Up to 1GHz frequency
• 2080 DMIPS, 5033 Coremark
Fast Interrupt
• 12nm interrupt latency
• Up to 220 interrupt sources
• Up to 4 interrupt level
Best Power Efficiency
• Less than 100uA/MHz power consumption
• DVFS support for low power operation
Highly Reliable
• ECC support on L1 Cache
• ECC support on TCM
Large L1 Cache
• 32KB I-Cache
• 32KB D-Cache
Configurable TCM
• 512KB TCM, configurable as ITCM or DTCM
• Zero-Wait-Cycle Access
Floating Point
• Support single- and double-precision FPU
• VFPv5 architecture
MPU
• Up to 16 regions
COMPANY PUBLIC 34
** source: http://www.eembc.org/coremark/index.php* see manufacturer’s website for pricing
0
1000
2000
3000
4000
5000
6000
i.MX RT1170 i.MX RT1050 STM32H7* STM32F7* SAM70* PIC32MZ*
2.5x – 7x better than competition
5033†
1GHz
2020**
400MHz
1082**
300MHz
1500**
300MHz
710**
200MHz
Coremark
Frequency
3020†
600MHz
† NXP calculation
Comparing Leading MCUs for Coremark
NXP MCUs
COMPANY PUBLIC 35
Specifications• Process: SEC 28FD-SOI
• Core Voltage: 1.0V
• Package: MAPBGA289, 14x14mm, 0.8mm pitch
• Temperature: -40C to 125C (Tj)
Key Features and Advantages• ARM Cortex-M7 processor, 1 GHz, 32KB/32KB L1 Cache, 512KB TCM
• ARM Cortex-M4 processor, 400MHz, 16KB/16KB L1 Cache, 256KB TCM
• 2MB on-chip SRAM (including TCM for CPU core)
• Parallel LCD Display up to WXGA (1280x800)
• 8/16-bit Parallel Camera Sensor Interface
• 2-lane MIPI CSI and 2-lane MIPI DSI
• 2D Graphics Acceleration & OpenVG Acceleration
• 8/16/32-bit SDRAM controller up to 200MHz
• 8/16-bit Parallel NOR FLASH / NAND FLASH / PSRAM
• 2x QSPI NOR FLASH / HyperRAM / HyperFLASH Interface
• 2x eMMC 5.0/SD 3.0/SDIO Port
• 2x USB 2.0 OTG, HS/FS, Device or Host with PHY
• Audio: 4x I2S/SAI, 1x S/PDIF Tx/Rx, ASRC, digital microphone input
• 3x ENET: 10/100 ENET w/ IEEE 1588 + 1Gbps ENET w/ AVB + 1Gbps ENET w/ TSN
• 2x 12-bit ADC, 2Msample/s, up to 20 input channels total
• 4x Analog comparator, 1x DAC
• Full PMU Integration, DCDC+LDOs
• Secure Boot, TRNG, RSA4096, Tamper Detection, Secure Key Storage
Enablement• MCUXpresso, FreeRTOS with SDK
i.MX RT1170
Secondary CPU Platform
System Control
ARM Cortex-M4
Security
Secure JTAG
PLL, OSC
FPU
High Resolution Timer
GP Timer x6
FlexPWM x4
ADC / DAC
HSADC x2 (20-ch)
eDMA x2
256 KB TCM
16 KB D-cache
Multimedia
Connectivity
eMMC 5.0 / SD 3.0 x2
UART x12
Power Mgmt
Watch Dog x4
Temp Monitor
NVIC
16 KB I-cache
External Memory
Parallel LCD
Parallel CSI
I2C x6
ASRC
S/PDIF Tx/Rx
1Gbps ENET x1
w/ TSN
USB2.0 OTG
w/ PHY x2
CAN-FD x3
I2S/SAI x4
Secure RTCTRNG HABeFuse
MPU
Internal Memory
256KB ROM
2MB SRAM/TCM
ACMP x4, DAC x1
2D Graphics Acceleration (PXP)
Resize, CSC, Overlay, Rotation
DCDC & LDO
QuadTimer x4
Quadrature ENC x4
AES-128/256RSA4096 Tamper DetectionDES/3DES
10/100 ENET x1
w/ IEEE 1588
Dual Channel QSPI FLASH x2HyperRAM / HyperFLASH
External Memory Controller8/16/32-bit SDRAM
NAND/Parallel NOR Flash
MIPI DSI
MIPI CSI
SDIO Slave
SPI x6
Main CPU Platform
ARM Cortex-M7
FPU
512KB TCM
32 KB D-cache
NVIC
32 KB I-cache
MPU
EMVSIM x2
OpenVG 1.1 Acceleration
1Gbps ENET x1
w/ AVB
8-ch Digital Mic Input
8x8 Keypad
Subject to Change, NDA Required
NXP 32-BIT ARM BASED MCUS – HIGH PERFORMANCE
i.MX RT1170: Block Diagram
COMPANY PUBLIC 36
NXP MCUs Optimized for Graphical Interfaces
i.MX RT1050Cortex-M7
512KB SRAM
8/16-bit EMI (SDRAM/SRAM)
LCD Interface and 2D acceleration engine
LPC546xxCortex-M4
200KB SRAM, 512KB Flash
Up to 32-bit EMI
LCD Interface
LPC540xx/S0xxCortex-M4
360KB SRAM
Up to 32-bit EMI
LCD Interface
K27/K28Cortex-M4
1MB SRAM, 2MB Flash
32-bit SDRAM controller
4x SPI / 32-ch FlexIO
* Recommended platforms for graphics applications – does not include all device families that are enabled for graphics applications
LPC5411xCortex-M4
192KB SRAM, 256KB Flash
Low-Power Flexcomm Interface
Entry Level UI Advanced UI
Low
Co
st M
CU
Hig
h P
erf
orm
ance
MC
UM
ain
str
eam
MC
Ui.MX RT106x
Cortex-M7
1MB SRAM + 4MB Flash on RT1064
8/16-bit EMI (SDRAM/SRAM)
LCD Interface and 2D acceleration engine
COMPANY PUBLIC 37
i.MX RT Graphics Software SolutionsL
ow
Cost
MC
UH
igh
Pe
rfo
rma
nce
MC
UM
ain
str
ea
m M
CU
NXP emWin
Entry Level UI Advanced UI
COMPANY PUBLIC 38
NXP i.MX RT MCU Alexa Voice Service (AVS) Solution
• First MCU-based AVS development kit
• Targets smart home for Alexa built-in
• Enables significantly lower cost
• Turnkey design shortens time-to-market
• Availability − Now (limited access)www.nxp.com/mcu-avs
COMPANY PUBLIC 39
Alexa Voice Service Features ComparisonFeature AVS (MCU) AVS (MPU) AVS Multimodal
Dialogs (inc. multiturn) ✓ ✓ ✓
Alerts ✓ ✓ ✓
Skills & 3rd Party Skills ✓ ✓ ✓
Kindle ✓ ✓ ✓
Audible ✓ ✓ ✓
Notifications ✓ ✓ ✓
Routines ✓ ✓ ✓
Shopping ✓ ✓ ✓
Alexa announce 1Q19 ✓ ✓
Alexa messaging 1Q19 ✓ ✓
Alexa Calling 2Q19 ✓ ✓
Video calling X X ✓
Amazon Music 64 kbps 256 kbps 256 kbps
iHeart Radio, Pandora, TuneIn 1Q19 ✓ ✓
Spotify X ✓ ✓
Multiroom music & Bluetooth sync X ✓ ✓
Basic GUI X X ✓
Rich Interactive GUI X X ✓
Amazon Video X X ✓
$ $$ $$$
NXP AVS for MCU
Solution on i.MX RT106A
NXP i.MX 8M
Development Kit for AVS
NXP Smart Display Solution
on i.MX 8M Mini for
AVS Multimodal with
Facial Recognition
COMPANY PUBLIC 40
What is eIQ?
eIQ is a software platform for NXP microprocessors and microcontrollers to do inference of
models on embedded systems
• Tools currently under development include:
− Inference engines: Arm NN, OpenCV, Arm CMSIS-NN, TensorFlow Lite, and more
▪ May require converting a pre-trained model into a format that eIQ supports
− End-to-end example applications demonstrating typical customer use-cases (e.g. camera inference
engine)
− Support for emerging neural net compilers like GLOW
− Suite of classical ML algorithms such as support vector machine (SVM) and random forest
− Supported tools and application examples will differ between i.MX apps and i.MXRT
• eIQ will eventually be integrated as middleware into standard NXP Yocto and MCUXpresso SDK releases
• End goal is to enable customers to develop embedded applications that can utilize machine learning models
COMPANY PUBLIC 41
Inference Engines Middleware
ML Platform:
Hardware Abstraction Layer
OpenCLArm® Compute Library Custom API
ML Platform
Direct
Interface NN Compiler Technology
GLOW
eIQ Application Examples
Facial
Recognition
Voice
RecognitionObject
Detection
Open Source Inference
OpenCV/DNN Arm NN
Android NN TensorFlow LiteCMSIS-
NN
Tensorflow
Open VX
Anomaly
Detection
eIQ Machine Learning Software Development Environment
Cortex®-M Cortex®-A GPU DSP ML Accelerators
Hardware Layer
Available Today Planned
COMPANY PUBLIC 42
Product Spotlight: K32 MCU
Series
COMPANY PUBLIC 43
Introducing K32 MCU Series
Secure, Low-power edge/end nodes
based on Arm® Cortex®-M combining
Low Power Optimizations
• Exceptional Sleep Currents
• Fast Wake-up
High Performance Mixed-Signal
• Power Optimized Analog Integration
Advanced Security & Protection
• Physical Tamper
• Authenticate Boot
• Crypto Acceleration
COMPANY PUBLIC 44
NXP Ultra-low Power Roadmap/Evolution/Ambition
Roadmap plans subject to change
K & KL MCUs
NOW
K32 L2/L3 MCUs
2H 2019
K32 L4 MCUs
2021
• 90nm Kinetis K & KL MCUs (+KE/KV/KM)
• Broad scalable solutions
• Optimized for higher performance
• Flexible Power Modes
• Rich Analogue Integration
• Scalable Security
Plus
• Reduced run current by 50%
• Flexible Data Retention in stop modes
• Lower Power Analogue
Plus
• Higher density memories @
optimized price points
• Best in class Run Time current
consumption & improved leakage
• Optional Sentinel Security Black Box
• Extended Analogue Integration
COMPANY PUBLIC 45
K32 L4
2019
Execution
Production
Proposal
Product
Samples
Planning
2020
K32 L3 A60
K32 L2 A31/A41
NXP K32 L MCU Series
Roadmap
72 MHz Cortex-M4
Dual Core with 72 MHz Cortex-M0+
1.25MB Flash, 384KB SRAM
Enhanced Security
96 - 128
KB
16 – 32
KB
256
KB
384
KB
Inte
gra
ted S
RA
M
Po
we
r O
pti
miz
ed
72 MHz Cortex-M4
512KB-1MB Flash, 256KB SRAM
Enhanced Security
72 MHz Cortex-M0+
256-512KB Flash, 128KB SRAM
Baseline Security
48 MHz Cortex-M0+
64-256KB Flash, 32KB SRAM
Standard Protection
96 MHz Cortex-M33
1MB Flash, 256KB SRAM
Advanced Security w/ TZ
K32 L3 B50
72 MHz Cortex-M0+ Dual Core
256-512KB Flash, 128KB SRAM
Baseline Security
ArmCM7
ArmCM4
ArmCM33
ArmCM0+
K32 L2 B11K32 L2 B21
K32 L2 A40
K32 L2 B31
COMPANY PUBLIC 46
K32 L2Cortex-M0+
K32 L3Cortex-M4
K32 L4Cortex-M33
MemoryFrom 64KB to 512KB Flash
16KB to 128KB SRAM
From (512KB) to 1.25MB Flash
(256KB) to 384KB
1MB Flash; 256KB
(planning expansion)
Analog Advanced Power Optimized Advanced
Power Mgmt. Internal LDO Internal LDO & DC-DC Internal LDO & DC-DC
Second Core /
Core Ind.
Peripheral
Cortex-M0+;
FlexIO
Cortex-M0+;
FlexIO
N/A;
FlexIO
Security Standard/Baseline EnhancedAdvanced with
Secure Enclave
K32 L Series Overview
(planning expansion)
Continuous Improvement in Power/Leakage & Security
COMPANY PUBLIC 47
K32 L3 SeriesNXP’s Most Energy Efficient Cortex-M4 and optional Cortex-M0+ MCU with
Advanced Security
• 50% decrease in run current and 80% decrease in
wake-up time from deep sleep over 2nd generation of
Kinetis
• Choice M4/M0+ dual core or M4 only to optimize low
power use cases
• Improved security with advanced crypto, secure boot
and update capability, plus physical tamper
• MCUXpresso Ecosystem with HW & SW scalability
COMPANY PUBLIC 48
Mode DescriptionK22F
90nm
K32 L3
90nm
LPC 55
40nm
Active2 All units are active and powered218.75 uA/MHz
(LDO)
72.90 uA/MHz(DCDC)
32.40 uA/MHz(DCDC)
Sleep (Wait) CPU clock is halted but logic is still powered 9,300 uA 2,103 uA -
Deep Sleep (LLS) All SRAM available3 3.8 uA(128K)
3.85 uA(384K)
110 uA(320K)
Power Down (VLLS2/3) Full SRAM retention3 2.8 uA(128K)
3.68 uA(384K)
15.4 uA(320K)
Deep Power Down (VLLS2/3)
With RTC running and part of SRAM retained4 2.26 uA(32K)
3.18 uA(8K)
0.790 uA(4K)
Deep Power Down(VLLS2/3)
All peripherals off, part of SRAM retained4 1.90 uA(32K)
2.37 uA(8K)
0.590 uA(4K)
NXP K32 L3 SERIES
Continuous Improvement in Energy Efficiency
COMPANY PUBLIC 49
Mode DescriptionK22F
90mm
K32 L3
90nm
LPC 55
40nm
Deep Sleep (LLS) All SRAM available3 6 us(128K)
7.2 us(384K)
100 us(320K)
Power Down
(VLLS2/3) Full SRAM retention3 80 us(128K)
13.1 us(384K)
325 us(320K)
Deep Power Down
(VLLS2/3)
With RTC running and part of SRAM
retained4
80 us(32K)
13.1 us(8K)
15,000 us(4K)
Deep Power Down
(VLLS2/3)
All peripherals off and part of SRAM
retained4
80 us(32K)
13.1 us(8K)
15,000 us(4K)
1. STM32L5 DS is not available now. 2. K22F and STM32L5 are powered by on chip LDO. K32L3, LPC5500 and K32L4 are powered by on chip DCDC.3. 128 KB for K22F,384KB for K32L3, 320KB for LPC5500. 256KB for K32L4,256KB for STM32L54. 32 KB for K22F, 8KB for K32 L3, 4KB for LPC5500, no RAM for K32L4 and STM32L55. STM32L5 Stop2 mode is close to K32L4 deep sleep mode, and Standby mode is close to K32L4 deep power down mode. 6. 32K OSC and 32K FRO power consumption is 200nA. The power can be saved when RTC is disabled.7. K32L4 wake up time from Power Down and Deep Power Down mode doesn’t include ROM boot time.
NXP K32 L3 SERIES
Comparison of Wake Up Times
COMPANY PUBLIC 50
• Authenticated Boot
• Authenticated and Encrypted Firmware Update
• “Root of Trust” with RSA 2048/4096-bit public key signed certificates that can be revoked
• One Time Programmable (OTP) public key hash
Trust
The assurance that the device is authentic and remains
uncompromised
• Symmetric - AES128/192/256, DES/3DES
• Asymmetric - RSA and ECC,
• Hashing - SHA 256
• True Random Number Generator with 512bits of entropy
• Encrypted Key BLOB function for persistent key storage
Crypto
The science of keeping communications and data
confidential
• Crypto secure memory and keys are wiped on “Tamper Event”
-> external switches or protection mesh tripped
-> debug is attempted
-> clock stuck high or low
-> software initiated
Physical Tamper
The proactive monitoring of physical attacks on the device
NXP K32 L3 SERIES
Continuous Improvement in Security
COMPANY PUBLIC 51
K32 L3 Series OverviewCore Platform
• Cortex-M4F core up to 72 MHz
• Cortex-M0+ core up to 72 MHz (optional)
Memory
• Up to 1.25 MB FLASH
• Up to 320 kB RAM
• 48 kB ROM
High Security (optional on M4 only version)
• Cryptographic Acceleration Engine– Secure Key Storage
– Public Key (ECC)
– Symmetric (AES)
– Hashing (SHA-256)
• Standalone True Random Number Generator
• Resource Domain Controller (dual core only)
• Built-in Secure Boot
• Up to 4 x Tamper pins
Interfaces
• USB 2.0 Full-speed controller and transceiver
• 1 x 32ch FlexIO supporting emulation of UART, I2C, SPI,
I2S, Camera IF, LCD RGB, PWM/Waveform generation
• Up to 4 x low power UART
• Up to 4 x low power I2C
• Up to 4 x 16-bit low power SPI
• 1 x EMVSIM module supporting the ISO-7816
• 1 x Serial Audio Interface (SAI)
• 1 x Secure Digital Hardware Control (SDHC)
• Parallel External FlexBus Interface (RAM, ROM, simple
slave devices)
Analog
• 1 x 12-bit ADC
• Up to 2 x Low power comparator with 6-bit DAC
• 1 x 12-bit low power DAC
• Dual output DC/DC Convertor
• 1.2V / 2.1V dual-range voltage reference
Timers
• Up to 2 x 6 ch., 2 x 2 ch. Timer/PWM Modules
• Up to 2 x 4 ch. Low Power Programmable
Interrupt Timer
• Up to 3 x Low Power Timers
• Real Time Clock (RTC)
• 1 x 56-bit Timestamp
Packages
• 176 VFBGA, 9mm x 9mm x 0.86mm, 0.5mm
pitch (K32L3A60VPJ1A)
LP ADC
(12-bit)
Arm Cortex-M4FUp to 72 MHz
External
Watchdog
LPIT 2x
(4 Channel)
Flash Access
ControlFLASH
Up to 1.25MB
DSP, sFPU, NVIC, SysTick
Core Platform
System
Watchdog
Timers
Memory
RAMUp to 384kB
Boot ROM48 kB
Communication and HMI
InterfacesEMVSIM External Bus
Analog
LP CMP 2x
Security
Clocks
Arm Cortex-M0+Up to 72 MHz
Division, Square Root, NVIC, Systick
System PWR
Management
Low-Leakage
Wake-Up
System CLK
Generator
Peripheral
CLK CTRL
DMATrigger
Multiplexer
Random NUM
Generator
CAE Tamper
CRCResource
Domain CTRL
LPTMR 3x
(32-bit)
TPM 2x
(6 Channel)
TPM 2x
(2 Channel)
Time Stamp
TimerReal-Time Clock
FlexIO GPIO
LP I2C 4x SAI
SDHC LP SPI 4x
LP UART 4x USB
DAC
(12-bit)
Dual Output
DC/DC
Battery MonitorTemperature
SensorLP RTC OSC32.768 kHz
IRC48 MHz
IRC 8 / 2 MHz
LP FLL (120 / 96 / 72/ 48 MHz)
OSC 26 / 32 MHz
Optional
• Low-Power & Low-Leakage
• Cortex-M4 + Cortex-M0
• Improved Security
COMPANY PUBLIC 52
Summary
COMPANY PUBLIC 53
NXP 32-bit Arm Cortex
MCUs
• Leading MCU supplier with 1000+ Arm-based MCUs
• Scalable portfolio ranging in performance, power, memory size, and packaging options
• Targeted solutions for key vertical markets
• Unified software with MCUXpressoand broad ecosystem support for easy development
• Best-in-class commitment to product longevity
COMPANY PUBLIC 54
Together With Our Valued Customers,
We Are Creating Secure Connections for a Smarter World
Contactless
Transport Card
Access Solutions
Micro-payments
Enhanced Security
Mesh Connectivity
Sensors
Smart LED Lighting
Gateway & Cyber Security
Access
Manufacturing Automation
Temperature Monitoring
Machine Diagnosis & Control
Remote Asset Control
Fleet TrackingSmart Parking
Smart Roads
Traffic Congestion
Smart Lighting
Waste Management
Cloud Computing
Gateways
Routers & Switches
Security Appliances
Wireless Base Stations
Smartphones
Smart Watch
Activity Tracking
Smart Glass
Hospital & at-home Patient Monitoring
Fall Detection
Personal Health & Fitness Monitoring
Distribution
Energy Consumption & Monitoring
Water Pressure Measurement
e-passport
Smart eID
Health Card
Car Entertainment
In-vehicle Networking
Car Access
Car2X and Radar
Secure Bank Cards
Mobile Transactions
Loyalty- Reward
RFID Tags/Labels
Supply Chain Monitoring
NFC Readers
NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2019 NXP B.V.