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Mission Profile Aware IC Design- A Case Study -
Goeran Jerke, Robert Bosch GmbH, Automotive ElectronicsAndrew B. Kahng, University of California, San Diego
This research project is supported by the German Government, Federal Ministry of Education and Research under the grant number 16M3195C
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• Introduction
• Design Challenges
• Mission Profile Aware Design
• Case Study – Electromigration Aware IC Design
• Summary and Conclusion
Overview
Apr 19, 2023 2Goeran Jerke, Robert Bosch GmbH; Andrew B. Kahng, University of California, San Diego
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Introduction
Apr 19, 2023Apr 19, 2023
ECUs, mechatronicssensors
MEMS sensors
Semiconductors
OEM
Tier 1
Tier 2
OEM – Original Equipment
Manufacturer
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Introduction
Apr 19, 2023 Goeran Jerke, Robert Bosch GmbH; Andrew B. Kahng, University of California, San Diego 5
Electronic Control Unit for ESP
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Introduction
Apr 19, 2023 Goeran Jerke, Robert Bosch GmbH; Andrew B. Kahng, University of California, San Diego 6
Tier 2 +
Tier 1
ECU for Driver Assistance Acceleration Sensor Module
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Introduction
Apr 19, 2023 7Goeran Jerke, Robert Bosch GmbH; Andrew B. Kahng, University of California, San Diego
EnvironmentOEM
Tier 1, OEM
Tier 1
Tiers 1 and 2Foundry
Tier 2Foundry
System DesignPackaging
Constraints
Functional LoadConstraints
Temperatures Responsibility Parameters
Ambient Temperature (Car)
Installation Location (Car)
ECU Housing
ECU (internal)
Component Pin
Device Junction
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• IC Technology Node Evolution
Introduction
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Smart-Power
HV-CMOS
CMOS automotive
CMOS leading edge (ITRS)
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• Aggressive technology scaling• Time to market co-design• System partitioning and integration• Robustness• Application requirements:– Origin and cause of requirements replicability, quality– Impact on application design and technologies– Application use operating conditions, environmental load– Functional loads thermal, current, voltage, ...– Reliability dominant failure mechanisms
• Complex, heterogeneous and fragmented design flows
Design Challenges
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• Aggressive technology scaling• Time to market co-design• System partitioning and integration• Robustness• Application requirements:– Origin and cause of requirements replicability, quality– Impact on application design and technologies– Application use operating conditions, environmental load– Functional loads thermal, current, voltage, ...– Reliability dominant failure mechanisms
• Complex, heterogeneous and fragmented design flows
Design Challenges
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• Introduction
• Design Challenges
• Mission Profile Aware Design
• Case Study – Electromigration Aware IC Design
• Summary and Conclusion
Overview
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Mission Profile Aware Design
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...
OEM
Tier 1
Tier 2
...Tier n
Supply Chain
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Mission Profile Aware Design
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...
OEM
Tier 1
Tier 2
...Tier n
Design Chain
MP
MP
MP
MP
MP
MPMP MP
Requirements, Constraints, Functional Loads, Environmental Loads
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Mission Profile Aware Design
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...
OEM
Tier 1
Tier 2
...Tier n
Design Chain
MP
MP
MP
MP
MP
MPMP MP
NEW: Achieved Robustness, Dominant Failure Mechanisms RIF
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• Design Flow Overview
Mission Profile Aware Design
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1 2
3 3
5
4 4
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• Consistent consideration of mission profiles (MP)in supply chain • Reduction of design uncertainty
o More precise requirements and stress factorso Better understanding of system (failure mechanisms)
• Formalized and improved communication o OEM Tier n and Tier n OEM
• Standardization of structure and content of MPs• Electronic format MP documents • RMP Framework
(Tool-independent platform for mission profile aware design)
Mission Profile Aware Design
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• Mission Profile Document– Document header– Operating states definition– Component definition– Property definition– Back-annotation data
Mission Profile Aware Design
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• Mission Profile Document– Document header
• Author• Timestamp• Document history• Mounting location
– Operating states definition– Component definition– Property definition– Back-annotation data
Mission Profile Aware Design
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• Mission Profile Document– Document header– Operating states definition
• Generic data container for operating states Manufacturing, assembly, storage, ... Car: start, acceleration, breaking, stop&go, freeway cruising, ... IC: power-up, idling, power-down, mode_1, mode_2, ...
– Component definition– Property definition– Back-annotation data
Mission Profile Aware Design
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• Mission Profile Document– Document header– Operating states definition– Component definition
• Type e.g. ECU, passive component, IC, sensor, ...• Device I/O port definition (*)
– Operating state dependent environmental and functional loads» Heat flow» Transient/effective voltages and currents» ...
• Profiles– Property definition– Back-annotation data
Mission Profile Aware Design
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(*) A port is a generic object: thermal port or electrical port
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Mission Profile Aware Design
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Source: ZVEI Handbook RV EE Modules 2012
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• Mission Profile Document– Document header– Operating states definition– Component definition
• Type • Device I/O port definition• Profiles:
– Temperature histogram, gradient and cycling– Humidity vs. temperature histogram– Vibration– ...
– Property definition– Back-annotation data
Mission Profile Aware Design
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Mission Profile Aware Design
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Source: ZVEI Handbook RV EE Modules 2012
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• Mission Profile Document– Document header– Operating states definition– Component definition– Property definition– Back-annotation data
• Reliability: Robustness Indication Figures (RIF) of dominant failure mechanisms
• Robustness: Enhanced Worst-Case Distance (WCD)
Mission Profile Aware Design
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Mission Profile Aware Design
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Component Parameter ECU TEEM_Package, TVMLA, TEEM_internal , TComp.Package , ... Board TBoard , ... Package TComp.Package, TComp.Pins, Rth, ... Chip TJunction, ... Sensor Discrete device, ...
Source: ZVEI Handbook RV EE Modules 2012
Component Properties
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• Introduction
• Mission Profile Aware Design
• Case Study – Electromigration Aware IC Design
• Summary and Conclusion
Overview
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• Quality of Functional Load Data
EM Aware Design – Case Study
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Classic Design Flow
Current Aware Design Flow
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EM Aware Design – Case Study
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Current Aware Design Flow
Cell-Level
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EM Aware Design – Case Study
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Current Aware Design Flow
Block-Level
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EM Aware Design – Case Study
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I = 1A DC
AE/QMM
Electrical Overstress (EOS)
VoidsVoids HillockHillock
Electromigration (EM)
AE/QMM
Imax = 1A + Duty cycle
I
I
t
t
Abnormal peak event
EMEOS RPP
EM EOS RPP
AE/QMM
Repetitive Power Pulsing (RPP)
• Quality of Functional Load Data
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Current (Density) Aware Routing to prevent EM and EOS
EM Aware Design – Case Study
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• Effective Design Parameters
EM Aware Design – Case Study
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• Electromigration Aware Design Flow
EM Aware Design – Case Study
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1
2
5
3
4
4,5
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• Current Density Critical Nets – Automotive IC A
EM Aware Design – Case Study
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Different Mission Profile Next technology node
Base node
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• Current Density Critical Nets – Automotive IC B
EM Aware Design – Case Study
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Different Mission Profile
Next technology node
Base node
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• Introduction
• Design Challenges
• Mission Profile Aware Design
• Case Study – Electromigration Aware IC Design
• Summary and Conclusion
Overview
Apr 19, 2023 37Goeran Jerke, Robert Bosch GmbH; Andrew B. Kahng, University of California, San Diego
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• Consideration of robustness as design target is essential for automotive electronic designs
• Consistent consideration of mission profiles within the design chain is required (bi-directional flow)
• Current aware design is driven by mission profiles
• Mission profile aware design:– Vendor- and EDA tool-independent focus on design flow – Reduction of design uncertainty– Formalized and improved communication
Summary and Conclusion
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Apr 19, 2023 39Goeran Jerke, Robert Bosch GmbH; Andrew B. Kahng, University of California, San Diego
Thank You!