1EPO3-A3: Dora
DoraDelta One Recreation Attempt
Arjen Kremers Bart HettemaDanny Eldering Hann Mai TruongJoris Belier Piet De VaereTim Hosman Timothy de Moor
2EPO3-A3: Dora
Specifications
• Delta I• Microprocessor• 8-bit databus• 10 data registers• 16 instructions• 6.1 MHz
Overview
3EPO3-A3: Dora
Specifications
• User I/O• 13-bit instructions• EEPROM
Compared to Delta I
4EPO3-A3: Dora
Specifications
• Program counter• ALU• Data registers• Flow Control Unit• Decoder• I/O register• Memory Control Unit• User Control Module• Top-level• Test tools• Test plan
Components
5EPO3-A3: Dora
Program CounterSpecification
6EPO3-A3: Dora 6
ALU & AccumulatorDesign
7EPO3-A3: Dora 7
ALU & AccumulatorResults
8EPO3-A3: Dora
DREG
• Temporarily stores data• 10 data registers• 8-bit tristate buffer• Input from DEC
• ld: load data in a register• oe: enable an output buffer
Data Register
9EPO3-A3: Dora
FCU
• Facilitates user confirmation• 13th instruction bit of MCU data
• Bit ‘0’ execute instruction• Bit ‘1’ waiting for user
• Opcode hold/passed to DEC• Generate signals: pc_en and mcu_ack
Flow Control Unit
10EPO3-A3: Dora
DEC
Input receives 12 bit instruction
0000 [4-bit Opcode] 10101010 [8-bit Operand]
• To process this instruction different modules are required.
• The decoder enables the different modules based upon the instruction given.
• No FSM needed• Collection of logic gates.
Decoder
11EPO3-A3: Dora
The I/O-Registers
I/O multiplexercircuitimplementation
Input and output of the chip
12EPO3-A3: Dora
13EPO3-A3: Dora
The I/O-Registers
• Loading in registers• Reading from registers• Multiplexer
The implementation on the chip
14EPO3-A3: Dora
MCU
EEPROM Controller
MCU cycle:• 8 clock cycles send read command
• 0000A8010• 8 clock cycles send address
• A7A6A5A4A3A2A1A0
• 13 clock cycles receive data• Raise data_rdy until data_ack is high
Instruction stored in two bytesPC to 256 512 bytes 9-bit address
Memory Control Unit
15EPO3-A3: Dora
MCU
• Custom VHDL EEPROM simulation• Custom made test board• Arduino EEPROM writer• Logic analyser
Testing
16EPO3-A3: Dora
UCM
• Falling edge detector• Halts process until user releases button
User Confirmation Module
17Challenge the future
• Modified version of the Delta I assembler
• Difference in output stage• VHDL or C++
• 13th instruction bit
Tools developed for testingAssembler
18Challenge the future
• Instructions from external EEPROM• System required to write instructions
• 4K SPI Bus Serial EEPROM 25AA040A• 512 bytes storage
• Arduino• SPI protocol library• New library added
Tools developed for testingEEPROM SPI writer
19Challenge the future
• Test after writing the EEPROM• Read and print all stored bytes
• Breadboard• Unreliable soldered board
• Block protect flag
Tools developed for testingEEPROM SPI writer
20Challenge the future
• GCD application• Works? chip works
• Hypothesis of malfunction• Specific custom assembly code• External test signals
Testplan
21EPO3-A3: Dora
Top-level Layout
22Challenge the future
mcu_rdy
pc_new
pc_en
pc_ld
pc_inc
clk
ss
Logic level
Switch levelregproc: process beginwait until rising_edge(clk);if (res = '1') then pc_new <= '0';else pc_new <= new_output;end if;end process;
newproc:process (pc_ld, pc_inc, pc_en) beginif ((pc_ld or pc_inc) and pc_en) = '1' then new_output <= '1';else new_output <= '0';end if;end process;
mcu_rdy
pc_new
pc_en
pc_ld
pc_inc
clk
ss
23Challenge the future
FPGA Demo
24Challenge the future
FPGA Demo; Get inputgcd: ld R10 st R0 ld R11 st R1
loop: ld R1 and 11111111b bz done ld $+3 st R3 jp mod ld R1 st R0 ld R2 st R1 jp loop
done: ld R0 st R10 jp gcd
; Calculate mod
mod: ld R0 st R2
subtr: ld R1 xor 11111111b
set c add R2 st R2
and 10000000b bz subtr
ld R2 clr c add R1 st R2 jp R3
25EPO3-A3: Dora
DoraDelta One Recreation Attempt
Arjen Kremers Bart HettemaDanny Eldering Hann Mai TruongJoris Belier Piet De VaereTim Hosman Timothy de Moor