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Digital Video Recorder Eric Bowden, Matt Ricks, Irene Thompson

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Digital Video Recorder. Eric Bowden, Matt Ricks, Irene Thompson. Presentation Roadmap. What is a DVR? Why make a DVR? Implementation Overview Specifications (Baseline and Extensions) Initial Tasking Initial Timeline. Introduction & Motivation. Introduction & Motivation. Analog Design. - PowerPoint PPT Presentation

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Page 1: Digital Video Recorder

Digital Video RecorderEric Bowden, Matt Ricks, Irene Thompson

Page 2: Digital Video Recorder

Wed., February 29, 2006 Digital Video Recorder 2

Presentation Roadmap

Introduction& MotivationIntroduction& Motivation

Analog Design

Digital Design

What is a DVR?

Why make a DVR?

Implementation Overview

Specifications (Baseline and Extensions)

Initial Tasking

Initial Timeline

Page 3: Digital Video Recorder

Wed., February 29, 2006 Digital Video Recorder 3

What is a Digital Video Recorder?A video capture unit for live television

signals

Baseline FunctionalityPause Live TV

Never miss part of a show again due to interruptions

Rewind Live TV For up to 15 minutes of the broadcast

Fast Forward Allows the user to skip through selected

portions of the buffered broadcast

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Wed., February 29, 2006 Digital Video Recorder 4

Motivation

Currently available DVRs charge a monthly subscription fee

Non-trivially combines both hardware and software components

Allows us to explore analog signal processing, analog-to-digital conversion, and digital storage

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Wed., February 29, 2006 Digital Video Recorder 5

DVR Implementation

We will develop a PCI 2.2 compliant card (FPGA solution or etching our own PCB) for use in a black box system that sits next to the television source.

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Functional Specification

The baseline device must: Convert an analog, NTSC television

signal (video/audio) into a digital signal

Manipulate live television using pause, play, rewind and fast-forward

Store, at minimum, 15 minutes of live television for recall using the aforementioned techniques

The recalled audio/video data must be converted back into an NTSC composite signal

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Extended Specification

Additional functionality, time permitting Commercial detection and

eradication for recorded broadcasts Increased storage capacity Audio/Video compression User interface via remote control

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Tasking

Matt Ricks: analog-to-digital encoding and decoding, hardware development

Irene Thompson: signal subsystem processing and software development

Eric Bowden: analog and digital integration and the software development for the PCI interface

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Initial TimelineApril 2006 – Final Design Decisions have been

madeMay 2006 – All hardware components that

need to be purchased have been orderedJune 2006 – Implementation of individual parts

for the DVR has begunAugust 2006 – Individual components of the

project are readySeptember 2006 – Integration of individual

parts and debuggingOctober 2006 – Baseline Specifications have

been metDecember 2006 – Some of the extensions

have been put into effect

Page 10: Digital Video Recorder

Wed., February 29, 2006 Digital Video Recorder 10

Presentation Roadmap

Analog to Digital Video Decoding

Analog Video Signal

PCI Video Capture Card Schematic

Introduction& Motivation

Analog DesignAnalog Design

Digital Design

Introduction& Motivation

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Video Signal Decoding

Tuner (what channel?) 6MHz apart

Audio/Video filter Audio and Video ADC Chrominance/Luminance Horizontal and Vertical Sync Noise Filter Video Amplifier

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Analog Video Signal

30 Frames per second (60 Hz)

525 lines per frame (15 kHz)

Pixel Frequency = 12.5 MHz

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Video Capture PCI Card

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Commercial Detection

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Presentation Roadmap

PCI Microcontroller

PCI-Host Communication

Speed Considerations

Host Application

Digital to Analog Encoding

Introduction& Motivation

Analog DesignAnalog Design

Digital DesignDigital Design

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Wed., February 29, 2006 Digital Video Recorder 16

PCI Microcontroller

There will be a small, simple microcontroller to manage input/output data buffering. This allows major processing to be offloaded to the host computer.

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PCI-Host Communication

The device will periodically unload its digitized signal-buffer onto the PCI bus through standard interrupt methods.

This data will be received on the host computer by a software application that stores the A/V data to disk.

This will necessitate building a kernel module for Windows XP.

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Speed Considerations

In order to prevent frame-loss the device must be able to process incoming data and output it to the host faster then data is coming in.

PCI 2.2 Bus: 66 MHz 3.3 V signaling with a peak transfer rate of 533 Mb/s

Data input bandwidth must be approximately: 300 Mb/s

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Video Signal Detail Diagram

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Host Application

The host software will act as an agent

Its job is to constantly record A/V data to disk and send requested data back to the PCI card

This software will provide the video control user experience

Ideally there would be a GUI to allow for advanced broadcast manipulation

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Data Re-encoding

Data will be passed back to the card, encoded into an analog signal, mixed and then sent as a composite NTSC signal to the Television.

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The End