© 2002

Digital Video Processor & Applications

Digital Video Processor & Applications

-. Super Noise Reducer-. Digital Image Stabilizer-. Motion Tracer

-. Super Noise Reducer-. Digital Image Stabilizer-. Motion Tracer

DVP SystemDVP System

Digital ImageProcessor

& MCU core

DAC(ADV7xxx)

Encoder(ks0123)

SDRAMSDRAMSDRAM

EPLD(EP1S20)

Video Decoder

K4S281632C(128M)

8bitRGB

8bitYUV

SDRAMSDRAM

mouse

K4S281632C(128M)System Board

PC

CCD SensorVideo Monitor

2

DVP Logic moduleDVP Logic module

3

TimingGenerator

SDRAMController

FRC

ImageProcessor

Pre-Process

ODM

Output Driver

Image Analysis

Host/MouseInterface

YUV Digital Video signal

YUV Digital Video

RGBDigital

1. Super Noise Reducer1. Super Noise Reducer

Restored imageNoise image (gaussian 0.3)

4

1. Super Noise Reducer1. Super Noise ReducerRemoving picture noise − 3-D Time based processing− Adaptive Motion compensation

Free from Ghost effectEffect of Disk Saving in using DVR

5

2. Digital Image Stabilizer2. Digital Image Stabilizer

Stabilized imageMotion blurred image

6

2. Digital Image Stabilizer2. Digital Image StabilizerMotion Detection from Moving ImageImage Stabilizing

-. Frame Memory Control-. Adaptive motion evaluation

Effect of Anti-Vibration of Video ImageEffect of Disk Saving in using DVRDigital Image Scaling : 256 steps

7

3. Motion Tracer3. Motion Tracer

Segmentation & Laveling Target Identification

Image DifferentiationOriginal Image (1/2)

8

3. Motion Tracer3. Motion TracerMoving Object Detection− Temporal Difference− Image segmentation & Labeling

Motion AnalyzerTarget Tracking for security application

9

4. Image Analyzer4. Image Analyzer

Input Image

Vector Scope Waveform Editor

10

4. Image Analyzer4. Image AnalyzerFunction of Waveform MonitorFunction of Vector ScopeFunction of Histogram Analyzer

11

System ConfigurationSystem Configuration

General I/O- Input : (NTSC/PAL) - Output : (NTSC/PAL) / RGB Sync- Video Decoder : S5D2650- Video Decoder : AD7170- Mouse : PS2- SXGA : 3ch DAC- Frame buffer : SDRAM (128Mbit x 3ea)

12

System Specification (FPGA)System Specification (FPGA)

ITEM etc

Main Processor 1S20F672C7 Stratix

Ext. Frequency max 80MHz DAC Output

Int. Frequency Max 104MHz TG control

Logic Cell 15K

Memory ~100Kbit

Enhanced PLL 2

13