digital system design lecture 3: asic designce.sharif.ir/courses/83-84/2/111/resources/root/cad/3-...

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Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi [email protected]

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Page 1: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Digital System DesignLecture 3: ASIC Design

Amir Masoud [email protected]

Page 2: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 2

Table of Contents

Microelectronic IndustryRapid PrototypingASIC Design

Page 3: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 3

Microelectronics Market

Primary MarketInformation SystemsTelecommunicationsConsumer

Secondary MarketSystems (e.g. Transportation)Manufacturing (e.g. Robots)

Page 4: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 4

Electronic MarketSystems

Electronic Sub-Systems

Integrates Circuits

EDA

Page 5: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 5

Trends in Microelectronics

Improvement in Device TechnologySmaller CircuitsHigher PerformanceMore Devices on a Chip

Higher Degree of IntegrationMore Complex SystemsLower CostHigher Reliability

Page 6: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 6

Moore’s LawEvery 18 Months:

Gate Count DoublesFrequency Increases 50%

Page 7: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 7

Integration-Scale Limitations

Intrinsic physical scaling limitsCapital investment for fabrication

Use of appropriate design styles

Large-scale design managementUse of CAD tools for design

Page 8: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 8

Microelectronic Design Problems

Use most recent technologiesHigher performance

Reduce design costLower price

Speedup design timeShorten time-to-market

Page 9: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 9

Rapid Prototyping

Prototype:The original or model on which something is based or formedSomething that serves as an example of its kind

Rapid:Occurring within a short timeHappening Speedily

Page 10: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 10

Why Rapid Prototyping?Avoid high non-recurring engineering (NRE) costsAvoid long construction time for "real" systemReduced time allowed from concept to productCan quickly react to changing customer environment or requirementsSystems are too complex to simulate real-world operation in "bounded" time (need to build to test)Customers won’t put up with unreliable productsSometimes the prototype is the product

Page 11: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 11

Why Not Rapid Prototyping?Not the same performance as final product (slower)Not the same size as final product (bigger or more ICs required)Prototype more expensive than final production unitMore design time required to complete engineering of both prototype and final system

Page 12: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 12

VLSI Market

ASIC

Application Specific

Integrated Circuits

ASSP

Application Specific

Standard Part

Standard (Commodity) Part

Page 13: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 13

Implementation Technologies

Page 14: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 14

ASIC

Dedicated to single function, or limited range of functionsNot ASIC:

CPUs, MicroprocessorsMemories: DRAM, SRAM, ROM, …Standard Components (e.g. 74 Series)

ASIC:Toy ChipsMpeg Decoder/Encoder ICsDSP Processors

Page 15: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 15

Design Aspects

Shorter product life-timeShorter time-to-marketMore parallel design flowBetter communication between different design groups

Page 16: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 16

Design Aspects (cont.)

More complex systemsMore efficient design methods need to be usedDesign automation is a necessityMore tool-dependant design and optimizationMore difficult to ensure correct functionality

Page 17: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 17

Design Aspects (cont.)

Not fixed system specification when starting the design entry

More emphasis on high level design aspectsFlexible and very rapid design flowEasy testability through the whole design flow

Page 18: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 18

Structures ASIC Design

Hierarchy: Subdivide the design into many levels of sub-modulesRegularity: Subdivide to max number of similar sub-modules at each levelModularity: Define sub-modules unambiguously & well defined interfacesLocality: Max local connections, keeping critical paths within module boundaries

Page 19: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 19

ASIC vs. Standard ICStandard IC

Typically low component costParts available off the shelfLow or insignificant IC design costProven component reliabilityMultiple sourcingSystem house not required to have in-house experts in chip design

ASICGood security of intellectual propertyOptimum system designRelatively efficient use of board space (smaller systems)Reliability enhanced at system level (fewer components)Performance may be better than comparable standard ICs (unique features and lower power consumption)Possibility to optimize component costDesign cost is high and design cycle is long

Page 20: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 20

ASICs

AdvantagesEfficient use of board space (lower final system cost)Product securityUnique features and fine-tuning the productOptimized system performance

DisadvantagesPotential for design failureNot off-the-shelf available (specification, design, testing and documentation phases are needed)High unit cost of IC (higher initial costs of development)

Page 21: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 21

Types of ASIC

Full CustomSemi Custom

Cell basedGate Array

Programmable LogicFPGA (Field Programmable Gate Array)PLD (Programmable Logic Device)

Page 22: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 22

Full Custom ASICs

Some (or all) logic cells are customizedDemands longer design cycle

All mask layers are customizedInvolves an implementation of a completely new chipDesigner must be an expert in VLSI designIt is used when:

existing cell libraries are not fast enoughlogic cells not small enough or consume too much powertechnology migration (mixed-mode design)

Page 23: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 23

Examples of Full Custom ICs

Analog (e.g. Sensor, Actuator)Mixed Analog/Digital (e.g. Telecommunication)High Voltage (e.g. Automobile)Low Power (e.g. PDA, Mobile)

Page 24: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 24

Cell Based ASICsUse predesigned logic cells (standard cells) in combination with larger cells (megacells)Standard Cells

Primitive Gates (and, or, …)MultiplexersRegisters

Mega cells (full-custom blocks, system-level macros, fixed blocks, cores, functional standard blocks, or IP)

Microcontrollers, Microprocessor, MPEG decoderRAM, ROM

Page 25: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 25

Cell Based ASICs (cont.)

Designers save time, money, and reduce riskEach standard cell can be optimized individuallyAll mask layers are customizedCustom blocks can be embedded

Page 26: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 26

Gate Array Based ASICs

Gate array (or prediffused array)Transistors are predefined on the silicon waferBase array: the predefined pattern of transistorsBase cell: the smallest element that is replicated to make the base array

Masked gate array (MGA)Only the top few layers of metal are defined by the designer using custom masksThe designer chooses from a gate-array library of predesigned logic cells (macros)

Types of MGA ASICsChanneled gate arraysChannel-less gate arraysStructured gate arrays

Page 27: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 27

Channeled Gate Array

Only the interconnect is customizedThe interconnect uses predefined spaces between rows of base cells

Page 28: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 28

Channel-less Gate Arrays

Also known as sea-of-gate (SOG)only some mask layers are customized- the interconnect

Page 29: Digital System Design Lecture 3: ASIC Designce.sharif.ir/courses/83-84/2/111/resources/root/CAD/3- ASICDesign.pdf · Digital System Design Lecture 3: ASIC Design Amir Masoud Gharehbaghi

Sharif University of Technology 29

Structured Gate Array

Combine some of the features of CBICs (Cell-Based ICs) and MGAsOnly the interconnect is customizedCustom blocks can be embedded