digital logic design-ch3 2007 -...
TRANSCRIPT
Chapter 3 1
Chapter 3
3.1 Simplification of Boolean Functions
• Easy method: Use pictorial form of a truth
table
– Karnaugh map
• Diagram of squares
• Each square has a minterm
• The map is a visual representation of a way a
function can be expressed
Chapter 3 2
• Any two adjacent squares differ by one
variable (primed in one unprimed in the other)
• The different variable is removed
• F = x’y + xy =
1) How do we represent this row? ->
x’
2) Another way is to use boolean
algebra x’(y+y’) = x’
Chapter 3 3
• 3-variable map
• Example: Simplify F = x’yz + x’yz’ + xy’z’ + xy’z
– Show the 1’s
– Enclose adjacent 1’s (power of 2)
Chapter 3 4
• Example 2
– Simplify F = x’yz + xy’z’ + xyz + xyz’
F =
Consider m0+m2+m4+m6
Q: What happens if we have all 8
squares combined?
A: Function is always equal to 1.
Chapter 3 5
• Example 3
– Simplify F = x’z + x’y + xy’z + yz
Chapter 3 6
• 4-variable map
• Example– Simplify F = A’B’C’ + B’CD’ + A’BCD’ + ABC’
Chapter 3 7
• Ensure all terms are covered
• Do not forget that it is necessary to minimize
the # of terms
• F =
• F =
• Essential Prime Implicants
Choosing adjacent squares
Σ(0,2,3,5,7,8,9,10,11,13,15)
Chapter 3 8
F =
• Product of sums
– Simplify F(A,B,C,D) = Σ(0,1,2,5,8,9,10)
– If we combine the 0’s: F’ =
Or (DeMorgan): F =
- Previous example: sum of products was used
Chapter 3 9
3.2 Don’t care conditions
• 4-bit binary code for decimal digits has 6
unused combinations
– There are applications in which we don’t care
what the value of the function is in these cases.
– These don’t care conditions may be used to
further simplify a boolean expression.
• Example: Simplify F(w,x,y,z) = Σ(1,3,7,11,15)
– Don’t care conditions: d(w,x,y,z) = Σ(0,2,5)
• To distinguish the don’t care conditions from the 0’s
and 1’s we use an X.
Chapter 3 10
• If we combine the m5 (=x) with the 1’s, then
• If we combine the 0’s, then
Chapter 3 11
3.3 NAND & NOR GATES
• NAND: Universal gate (any digital circuit can
be implemented using only NAND gates)
• We just have to show that AND, OR and NOT
can be implemented with NANDs
Chapter 3 12
• Implementation of F = AB + C with NAND gates
– Method 1:
– Method 2:
Chapter 3 13
• Logic operations with NOR Gates
Chapter 3 14
• Exclusive-OR
– x ⊕ y = x’y + xy’
Chapter 3 15
• Exclusive-OR
– x ⊕ y = x’y + xy’
Chapter 3 16
Example: Design a 3-bit even parity generator
Chapter 3 17
Example: Design a Parity Error Checker