1

|

LIST OF EXPERIMENTS:

CYCLE: I

1. TTL & CMOS characteristics (7400, CD4001)

2. Interfacing of TTL & electromagnetic relay using transistor, opto-coupler (4N33) &

Darlington arrays (ULN2803).

3. Logic family interconnection (TTL to CMOS & CMOS to TTL)

4. Design of half adder & full adder using gates.

5. Adders, Subtractors & Multipliers (Barrel shifter).

6. Design and testing of ripple & synchronous counters using JK flip flops (7473, 7476)

7. Counters using shift registers (Ring counter & Johnson counter).

CYCLE: II

1. Logic design using multiplexers (74150).

2. Logic design using decoders (74138).

3. Design of 7 segment display circuits-static/dynamic (7447, FND542).

4. PRBS generator.

5. Basic gates using VERILOG.

6. Half adder & full adder using VERILOG.

7. Multiplexer & demultiplexer using VERILOG.

8. Decoder & encoder using VERILOG.

STUDY EXPERIMENTS:

1. Study of counter ICs (7490, 74190).

2. Introduction to CAD and VERILOG HDL

HANDOUT PROBLEMS:

1. Design of astable & mono-stable multi-vibrators using gates.

2. Design of mono-shots using dedicated ICs (74123).

SYSTEM DESIGN:

1. Traffic light controller using FSM.

2

|

OBJECTIVES:

To understand how logic expressions express an output as a function of various inputs.

To Implement a circuit from a truth-table or logic function

To Understand the function, purpose, and representation of a multiplexer

To Design a simple circuit logic circuit using logic gates and multiplexers.

To Design multiple bit adders, Subtractors & multipliers

Analyze and Implement an Master/Slave Flip-Flop, D Flip-Flop, T Flip-Flop

To study and design counters & shift registers

Understand the Verilog module as a hierarchical construct for describing logic circuits.

Understand the requirements of input and output signals in a Verilog module.

Represent hierarchical combinational logic systems by interconnecting “instances” of

other modules.

To study about FPGAs and synthesis tools.

3

|

4

|

BASICS:

Some information is intrinsically digital, so it is natural to process and manipulate it

using purely digital techniques. Examples are numbers and words.

The explosion in digital techniques and technology has been made possible by the

incredible increase in the density of digital circuitry, its robust performance, its relatively

low cost, and its speed.

This circuitry is based upon the transistor, which can be operated as a switch with two

states. Hence, the digital information is intrinsically binary. So in practice, the terms

digital and binary are used interchangeably.

BINARY LOGIC STATES: The following table attempts to make correspondences between conventions for defining

binary logic states.

In the case of the TTL logic gates we will be using in the lab, the Low voltage state is

roughly 0-1 Volt and the High state is roughly 2:5-5 Volts.

The convention for naming these states is illustrated in Fig. 1. The “positive true" case is

illustrated. The labeled voltage is High (Low) when the label’s stated function is True (False). In

the figure, the stated function is certainly true (switch open), and this does correspond to a high

voltage at the labeled point.

5

|

LOGIC SIGNAL VOLTAGE LEVELS: TTL gates operate on a nominal power supply voltage of 5V, +/- 2.5V. Ideally a TTL

“high” signal would be 5V exactly and TTL “low” signal 0.0V exactly.

However real TTL gates cannot output such perfect voltage levels and are designed to

accept “high” and “low” signals deviating substantially from these ideal values.

“Acceptable” input signal voltages ranges from 0 to 0.8 volts for “low” logic state and 2

to 5 Volts for “high” logic state.

6

|

S.No DO’S DON’TS

1 Be regular to the lab Do not exceed the voltage rating

2 Follow proper dress code Do not interchange the ICs while doing the experiment

3 Maintain silence Avoid loose connections and short circuits

4 Identify the leads or pins of the IC before making connection

Do not throw the connecting wires to floor

5 Know the biasing voltage required for different families of IC and connect the supply properly

Do not come late to the lab

6 Know the current & voltage rating of the IC before using them in the experiment

Do not panic if you don’t get the output

7 Handle the IC trainer kit properly, Arrange the stools while leaving the lab

Do not forget the theory of the experiment before coming to the lab

EXPERIMENT NO: 1 DATE:

7

|

TTL AND CMOS CHARACTERISTICS

AIM:

To study the characteristics of TTL & CMOS ICs and to verify the truth table of basic gates

using IC74xx and ICCD40xx.

COMPONENTS REQUIRED:

1. Basic gate TTL & CMOS ICs

2. Bred board

3. Wires

4. LEDs

5. Power supply

THEORY:

LOGIC GATES:

In digital electronics, a gate is a logic circuit with one output and one or more inputs. Logic gates

are available as integrated circuits (ICs).

AND GATE:

The AND gate performs logical multiplication, more commonly known as AND function.

The AND gate output will be in high state when all the inputs are in high state. 7408 is a

digital IC in TTL family which contains four AND gates. For this reason, it is called quad two

input AND gate. Every AND gate has two inputs in this dual-in-line package (DIP). Pin 14 is the

supply pin. For TTL devices to work properly, the supply voltage level must be between +4.75 V

and +5.25 V. This is why +5 V is the nominal supply voltage specified for all TTL devices. Pin 7

is a common ground for the chip. The other pins are for inputs and outputs.

OR GATE:

It performs logical addition. Its output will become high if any of the inputs is in logic

high. 7432 is a quad two input OR gate.

NOT GATE:

It performs a basic logic function called inversion or complementation. The purpose of

the inverter is to change one logic level to opposite level. IC 7404 is a hex inverter (means six

inverters in the DIP).

NAND GATE:

8

|

A NOT gate following an AND gate is called NOT-AND or NAND gate. Its output will

be low if all the inputs are in high state. 7400 IC is a quad two input NAND gate.

NOR GATE:

A NOT gate following an OR gate is called NOT-OR or NOR gate. Its output will be

low if all the inputs are in high state. 7402 IC is a quad two input NOR gate.

EXOR GATE:

Its output will be high if and only if one input is in high state.7486 is a quad two input

EXOR gate.

PROCEDURE:

Test all the components and IC packages using a digital IC tester. Also assure whether

the connecting wires are in good condition by checking for the continuity using a

Multimeter or a trainer kit.

Continuity of wires can be tested using a trainer kit by shorting a 5 V supply in the trainer

to an LED of the panel. If wires are good, LED will glow.

Verify the dual-in-line package (DIP) pin out of the IC before feeding the inputs.

Set up the logic circuit as per the diagram.

Supply the necessary input combinations as per the truth table.

Connect the LED at the output terminal of the corresponding IC and check the output.

If the output matches with the truth table, make observations and stop, else analyze the

bug and repeat the steps.

Measure the High and Low values of TTL & CMOS ICs with multimeter and record the

same.

AND GATE:

9

|

OR GATE:

NOT GATE:

10

|

NAND GATE:

NOR GATE:

11

|

EX-OR GATE:

CMOS NAND GATE:

12

|

CMOS NOR GATE:

RESULT:

EXPERIMENT NO: 4 DATE:

13

|

DESIGN OF HALF ADDER AND FULL ADDER

AIM:

To realize half adder and full adder using xor gate and basic gates.

COMPONENTS REQUIRED:

1. Basic gate TTL ICs (IC 7486, IC 7432, IC 7408, IC 7400

2. Bred board

3. Wires

4. LEDs

5. Power supply

THEORY:

Half Adder: A half adder is a combinational circuit that performs the sum of two binary digits

(A, B) to give a maximum of two binary outputs namely the sum(S) and the carry(C). Carry is

the higher order bit and the sum is the lower order bit of the output. The Boolean expression for

the sum(S) and carry(C) of half adder is,

S = A ⊕ B C= AB

Full Adder: A full adder is a combinational circuit that performs the sum of three binary

digits(A, B, Cin) to give a maximum of two binary outputs namely the sum(S) and the carry- out

(Cout).The full adder becomes necessary when a carry input must be added to the two binary

digits to obtain the correct sum. A half adder has no input for carries from previous circuits. The

Boolean expression for the sum (S) and carry-out (Cout) of full adder is,

S = A ⊕ B ⊕ Cin Cout = AB + ACin + BCin

PROCEDURE:

Verify the gates

Make the connections as per the circuit diagram.

Switch on VCC and apply various combinations of inputs according to truth table.

Note down the output readings of sum and the carry bit for different combinations of

inputs.

14

|

15

|

HALF ADDER:

K-MAP FOR SUM: K-MAP FOR CARRY:

FULL ADDER:

K-MAP FOR SUM: K-MAP FOR CARRY

RESULT:

16

|