digital e chap 4
DESCRIPTION
digital design for diploma studentsTRANSCRIPT
DIGITAL ELECTRONICSCHAPTER 4
DEE 204
DIGITAL ELECTRONICSFunction of sequential logic
Sequential logic.Latches: gated SR and D latchEdge-triggered S-R latch.Edge-trigged D-type latches.Toggle flip-flop.Asynchronous counters, registers.State machines.
FUNCTION OF SEQUENTIAL LOGICSequential logic
- Many applications require digital outputs to be generated in accordance with the sequence of input signals reception
- Require outputs to be generated dependent on past history of inputs and not the present input alone
- Information stored in memory elements define present state of sequential circuit
FUNCTION OF SEQUENTIAL LOGIC
Sequential logic
FUNCTION OF SEQUENTIAL LOGIC
FUNCTION OF SEQUENTIAL LOGIC
FUNCTION OF SEQUENTIAL LOGICLatches:
- a type of temporary storage device that has two stable states- similar to flip-flops that can reside in either of the two states using feedback arrangements
S-R Latch: a type of bistable device or multivibrator, either active-HIGH or active-LOW
FUNCTION OF SEQUENTIAL LOGICS-R Latch: - Can be constructed from either two
NAND (active-LOW) gates or two NOR (active-HIGH) gates
FUNCTION OF SEQUENTIAL LOGICS-R Latch: - For SR latch using NOR gates
FUNCTION OF SEQUENTIAL LOGICS-R Latch: - For SR latch using NOR gates
FUNCTION OF SEQUENTIAL LOGICS-R Latch: - For SR latch using NAND gates
FUNCTION OF SEQUENTIAL LOGICS-R Latch: - For SR latch using NAND gates
FUNCTION OF SEQUENTIAL LOGICS-R Latch: Truth table
NOR gate latchNAND gate latch
FUNCTION OF SEQUENTIAL LOGIC
• Example:For a given waveform, sketch the output waveform of an active-LOW SR latch.
S
R
FUNCTION OF SEQUENTIAL LOGIC
• Solution:
FUNCTION OF SEQUENTIAL LOGICLatches: gated S-R- Requires an enable input, EN- S and R inputs control the state to
which the latch will go when a HIGH is fed to EN
- Latch will not change until EN is HIGH, but as it remains HIGH, output is controlled by S and R inputs
- The invalid state is when both S and R are simultaneously HIGH
FUNCTION OF SEQUENTIAL LOGIC
Latches: gated S-R
FUNCTION OF SEQUENTIAL LOGICLatches: gated S-R truth table
FUNCTION OF SEQUENTIAL LOGICLatches: gated S-RExample:Determine the output waveform of a gated SR latch
for the given inputs
FUNCTION OF SEQUENTIAL LOGICLatches: gated S-RSolution:
FUNCTION OF SEQUENTIAL LOGIC
• Gated D latch- has only one input apart from EN called D (data) input- when D input is HIGH and EN input is HIGH the latch will set- when D input is LOW and EN is HIGH the latch will reset
FUNCTION OF SEQUENTIAL LOGIC• Gated D latch
FUNCTION OF SEQUENTIAL LOGIC• Gated D latch
Example:Determine the output waveform of a gated D latch for the given input
FUNCTION OF SEQUENTIAL LOGIC• Gated D latch
Solution:
FUNCTION OF SEQUENTIAL LOGIC
Edge triggered latches- Known as flip-flops- Synchronous bistable multivibrators- Output changes state only at a specified point
on the triggering input called the clock (CLK)- CLK acts as C, control input which
synchronizes the changes in the input according to the clock
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered latches (flip-flop)- Changes state either at the positive
edge or negative edge of the clock pulse
- Positive edge-triggered if no bubble at C input, negative edge-triggered if bubble at C input
- The logic symbol shows clock input (C) with small triangle called dynamic input indicator
FUNCTION OF SEQUENTIAL LOGICEdge-triggered S-R latches (S-R flip-flop)- S and R inputs are called synchronous inputs,
data transferred on the triggering edge of the clock pulse
- When S is HIGH and R is LOW, at the triggering edge of the clock pulse the Q output goes HIGH and flip-flop is set
- When S is LOW and R is HIGH, at the triggering edge of the clock pulse the Q output goes LOW and flip-flop is reset
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)- When both S and R are LOW, the output
does not change- When both S and R are HIGH, an invalid
condition existsState change only occurs on the triggering
edge of a clock pulse, either positive (rising) or negative (falling) edge
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)
Logic circuit of positive triggered edge SR flip-flop Truth table
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)- output waveforms for a positive edge
triggered SR flip-flop
FUNCTION OF SEQUENTIAL LOGICEdge-triggered S-R latches (S-R flip-flop)
- operation
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop) – output waveforms of a negative edge triggered SR flip-flop
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)Example:Draw output waveforms of a positive
edge triggered SR flip-flop
FUNCTION OF SEQUENTIAL LOGIC
Edge-triggered S-R latches (S-R flip-flop)Solution:
FUNCTION OF SEQUENTIAL LOGICEdge-trigged D-type latches (D flip-flop)- Used when a single data bit (1 or 0) is to
be stored- Has only one input, D input besides the
clock- If the D input is HIGH, at clock pulse the
flip-flop is set, D input is stored on positive edge of clock pulse
- If the D input is LOW, at clock pulse the flip-flop is reset, D input is stored on leading edge of clock pulse
FUNCTION OF SEQUENTIAL LOGICEdge-trigged D-type latches (D flip-flop)- Is actually a SR flip-flop connected
with an inverter- Logic circuit
FUNCTION OF SEQUENTIAL LOGICEdge-trigged D-type latches (D flip-flop)- Could be either positive or negative
edge triggered- Positive edge triggered: symbol and
truth table
FUNCTION OF SEQUENTIAL LOGIC
• Positive edge triggered: output waveforms
FUNCTION OF SEQUENTIAL LOGICEdge-trigged D-type latches (D flip-flop)- Negative edge triggered: symbol and
truth table
FUNCTION OF SEQUENTIAL LOGICEdge-trigged D-type latches (D flip-flop)- Negative edge triggered: output
waveforms
FUNCTION OF SEQUENTIAL LOGICEdge-Triggered JK Flip-Flop• Versatile and widely
used• Identical to SR flip-flop
functions except it does not have the invalid state
• Made up of 4 NAND gates quite similar to arrangement of SR latches
FUNCTION OF SEQUENTIAL LOGIC
Edge-Triggered JK Flip-Flop: truth-tableINPUTS OUTPUTS
J K CLK Q COMMENTS
0 0 ↑ Q0 No change
0 1 ↑ 0 1 RESET
1 0 ↑ 1 0 SET
1 1 ↑ Q0 Toggle
Q
0Q
0Q
FUNCTION OF SEQUENTIAL LOGIC
• Example: waveform
FUNCTION OF SEQUENTIAL LOGICToggle flip-flop- Also known as T flip-flop - Modification of JK flip-flop: obtained
from a JK flip-flop, connecting both inputs J and K together
- When T = 0, both AND gates disabled, no change in output
- When T = 1, output toggles
FUNCTION OF SEQUENTIAL LOGICToggle flip-flop: logic circuit
FUNCTION OF SEQUENTIAL LOGICToggle flip-flop: symbol and truth table
FUNCTION OF SEQUENTIAL LOGICToggle flip-flop: output waveformsExample:Determine the output waveform of a toggle
flip-flop for the given input waveform assuming initial Q state is reset
FUNCTION OF SEQUENTIAL LOGICToggle flip-flop: output waveformsSolution:
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters- Counters: measure time interval between
two unknown time instants- Flip-flops not to make state changes
simultaneously (at the same time)- Do not have the common clock pulse
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters- Logic symbol of asynchronous 2-bit
counters
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters: waveforms of
2-bit counter
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters- Logic symbol of asynchronous 3-bit
counters
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters: waveforms of
3-bit counter
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters- Logic symbol of asynchronous 4-bit
counters
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters: waveforms of 4-bit
counter
FUNCTION OF SEQUENTIAL LOGIC
Asynchronous counters- Logic symbol of asynchronous 3-bit
up/down counters
FUNCTION OF SEQUENTIAL LOGIC
Asynchronous counters- Logic symbol of asynchronous 3-bit
up/down counters: output waveform
FUNCTION OF SEQUENTIAL LOGIC
Asynchronous counters
- Logic symbol of asynchronous 3-bit up/down counters: output waveform
FUNCTION OF SEQUENTIAL LOGICAsynchronous counters: logic diagram
of decade counter
FUNCTION OF SEQUENTIAL LOGICAsynchronous registersRegister:- In the MSI sequential logic circuit category- A group of cascaded flip-flops for temporary
binary information storing - Does not have a common clock pulse- Usually available in integrated circuits or
microprocessors- Used for temporary storage of data to be fed
from a digital circuit to another digital circuit
FUNCTION OF SEQUENTIAL LOGICState machines- A model that simplifies a whole large
digital system- Digital system is viewed as one that
moves in discrete steps from one state to another
- Each transition is determined by the current state it is in
FUNCTION OF SEQUENTIAL LOGICState machines