Digital Consumer Roadshow 2004:

7400 Logic Replacement

The 7400 Series – A Brief History -

• 1960s space program drove development of 7400 series

― Consumed all available devices for internal flight computer

― $1000 / device (1960 dollars)― 10:1 integration improvement over

discrete transistors• 1963 Minuteman missile forced 7400

into mass production― Drove pricing down to $25 / circuit

(1963 dollars)

Success Drives Proliferation

• New families introduced based on ― Higher performance― Lower power― New features― New signaling threshold

19602003

• Spawned over 32 unique families!

Too Much of a Good Thing?

• Families• Packages• Reliability options• Speed grades• Features• Functions

An availability nightmare! >> 500K unique devices

Different Families Don’t all Speak the Same Language

Sometimes Things Get Lost or Added in the Translation*

Different families aren’t always on speaking terms with one another

High Performance3.5ns tPD, fmax 303Mhz

Improved features

Low Cost0.18µ = small die size

Lowest cost packaging

Lowest Power12mW*

~20uA typical stand-by

Storage Systems, Routers Set-Top Box, Cell phone Handheld, Portable Equipment

The Ultimate Solution For 7400 Logic Replacement

Eliminate Availability & Obsolescence Issues

• Over >> 500,000 different 7400 devices addressed in one package!― Nothing needs to get “lost or added in the translation”

• AND Additional features for free― EMI management, system clocking, reprogrammability,

design security….

Driving Down Costs Through Process Technology

Feat

ure

Size

(mic

ron)

0.35

0.25

0.18

0.13

0.10

0.071999 2000 2001 2002 2003 2004

CPLDs

CPLD Vs. Discrete 7400 Total Product Cost

CPLD1985

Discrete CPLD2003

Discrete

Die Cost Test Cost Package Cost

1000 % Reduction in die cost throughsemiconductor process technology

CPLD2003

Discrete

Die Cost Test Cost Package Cost

Equivalent to > 8Discrete TTL Devices

8

• More:― Logic― Features― Performance― Security― Flexibility

• For Less― Price― Board Area― Power― EMI

Xilinx CPLDs Offer More for Less

These are the fundamentals behind the death of the 7400 series…

The CPLD Cost Advantage

CPLD Price Advantage

Device Cost Comparison 7400 vs. CPLD

Cost Advantage Case Study- PVR -

ICs Inside the Box

Clock

DiscreteLogic

µP control

Buffers/Drivers

Peripheral

BOM Analysis

Buffers/

Drivers

Discrete Logic

Watchdog Timer

Peripheral - UART

Low Power, Low Cost

Additional Logic, IO and

System Resources

Discrete components cost: $5.73XC2C128 - $4.60Saved: $1.13

7400 Replacement Solution

Save $1.13

Reducing the Overall BOMSo

lutio

n C

ost

$0.91

Standard Solutions

Discrete Logic Chips $0.91*

Watchdog Timer $1.05*

Coolrunner-II Solution

$4.60

UART $2.20*

Buffers / Drivers

$2.57*

$1.96

$3.16

$5.73

XC2C128VQ100C

250KU Pricing

* High-volume pricing estimate

Additional features using

Programmable Logic for FREE !!

Additional features using

Programmable Logic for FREE !!Re-programmability

Performance

Power Savings

Additional Logic

Time-to-market

Board Area

Additional Memory

Additional I/O

Cost Advantage Case StudyInstrumentation

(1) (2)(2)(2) (2)(1)

Cost Advantage Case StudyGPS PDA

(4)

(1)

(1)

(1)

CoolRunner-II Changes the Equation

• Lower cost, higher integration than 7400 TTL• Additional features that manage real world issues

― EMI ― System clocking ― Design security― Obsolescence / availability ― Reduced test costs― External interfacing components eliminated ― In field bug fixes, upgrades, changes

Managing EMI CoolRunner-II Benefits

• Typically considered “black magic”• Significant TTM impact to achieve compliance

― Board spins, test time etc.

• CoolRunner-II features and integration benefits address EMI

― Programmable drive strength, I/O signaling, programmable ground, programmable slew rate, PLLs

CoolRunner-IIDesign Security

• 7400 series has no inherent means to thwart reverse engineering

― Remove device marking?• CoolRunner-II

― Programmable bit stream security― Prevents both over-writing or readback― Four levels of on-chip-security― Tampering causes device to

automatically lock down

Reduced Test Costs

• CPLD integration reduces “bed of nails” test time ― Reduced points to interrogate

• Reduced device count significantly increases FITs― Mis-aligned / wrong part placement― Soldering failure

• CoolRunner-II JTAG test port – “free” allows for PCB testing― Inherent programmability provides 100% test coverage

CoolRunner-IISimplified Interfacing

• Additional components for interfacing disparate 7400 logic families ― Pull up resistors etc.

• Additional components typically required to communicate with interface logic― Bus transceivers, high performance memory interfaces, slow slew rate

signaling• CoolRunner-II programmable I/O eliminates need for external

interface devices― Programmable HSTL, SSTL, Schmitt Trigger etc.― Considerable board area and cost savings!

The Ultimate Advantage- Reprogrammability -

• CoolRunner-II CPLDs can be programmed at any phase of product life-cycle― Prototyping, field trials, and in market

The World of TTL

Logic Cell Estimation Errors

X X

X

XXX

X

1 Macrocell Utilized vs. Four

• Unused Gates in Package• Synthesized to 1 Macrocell

Unused Logic Device Functionality

Logic Cell Estimator Guarantees that Results will be as Good or Better than Estimated Savings Value