differential and multistage amplifiers
DESCRIPTION
Differential and Multistage Amplifiers. Examples: BJT Differential Pair Small Signal Model Biasing Current Mirror. HW due Friday (10/18) 6.39,6.61,6.71,6.80. Example:. For BJT differential pair configureation, find v d such that:. i C1 =99% I i C1 =95% I i C1 =9 i C2. - PowerPoint PPT PresentationTRANSCRIPT
October 15, 20021
EE 359 Electronic Circuits
Differential and Multistage Differential and Multistage AmplifiersAmplifiers
Examples:
BJT Differential Pair
Small Signal Model
Biasing
Current Mirror
October 15, 20022
EE 359 Electronic Circuits
• HW due Friday (10/18)
• 6.39,6.61,6.71,6.80
October 15, 20023
EE 359 Electronic Circuits
Example: For BJT differential pair configureation, find vd such that:
a) iC1=99% I
b) iC1=95% I
c) iC1=9 iC2
October 15, 20024
EE 359 Electronic Circuits
Use equivalenceFor 100, iC=iE,
a)
b)
c)
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Tbb
TbTb
VVVVVE
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VVSE
VVSE
e
I
e
Ii
e
IiIii
eIieIi
//)(2
/)(121
/2
/1
11
1
,
21
12
21
mVVVv
e
eIii
TTd
Vv
VvEC
Td
Td
115595.4)0101.0ln(
0101.0199.0/1
99.01
199.0
/
/22
mVVVv
eIii
TTd
VvEC
Td
7494.2)0526.0ln(
0526.0195.0/195.0 /11
mVVVv
eIiiii
TTd
VvEECC
Td
5520.2)1.0ln(
1.019.0/110/999 /2121
October 15, 20025
EE 359 Electronic Circuits
Biasing in BJT Integrated Ckts
•For what value of would current mirror have a gain error 1%, 0.1 %
• Imperfection due to base current diverted from reference current IREF
October 15, 20026
EE 359 Electronic Circuits
Effect of on BJT Curr. Mirror
/21
1
2
1
2
1
REF
O
EREF
EO
I
I
Ii
Ii
/21 REF
O
II
•Analysis of the current mirror taking into account the finite of the BJTs
998999.02
9899.02
October 15, 20027
EE 359 Electronic Circuits
Current Steering Circuits
•Generation of a number of cross currents
Q5 and Q6 in parallel, combination forms mirror with Q1. I3=2IREF
Q4 forms mirror with Q2.
R
VVVVI BEEBEECE
REF21
October 15, 20028
EE 359 Electronic Circuits
A current mirror with base-current compensation.
Improve dependence of I0 on why?•Error in mirror gain ckt as a result•How? Q3’s emitter supplies base currents of Q1 and Q2
EO
EREF
II
II
1
)1(
2
1 2
October 15, 20029
EE 359 Electronic Circuits
The Wilson current mirror.
332
32
2
2
2
2
3
2
2
3
3
2
112222111
2222
2232
2112113
333
3
2
)1(21
1
112
11
1
2
1
1
1)1()1(
)1(
)1(
11
REF
O
BBBEBE
BEC
BBREFC
BBBBEE
BEO
B
I
I
iiiiii
iii
iiii
iiiiii
iii
i
By adjusting we can set output current to be a closer to IREF
October 15, 200210
EE 359 Electronic Circuits
Wilson current mirror features
a) Q1 is diode connected, 1 does not matter
b) Q2 with low 2, increases IO
c) For high 3, , IO increases
d) If one uses, 1= and 2=(1-k) and
3=(1+k) where k=1/2, IO equals IREF
October 15, 200211
EE 359 Electronic Circuits
The Widlar current source.
Emitter resistance added to current mirror
O
REFTEO
O
REFTBEBE
S
OTBE
S
REFTBE
EOBEBE
I
IVRI
I
IVVV
I
IVV
I
IVV
RIVV
ln
ln
ln,ln
21
21
21
October 15, 200212
EE 359 Electronic Circuits
Example 6.2
• For constant current IO=10uA, determine values of resistors in collector (and emitter for Widlar source). Let VBE=0.7V at 1mA.
• current source ckt:
• Widlar ckt:
kA
R
VmA
AVV TBE
94210
58.010
58.01
10ln7.0
1
1
kR
A
mARx
kR mA
5.11
10
1ln025.01010
3.9
3
36
17.010
2
October 15, 200213
EE 359 Electronic Circuits
Example 6.3/ Opamp Ckt.
DC analysis shown on fig.
(start w/ Q9)
•Rid
•Av
•RO
October 15, 200214
EE 359 Electronic Circuits
Method
• For input resistance look at 1st stage.
• 1st stage gain, consider input resistance of second stage.
kR
kxrr
rr
rrR
id
ee
id
25
1.10100101
10025.0
25
21
21
21
kxrrrr
VVrr
RRR
v
vA
ee
ee
i
id
53.225101,25
/4.22)(||
5454
21
212011
October 15, 200215
EE 359 Electronic Circuits
A differential amplifier with an active load.
Load is Q3 and Q4
2000
2/)2/(
2/
|| 0402
T
Aom
omvodmo
oo
o
V
Vrg
rgArvgv
rR
rrR
October 15, 200216
EE 359 Electronic Circuits
Small-signal model of the differential amplifier
October 15, 200217
EE 359 Electronic Circuits
The differential form of the cascode amplifier
Cascode amp. differential half circuit.
October 15, 200218
EE 359 Electronic Circuits
•A cascode differential amplifier with a Wilson current-mirror active load
October 15, 200219
EE 359 Electronic Circuits
MOSFET differential pair.
October 15, 200220
EE 359 Electronic Circuits
Normalized plots of the currents in a MOSFET differential pair. Note that VGS is the gate-to-source voltage when the drain current is
equal to the dc bias current (I/2).
MOSFET differential pair
October 15, 200221
EE 359 Electronic Circuits
(a) basic, (b) cascode, (c) Wilson, (d) modified Wilson.
MOS current mirrors
October 15, 200222
EE 359 Electronic Circuits
(a) bipolar; (b) MOS; (c) BiCMOS obtained by cascoding Q1 with a
BJT, Q2; (d) BiCMOS
double cascode.
Basic active-loaded amplifier stages
October 15, 200223
EE 359 Electronic Circuits
Voltage gain of the active-loaded common-source amplifier versus the bias current ID. Outside the subthreshold region, nCox = 20 A/V2,
= 0.05 V-1, L = 2 m and W = 20 m.