differential amplifier

5/26/2018 Differential Amplifier

1/33

7. Differential Amplifiers

ECE 102, Fall 2012, F. Najmabadi

Sedra & Smith Sec. 2.1.3 and Sec. 8 (MOS Portion)

(S&S 5thEd: Sec. 2.1.3 and Sec. 7 MOS Portion &

ignore frequency-response)


2/33

F. Najmabadi, ECE102, Fall 2012 (2/33)

Common-Mode and Differential-Mode

Signals & Gain


3/33

Differential and Common-Mode Signals/Gain


Consider a linear circuit

with TWO inputs

2211 vAvAvo +=

By superposition:

Define:12

vvvd =

2

21

vvvc

+=

Difference (or differential) Mode

Common Mode

Substituting for and in the expression for vo:

2 1d

c

v

vv =

2 2d

c

v

vv +=

( ) dcd

cd

co vAA

vAAv

vAv

vAv

++=

++

=

22212

2121

ddcco vAvAv +=

2

2

2

1

dc

dc

vvv

vvv

+=

=


4/33

Differential and common-mode signal/gain is an

alternative way of finding the system response


2

2

1221

2112

AAA

vvv

AAAvvv

dc

cd

=

+=

+==

2211 vAvAvo += ddcco vAvAv +=

Differential Gain: AdCommon Mode Gain: Ac

Common Mode Rejection Ratio (CMRR)*: |Ad|/|Ac|

* CMRR is usually given in dB: CMRR(dB) = 20 log (|Ad|/|Ac|)

22

2

2

22

11

dcd

c

dcd

c

A

A

A

v

vv

AA

Av

vv

+=+=

==


5/33

To find vo , we can calculate/measure

eitherA1A2pair orAcAd pair


Difference Method (findingAdandAc):

1. Set vc = 0 (or set v1 = 0.5vd&v2 = +0.5vd)

computeAd from vo =Advd2. Set vd = 0 (or set v1 = +vc&v2 = +vc)

computeAc from vo =Acvc3. For any v1 and v2 : vo =Advd + Acvc

Superposition (findingA1andA2):

1. Set v2 = 0, computeA1from

vo =A1v1

2. Set v1 = 0, computeA2from

vo =A2v2

3. For any v1 and v2 :

vo =A1v1 + A2v2

Both methods give the same answer forvo (orAv).

The choice of the method is driven by application:o Easier solution

o

More relevant parameters

)(5.0 2112 vvvvvv cd +==


6/33

Caution


In Chapter 2.1.3, Sedra & Smith definesvd = v2 v1

But in Chapter 8, Sedra & Smith uses vd = v1 v2

While keeping vo = vo2 vo1 as before (this is inconsistent)

21

dc

vvv =

22

dc

vvv +=

21

dc

vvv +=

2

2d

c

vvv =

Here we usevd = v2 v1and vo = vo2 vo1throughout

Therefore, Ad(lecture slides) = Ad(Sedra & Smith) for

difference Amplifiers.

Use Lecture Slides Notation!

21

dc vvv = 2

2d

c vvv +=


7/33


Differential Amplifiers:

Fundamental Properties


8/33

Differential Amplifier


o For now, we keep track of two output, vo1and vo2, because there

are several ways to configure one output from this circuit.

Identical transistors.

Circuit elements are symmetric about the mid-plane.

Identical bias voltages at Q1 & Q2 gates (VG1= VG2).

Signal voltages & currents are different because v1v2.

Load RD: resistor, current-mirror, active load,

RSS: Bias resistor, current

source (current-mirror)

Q1 & Q2 are in CS-like

configuration (input at

the gate, output at the

drain) but with sources

connected to each other.


9/33

Differential Amplifier Bias


ID ID

IDID

2ID

21

21

21

21

DSDSDS

DDD

OVOVOV

GSGSGS

VVV

III

VVV

VVV

==

====

==

SSS

GGG

VVV

VVV

==

==

21

21

and

Since

ooo

mmm

rrr

ggg

====

21

21Also:

This is correct even if channel-length

modulation is included because

2211 DSDDDSDD VRIVRI +=+


10/33

Differential Amplifier Gain


Signal voltages & currents aredifferent because v1v2

We cannot use fundamental

amplifier configuration for

arbitrary values of v1and v2.

We have to replace each NMOS

with its small-signal model.


11/33

Differential Amplifier Gain


0)()(

0)(

0)(

323113233

32322

31311

=

+

+

=+

+

=+

+

vvgvvgr

vv

r

vv

R

v

vvgr

vv

R

v

vvg

r

vv

R

v

mm

o

o

o

o

SS

m

o

o

D

o

m

o

o

D

o

Node Voltage Method:

Node vo1:

Node vo2:

Node v3:

Above three equations should be solved to find vo1 , vo2 and v3(lengthy calculations)

322

311

vvv

vvv

gs

gs

=

=

Because the circuit is symmetric, differential/common-mode

method is the preferred method to solve this circuit (and we

can use fundamental configuration formulas).


12/33

Differential Amplifier Common Mode (1)


Because of summery of

the circuit and input signals*:

Common Mode: Set vd = 0 (or set v1 = +vcand v2 = +vc)

dddoo iiivv === 2121 and

We can solve forvo1by node voltage method

but there is a simpler and more elegant way.

id

idid2id

* If you do not see this, set v1=v2=vcin node equations of the previous slide, subtract the

first two equations to get vo1=vo2. Ohms law on RDthen givesid1=id2=id


13/33



Because of the symmetry, the common-mode circuit breaks into two

identical half-circuits.

id

idid 2id i

d

0

id

*23 SSdRiv =

* Vssis grounded for signal


14/33



oDSSm

Dm

c

o

c

o

rRRg

Rg

v

v

v

v

/2121

++==

CS Amplifiers with Rs

0

The common-mode circuit breaks into two identical half-circuits.


15/33

Differential Amplifier Differential Mode (1)


32

31

5.0

5.0

vvv

vvv

dgs

dgs

+=

=

0)5.0()5.0(

0)5.0(

0)5.0(

33

13233

3322

3311

=+

+

+

=++

+

=++

vvgvvgr

vv

r

vv

R

v

vvgr

vv

R

v

vvgrvv

Rv

dmdmo

o

o

o

SS

dm

o

o

D

o

dm

o

o

D

o

Node Voltage Method:

Node vo1:

Node vo2:

Node v3:

Differential Mode: Set vc = 0 (or set v1 = vd/2 and v2 = +vd/2 )

022

)(11

321 =

++

+ vg

rvv

rR m

o

oo

oD

( ) 02211

321 =

+++ vgrRvvr m

oSS

oo

o

Node vo1+ Node vo2:

Node v3:0

0

3

2121

=

==+

v

vvvv oooo

Only possible solution:


16/33

Differential Amplifier Differential Mode (2)


Because of the symmetry, the differential-mode circuit also breaks into two

identical half-circuits.

21213 and0 ddoo iivvv ===

v3= 0

id id

v3= 0

CS Amplifier

)||(5.0

,)||(5.0

21Dom

d

oDom

d

o Rrgv

vRrg

v

v=

+=

idid

0

id id


17/33

Concept of Half Circuit


Common Mode Differential Mode

For a symmetric circuit, differential- and common-mode

analysis can be performed using half-circuits.


18/33

Common-Mode Half Circuit


id id

id id

0

Common Mode Half-circuit

1. Currents about symmetry line are equal.

2. Voltages about the symmetry line are equal (e.g., vo1= vo2)

3. No current crosses the symmetry line.

21 oo vv =

Common Mode circuit

21 ss vv =


19/33

Differential-Mode Half Circuit


Differential Mode circuit

Differential Mode Half-circuit

1. Currents about the symmetry line are equal in value and opposite in sign.

2. Voltages about the symmetry line are equal in value and opposite in sign.

3. Voltage at the summery line is zero

21 oo vv =

021 == ss vv

id id

id id


20/33

Constructing Half Circuits


Step 1:

Divide ALL elements that cross the symmetry line (e.g., RL) and/or

are located on the symmetry line (current source) such that we

have a symmetric circuit (only wires should cross the symmetry

line, nothing should be located on the symmetry line!)


21/33

Constructing Half Circuit Common Mode


Step 2: Common Mode Half-circuit

1. Currents about symmetry line are equal (e.g., id1= id2).

2. Voltages about the symmetry line are equal (e.g., vo1=vo2).

3. No current crosses the symmetry line.

coco vv ,2,1 =

0


22/33

Constructing Half Circuit Differential Mode


Step 3: Differential Mode Half-Circuit

1. Currents about symmetry line are equal but opposite sign (e.g., id1= id2)

2. Voltages about the symmetry line are equal but opposite sign (e.g., vo1= vo2)

3. Voltage on the symmetry line is zero.

dodo vv ,2,1 =

H lf Ci i k l if h i i i


23/33

Half-Circuit works only if the circuit is

symmetric!


Half circuits for common-mode and differential mode are different.

Bias circuit is similar to Half circuit for common mode.

Not all difference amplifiers are symmetric. Look at the load

carefully!

We can still use half circuit concept if the deviation from prefect

symmetry is small (i.e., if one transistor has RD and the other RD+ RDwith RD


24/33F. Najmabadi, ECE102, Fall 2012 (24/33)

Why are Differential Amplifiers popular?

They are much less sensitive to noise (CMRR >>1).

Biasing: Relatively easy direct coupling of stages:

o Biasing resistor (RSS) does not affect the differential gain

(and does not need a by-pass capacitor).

o No need for precise biasing of the gate in ICs

o DC amplifiers (no coupling/bypass capacitors).


25/33

Why is a large CMRR useful?


A major goal in circuit design is to minimize the noise level (or improve

signal-to-noise ratio). Noise comes from many sources (thermal, EM, )

However, if the signal is applied between two inputs and we use a

difference amplifier with a large CMRR, the signal is amplified a lot more

than the noise which improves the signal to noise ratio.*

A regular amplifier amplifies both signal and noise.

noised

sigdccddo vCMRR

AvAvAvAv +=+=

1 noisesig vvv +=

1 noisesigo vAvAvAv +==

noisecsigd

noisesignoisesig

vvvvvv

vvvvvv

===

++=+=

&5.0&5.0

12

21

* Assuming that noise levels are similar to both inputs.

i diff i l lifi


26/33

Comparing a differential amplifier

two identical CS amplifiers (perfectly matched)


Differential Amplifier Two CS Amplifiers

C i f diff i l lifi i h


27/33

Comparison of a differential amplifier with two

identical CS amplifiers Differential Mode


)||(/

)||(

)5.0()||(

)5.0()||(

,1,2

,2

,1

Domdodd

dDomdodood

dDomdo

dDomdo

RrgvvA

vRrgvvv

vRrgv

vRrgv

==

==

+=

=

vo1,d, vo2,d, vod, and differential gain,Ad, are identical.

Half-Circuits

Identical

Differential amplifier Two CS amplifiers



28/33


identical CS amplifiers Common Mode


Half-Circuits

NOT Identical

vo1,c& vo2,care different! But voc = 0and CMMR = .

0/

0

/21

,1,2

,2,1

==

==

++==

cocc

cocooc

c

oDSSm

Dmcoco

vvA

vvv

vrRRg

Rgvv

0/0

)||(

,1,2

,2,1

====

==

cocc

cocooc

cDomcoco

vvA

vvv

vRrgvv




29/33


identical CS amplifiers Summary


=

====

CMRR

0,)||(c

occDom

d

odd

v

vARrg

v

vA

For perfectly matched circuits, there is no difference between

a differential amplifier and two identical CS amplifiers.

o

But one can never make perfectly matched circuits!

=

====

CMRR

0,)||(c

occDom

d

odd

v

vARrg

v

vA

Differential Amplifier Two CS Amplifiers


30/33

Consider a slight mis-match in the load resistors


We will ignore roin the this analysis (to make equations simpler)


31/33

Slightly mis-matched loads Differential Mode


)5.0(/

)5.0()5.0()(

)5.0()(

,1,2

,2

,1

DDmdodd

dDDmdodood

dDDmdo

dDmdo

RRgvvA

vRRgvvv

vRRgv

vRgv

+==

+==

++=

=

vo1, vo2, vod, and differential gain,Ad, are identical.

Half-Circuits

Identical



32/33

Slightly mis-matched loads Common Mode


Half-Circuits

NOT Identical


vo1and vo2are different. In addition, voc 0and CMMR .SSm

Dm

c

occ

c

SSm

Dmcocooc

c

SSm

DDmcoc

SSm

Dmco

Rg

Rg

v

vA

vRg

Rg

vvv

vRg

RRgvv

Rg

Rgv

21

21

21

)(,

21

,1,2

,2,1

+

==

+

==

+

+=

+=

Dm

c

occ

cDmcocooc

cDDmco

cDmco

Rgv

vA

vRgvvv

vRRgv

vRgv

+==

+==

+=

=

)(

,1,2

,2

,1

A diff ti l lifi i CMRR


33/33

A differential amplifier increases CMRR

substantially for a slight mis-match (RD0)

Dmc RgA +=

)5.0( DDmd RRgA +=

DD RR /1CMRR

Two CS Amplifiers

)5.0( DDmd RRgA +=

SSm

Dmc

Rg

RgA

21+

=

DD

SSm

RRRg/

21CMRR+

Differential Amplifier

Differential amplifier reducesAcand increases CMRR substantially

(by a factor of: 1 + 2gmRSS).

The common-mode half-circuits for a differential amplifier areCS amplifiers with RS(thus common mode gain is much smaller

than two CS amplifiers).

We should use a large RSSin a differential amplifier!

* Exercise: Compare a differential amplifier and

differential amplifier

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