designing image processing component using fpga...
TRANSCRIPT
Gunadarma University, Jakarta - 4th June 2010 1
Designing Image Processing Component using
FPGA Device
By : Sunny Arief Sudiro
Gunadarma University, Jakarta - 4th June 2010 2
Hardware Base Programmable Device
• Microcontroller (MCU), is a computer-on-a-chip.
• DSP Processor is a specialized microprocessor designed specically for digital signal processing.
• ASIC, An application-specic integrated circuit (ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for general purpose use.
• FPGA, A eld programmable gate array (FPGA) is a semiconductor device containing programmable logic components and programmable interconnects.
Gunadarma University, Jakarta - 4th June 2010 3
Why FPGA• Large logic capacity, exceeding several millions equivalent
logic gates, including dedicated memory resources.• Special hardware circuitry that is often needed in digital
systems, such as digital signal processing (DSP) blocks (with multiply and accumulate functionalities) and phase-locked loops (PLLs) (or delay-locked loops (DLLs)) that support complex clocking schemes.
• Wide range of interconnection standards, such as double data rate (DDR SRAM) memory, PCI and high-speed serial protocols.
• Soft and hard processors capabilities.• User-programmability, can be easily programmed by user.• Design Partitioning: the system can be divided into several
partitions into FPGA devices.
Gunadarma University, Jakarta - 4th June 2010 4
Hardware Implementation in FPGA
Image Processing Algorithm
( Software )
Soft Core
IP Core Component
Hardware Implementation
Properties
- performance - accuracy - speed
- complexity- size of code
- difficulty of development
Constratints - Limitations
- memory- component/block- power consumptions- module dependency- difficulty of development- interfacing and handshaking- licensing
Real Time/ Embedded
Component
( Hardware )
Properties
- performance - accuracy - speed
- size of block/modules
Image Processing
Gunadarma University, Jakarta - 4th June 2010 5
Basic FPGA Architecture
Gunadarma University, Jakarta - 4th June 2010 6
Logic Device in FPGA
Gunadarma University, Jakarta - 4th June 2010 7
Logic Device in FPGA
Gunadarma University, Jakarta - 4th June 2010 8
Development
Gunadarma University, Jakarta - 4th June 2010 999
Tools For DesignTools For Design
• VHDL and ModelsimVHDL and Modelsim
• VerilogVerilog
• Xilinx ISE ProjectXilinx ISE Project
Gunadarma University, Jakarta - 4th June 2010 10
Block Diagram of FPGA Board
Gunadarma University, Jakarta - 4th June 2010 11
ZestSC1 FPGA Board
Gunadarma University, Jakarta - 4th June 2010 12
Gunadarma University, Jakarta - 4th June 2010 13
Matrix Representation
Gunadarma University, Jakarta - 4th June 2010 14
Serial Representation
Gunadarma University, Jakarta - 4th June 2010 15
8 Neighborhood Pixel Component
Gunadarma University, Jakarta - 4th June 2010 16
Device of 8 Neighboor Pixel Component
Gunadarma University, Jakarta - 4th June 2010 17
Thinning Device Component
Gunadarma University, Jakarta - 4th June 2010 18
Thinning Device Component
Gunadarma University, Jakarta - 4th June 2010 19
Terima kasih !Merci !
Thanks you very much !