DESIGN OF SEQUENTIAL CIRCUITS

byDr. Amin Danial Asham

References

Digital Design 5th Edition, Morris Mano

State Reduction Sequential circuit analysis starts with circuit diagram and ends by

obtaining state table and state diagram. Sequential circuit design or synthesis starts with the required

specifications and ends by obtaining the circuit diagram. Two sequential circuit may have the same input output behavior

but have different internal states. Reducing the number of FF’s in a sequential circuit is called state

reduction, while keeping the same number of inputs and outputs. Reducing the number of FF’s and logic gates saves the cost of the

circuit. FF’s generate states, hence reducing the number of states may

or may not reduce the number of FF’s. Sometimes reducing the number of FF’s produces more

combinational gates to produce the next state and output logic.

State Reduction (continue) In sequential circuits the input and output sequences are

important and the internal state role is just to produce these sequences.

As an example, a sequential circuit with the following state diagram: o The states are denoted by letter since the binary values

are not important.

o Using the state diagram we get the output sequence corresponding to the input sequence 01010110100.

o This sequential circuit has 7 internal states:

State Reduction (continue) If input-output is considered, two sequential circuits with

different number of FF’s are considered equivalent if each input sequence applied to the two circuits produces the same output sequence.

“Two states are said to be equivalent if, for each member of the set of inputs, they give exactly the same output and send the circuit either to the same state or to an equivalent state.”

If there are two equivalent states, one of them can be removed without changing the input-output relations.

Now to reduce the number of states, the state table will be used and searching for equivalent states.

State Reduction (continue)

Equivalent states. They both go to states and and haveoutputs of 0 and 1 for x = 0 and x = 1, respectively

State Reduction (continue) Since the two states and are equivalent, one of them can be

removed.

Equivalent states. They both go to states and and haveoutputs of 0 and 1 for x = 0 and x = 1, respectively

Replacing the removed state with its equivalent in the table.

State Reduction (continue) Since the two states and are equivalent, one of them can be

removed. Replacing the removed state with its equivalent in the table.

State Assignment To design a sequential circuit the states are coded in a

binary coded form. If we have states we use bits code such that . Examples of the assignments:

3 FF’s 3 FF’s 5 FF’s

State Assignment (continue) The reduced 5 states in our example are coded using binary code. Three bits can be used to code 8 states, we used 5 states and the

other 3 states are considered don’t care. The state table using the binary assignment is sometimes called the

transition table to be distinguished from the state table with symbolic names for the states.

Design Procedure1. From the word description and specifications of the

desired operation, derive a state diagram for the circuit.

2. Reduce the number of states if necessary.3. Assign binary values to the states.4. Obtain the binary-coded state table.5. Choose the type of flip-flops to be used.6. Derive the simplified flip-flop input equations and

output equations.7. Draw the logic diagram.

Example Design a circuit that detects a sequence of three or more

consecutive 1’s in an input stream. The state diagram of this detector can be as shown.

o There are four states S0, S1, S2, and S3, which represents 0 at input, single 1, two consecutive 1’s, or three or more consecutive 1’s respectively.

o The output of this detector is 1 when 3 or more consecutive 1’s are detected.

Example – D FF implementation The four states are assigned binary codes 00,01,10,11 and

hence two FF’s and are needed. The state table is: The characteristic equations

are:

From the table we find:

Input Equations

Example – D FF implementation (continue)Output equation is:

Example – D FF implementation (continue) Since the input and output equations are written down as sum

of minterms, therefore the these equation can be simplified using K-maps.

Example – D FF implementation (continue)

Excitation Tables To design Sequential circuits with and FF’s, tables that list

the required inputs for a given change of state are needed. These tables are called excitation tables.

Excitation tables are used to drive the input equations.

+ +

Design using FF An example to design a sequential circuit specified with the

following state table. From the excitation table of FF: we can get the FF input for state

transitions as follows:

+

Design using FF (continue) Input Equations are derived using K-maps.

𝐾𝐵=𝐴𝑥+ 𝐴′ 𝑥 ′=(𝐴⨁ 𝑥) ′

Design using FF (continue) Logic Diagram

Design using FF An Example of design 3 bit counter which has the following state

diagram. This counter counts from 0 to . Form the stat diagram there are three FF’s that

will be named Therefore, the state table is as follows:

Using excitation table we get the FF inputs.

+

Excitation Table0

Design using FF Input Equations are derived using K-maps

0

Design using FF Logic Diagram

Thanks