dee 1050 computer organization lecture 1:...

DEE 1050 Computer OrganizationLecture 1: Introduction

Dr. Tian-Sheuan [email protected]. Electronics EngineeringNational Chiao-Tung University

Dept. Electronics Engineering,N

ational Chiao T

ung University

1DEE 1050 Lecture 1: Introduction

Institute of Electronics,National C

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Admin. Information

• Instructors– 張添烜 Tian-Sheuan Chang– Office: ED406– Phone: 31925– E-mail: [email protected]

• Course web site– http://twins.ee.nctu.edu.tw/courses/comporg_05fall/inde

x.html• TA

– ED427 (03)5712121 ext. 54243



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Course Information (1)

• Textbook– “Computer organization and design: the

hardware/software interface”, by Patterson and Hennessy, third edition, 2005

• Reference– “Computer architecture: a quantitative approach”, by

Hennessy and Patterson, third edition, 2003• Important dates

– 11/1 Midterm• Chapter 1~5

– 1/10 Final• Chapter 1~5 (30%), Chapter 6 ~ 8(70%)



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Course Information (2)

• 課程進行方式– Lecture– Project

• 評分標準– Homework+project 25 %– Midterm Exam 25%– Final Exam 50%



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如何修這門課? (1)

• Goals– Learn what, and why and how the processor and

computer are designed and developed– Learn the engineering concepts of architecture

design• 來聽課

– 注意觀念引入– 重點提示– From fundamental concepts to real design– From the simple version to the complex one

• Do the homework, lab and project by yourself and discuss with others



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如何修這門課? (2)

• Read the textbook– 工程概念

• Definitions• Check Yourself• The big picture• Fallacies: 常遇之誤解• Pitfalls：易疏忽之陷阱

– 豐富資料• Real stuff• Historical perspectives• Computers in the real world



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Notations of the Slides

• This is the keyword– The most important concepts in the slides

• The highlight part is the hot spot for exams

Check for yourself questionsHelp you think about the ideas and problems



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Course Outline

• Computer abstractions and technology• Instructions: language of the computer• Computer arithmetic• Assessing and understanding performance• The processor: datapath and control• Midterm• Enhancing performance with pipelining• Memory hierarchy• Storage, networks and other peripherals• Final



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Why learn this stuff?

• Both Hardware and Software affect program performance:– Algorithm determines number of source-level statements

• Determines both the count of source level statement and I/O operation– Language/Compiler/Architecture determine machine instructions

(Chapter 2 and 3)• Determines the number of machine instruction

– Processor/Memory determine how fast instructions are executed(Chapter 5, 6, and 7)• Determines how fast instructions are executed

– I/O system (hardware and OS) (Chapter 8)• Determines how fast I/O operations are executed

• Assessing and Understanding Performance in Chapter 4

• Both hardware and software designer should take this course



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Goals: What You can Learn

• How are a high level C or Java program translated into the hardware language and How does the hardware execute the program?

• What is the interface between the software and hardware? And How does the software instruct the hardware to perform the needed functions?

• What determines the performance of a program? And how you can improve it?

• What techniques can you use to design hardware to improve performance?– More advanced topics in the “Computer architecture”

Lecture 1: Introduction



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Impact of Computer Technology

• Computer price is going down for each year• And the computer industry is a stable industry• However, its impact is just started (social impact)

– ATM– Computers in automobiles– Laptop computer– Human genome project– WWW

– More “computer science fiction”



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Classes of Computing Applications and Their Characteristics• Desktop computer

– One of the Largest market of the computer

– Emphasize delivering good performance to a single user at low cost and usually are used to execute third party software

• Servers– Mainframes, minicomputers, supercomputer

– To carry large workloads, e.g. scientific or engineering or web– High performance, and dependability

• Embedded computers– Largest class of computers– PDA, cellular phone, game console, digital TV

– Designed to run one or one set of related applications– Minimum performance with lowest cost or power

What’s the difference of these three?And how it affect the computer design?



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Classes of Computing Applications and Their Characteristics



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Below Your Program

• Application software– MS office– Web browser

• System software– Compiler

• Translate high level language into hardware executable language

– OS• Manage the computer resource

for the benefits of the program



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Levels of RepresentationFrom High Level Language to Hardware Language

High Level Language Program (e.g., C)

Assembly Language Program (e.g.,MIPS)

Machine Language Program (MIPS)

Hardware Architecture Description (e.g., Verilog Language)

Compiler

Assembler

Machine Interpretation

temp = v[k];v[k] = v[k+1];v[k+1] = temp;

lw $t0, 0($2)lw $t1, 4($2)sw $t1, 0($2)sw $t0, 4($2)

0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111

Logic Circuit Description (Verilog Language)

Architecture Implementation

wire [31:0] dataBus;regFile registers (databus);ALU ALUBlock (inA, inB, databus);

wire w0;XOR (w0, a, b);AND (s, w0, a);



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Abstractions

DEE1050

* Coordination of many levels of abstraction

I/O systemProcessor

CompilerOperating

System(Windows 2K)

Application (Netscape)

Digital DesignCircuit Design

Instruction SetArchitecture

Datapath & Control

transistors

MemoryHardware

Software Assembler

DEE 1050 Lecture 1: Introduction


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Instruction Set Architecture

• Also called architecture• A very important abstraction

– interface between hardware and low-level software– Includes instructions, registers, memory access, I/O and so on– advantage: different implementations of the same architecture– disadvantage: sometimes prevents using new innovations

True or False: Binary compatibility is extraordinarily important?

• Modern instruction set architectures:– IA-32, PowerPC, MIPS, SPARC, ARM, and others



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Under the CoversAnatomy: 5 components of any Computer

Personal Computer

Processor

Computer

Control(“brain”)

Datapath(“brawn”)

Memory

(where programs, data live whenrunning)

Devices

Input

Output

Keyboard, Mouse

Display, Printer

Disk(where programs, data live whennot running)



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Under the Covers



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Inside the Processor

Pentium



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Technologies to Build Computers

• Integrated Circuits (ICs)– Combinational logic circuits, memory elements, analog interfaces.

• Printed Circuits (PC) boards– substrate for ICs and interconnection, distribution of CLK, Vdd, and

GND signals, heat dissipation. • Power Supplies

– Converts line AC voltage to regulated DC low voltage levels. • Chassis (rack, card case, ...)

– holds boards, power supply, provides physical interface to user or other systems.

• Connectors and Cables.

The hardware out of which we make systems.



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Printed Circuit Boards

• fiberglass or ceramic• 1-20 conductive layers • 1-20in on a side • IC packages are soldered

down.



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Integrated Circuits (2003 state-of-the-art)• Primarily Crystalline Silicon• 1mm - 25mm on a side• 2003 - feature size ~ 0.13µm = 0.13 x 10-6 m • 100 - 400M transistors• (25 - 100M “logic gates")• 3 - 10 conductive layers• “CMOS” (complementary metal oxide

semiconductor) - most common.

• Package provides:– spreading of chip-level signal paths to board-level – heat dissipation.

• Ceramic or plastic with gold wires.

Chip in Package

Bare Die



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Chip Manufacturing Process



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Technology Trends: Memory Capacity(Single-Chip DRAM)

size

Year

1000

10000

100000

1000000

10000000

100000000

1000000000

1970 1975 1980 1985 1990 1995 2000

year size (Mbit) 1980 0.06251983 0.251986 11989 41992 161996 641998 1282000 2562002 512• Now 1.4X/yr, or 2X every 2 years.

• 8000X since 1980!



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Year

1000

10000

100000

1000000

10000000

100000000

1970 1975 1980 1985 1990 1995 2000

i80386

i4004

i8080

Pentium

i80486

i80286

i8086

Technology Trends: Microprocessor Complexity

2X transistors/ChipEvery 1.5 years

Called“Moore’s Law”

Alpha 21264: 15 millionPentium Pro: 5.5 millionPowerPC 620: 6.9 millionAlpha 21164: 9.3 millionSparc Ultra: 5.2 million

Moore’s Law

Athlon (K7): 22 MillionItanium 2: 410 Million



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Technology Trends: Processor Performance

0100200300400500600700800900

87 88 89 90 91 92 93 94 95 96 97

DEC Alpha21264/600

DEC Alpha 5/500

DEC Alpha 5/300

DEC Alpha 4/266IBM POWER 100

1.54X/yr

Intel P4 2000 MHz(Fall 2001)

We’ll talk about processor performance later on…

year

Perf

orm

ance

mea

sure



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Computer Technology - Dramatic Change!

• Memory–DRAM capacity: 2x / 2 years (since ‘96);

64x size improvement in last decade. • Processor

–Speed 2x / 1.5 years (since ‘85); 100X performance in last decade.

• Disk–Capacity: 2x / 1 year (since ‘97)

250X size in last decade.



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Computer Technology - Dramatic Change!

• State-of-the-art PC when you graduate: (at least…)

–Processor clock speed: 5000 MegaHertz(5.0 GigaHertz)

–Memory capacity: 4000 MegaBytes(4.0 GigaBytes)

–Disk capacity: 2000 GigaBytes(2.0 TeraBytes)

–New units! Mega => Giga, Giga => Tera

(Kilo, Mega, Giga, Tera, Peta, Exa, Zetta, Yotta = 1024)Come up with a clever mnemonic, fame!



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The meaning of technology drive

• Forecast the expected design performance within the next few years

• It change the way that you design your computer, and software– Multi-processor, VLIW, parallel processor, efficient

access via caches– Size, speed, probability

• Other technology may change the way of the computer/processor design– Quantum computer, DNA computer, bio-computer



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Summary (What you should remember after 5 years)

• 5 classic components of all computersControl Datapath Memory Input Output

processor• Two key technologies for modern processors

– Compilers– Silicon

• Expected rates of technological rate• 2X every 2.0 years in memory size;

every 1.5 years in processor speed; every 1.0 year in disk capacity;

• Moore’s Law enables processor(2X transistors/chip ~1.5 yrs)

– Technology change the way you design computer and software

• Two key ideas for– exploiting parallelism via pipelining– Exploiting locality of access via caches



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References

• http://www-inst.eecs.berkeley.edu/~cs152

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