Power

Electron

icsC

ircuits

Prof.D

anielCostin

ett

ECE482Lecture3

Janu

ary26,2017

Anno

uncemen

ts

•Expe

riment1

Repo

rtDu

eTuesday

•Prelab

3du

eThursday

•Allassignm

entsturned

indigitally

Byemailingto

Daniel.costin

ett@

utk.ed

uInclud

e[ECE

482]

inthesubject

•Partsk

itpu

rchasedpriortoTuesday’sc

lass

•Capturewaveforms,even

ifsomething

ismalfunctio

ning,for

repo

rt

Outlin

e

1.Motor

Back

EMFShape

2.Po

wer

ConverterLayou

t3.

LossAn

alysisandDe

sign

–LowFreq

uencyCo

nductio

nLosses

–Indu

ctor

ACLosses

–Co

reLosses

–Indu

ctor

Desig

nAp

proaches

BACK

EMFSH

APE

PMSM

vsBLDC

SinglePh

aseMotor

(Sim

plified

)Winding

Volta

geEqua

tion

–Sinu

soidalback

EMFachieved

with

sinusoidalw

inding

distrib

ution

–Ge

nerally

term

edPerm

anen

tMagne

tSynchrono

usMotor

(PMSM

)

Shap

eof

Back

EMF–PM

SMWinding

http://w

eb.eecs.utk.ed

u/courses/sprin

g201

7/ece482

/materials/brushlessmotor.sw

f

BLDC

Motor

Winding

–BrushlessD

C(BLD

C)Motorsa

reno

twou

ndsin

usoidally

–Thisresults

inTrapezoidalbackem

f,rather

than

sinusoidal

–Canbe

driven

simplywith

Square

waves

toachieverelativelylow

torque

ripple

Outer

vs.Inn

erRo

tor

•Tradition

almotorsa

reinne

rrotor

•Onebike,needhu

bto

remainstationary

andou

terw

heelto

spin

Motor

Teeth/Po

lesE

xample

56po

le63

teeth

Stator

Winding

Completewinding

ofPh

aseA

Completewinding

ofallphases

Rotora

ndPo

les

•Outer

rotor(to

which

spokes/w

heelare

attached

)•

Magne

tsalternateNS

05

1015

2025

30-8-6-4-202468

thet

a [d

eg]

Normalized Coupled Flux [Tesla*coil] •33

Teeth,22

Poles

•Teeth/Po

le/Phase

=0.5

ABC

SN

stator

rotor

Shap

eof

Back

EMF

05

1015

2025

30-8-6-4-202468

thet

a [d

eg]

Normalized Coupled Flux [Tesla*coil]

•36

Teeth,22

Poles

•Teeth/Po

le/Phase

=0.5455

ABC

SN

stator

rotor

Shap

eof

Back

EMF

Simulationof

BLDC

andPM

SM

15

Expe

rimen

t3

Design

Assessmen

t

BoostD

esign

POWER

CONVE

RTER

LAYO

UT

Power

ConverterLayou

t:Bu

ckExam

ple

Parasitic

Wire

Indu

ctan

ces

Loop

Minim

izatio

nEffectof

Loop

Indu

ctan

ce

DRe

usch,“Optim

izing

PCBLayout”

L loop=0.4n

HL lo

op=1.6n

H

•Ga

tedriver

chipmustimplem

entv

gswaveforms

•Sourcesw

illhave

pulsa

tingcurren

tsandne

edde

coup

ling

HalfBridge

Gate

DriveWaveforms

•MOSFET

isoffw

henv g

s<V t

h3V

•MOSFET

fully

onwhe

nv g

sis

sufficien

tlylarge(1015

V)

•Warning:M

OSFET

gate

oxidebreaks

downandthede

vice

fails

whe

nv g

s>20

V.

•Fastturn

onor

turn

off(10

’sof

ns)

requ

iresa

largespike(1

2A)

ofgate

curren

ttocharge

ordischargethe

gate

capacitance

•MOSFET

gate

driver

isalogicbu

ffer

that

hash

ighou

tput

curren

tcapability

2

8

~100

DrivingaPo

wer

MOSFET

Switch

PWM

Pulse

sfrom

controller/

FcnGe

nerator

SourceDr

ain

Gate

•MOSFET

gate

driver

isused

asalogicbu

fferw

ithhigh

output

current(~1.8A)

capability

•Theam

plitu

deof

thegate

volta

geeq

ualsthesupp

lyvolta

geVC

C•

Decoup

lingcapacitorsarene

cessaryat

allsup

plypins

ofLM

5104

(and

allICs)

•Ga

teresistanceused

toslo

wdv/dta

tswitchno

de

DrivingaPo

wer

MOSFET

Switch

•Ga

tedriver

iscascades

back

halfbridgeso

fde

creasin

gsizeto

obtainqu

ickrisetim

es•Re

minde

r:keep

loop

swhich

hand

lepu

lsatin

gcurren

tsm

allbyde

coup

lingandmakingcloseconn

ectio

ns

Gate

DriveIm

plem

entatio

n

Decoup

ling

•Alwaysa

ddbypass

capacitora

tpow

ersupp

lyfora

nyIC/referen

ce•Use

smallvalue

d(~10

0nf),

lowESRandESL

capacitors(ceram

ic)

•Limitloop

fora

nydi/dt

•Area

ofcurren

tpulse

istotalchargesupp

liedto

gate

ofcapacitor

•Allchargemustb

esupp

liedfrom

gate

drive

decoup

lingcapacitor

Capa

citorS

izingNotes

•Ga

techarge

issupp

liedthroughdriver

resistance

durin

gsw

itchturn

on•Ga

techarge

isdissipated

ingate

driver

onsw

itch

turn

off

Gate

DriveLosses

•Ga

tedriver

chipmustimplem

entv

gswaveforms

•Issue:source

ofQ2isno

tgroun

ded

High

Side

SignalGrou

nd

•Isolated

supp

liessom

etim

esused

;IsolatedDC

DC,

batteries

•Bo

otstrapconcep

t:capacitorcan

bechargedwhe

nV s

islow,

then

switche

d

Gene

ratin

gFloa

tingSupp

lyANoteon

Grou

nding

UCC

2721

1aInternalDiagram

FairchildSemiA

ppNoteAN

6076

Parasiticstobe

Awareof

Power

Loop

Indu

ctan

ces

PerssonE.,“Whatreally

limits

MOSFET

perfo

rmance:silicon,package,driver

orcircuitb

oard?”

CompleteRo

utingof

Signal

•Alwaysc

onsid

erreturn

path

•Grou

ndplanecanhe

lp,but

stillne

edto

consider

thepath

andop

timize

Star

Grou

ndingVs.D

aisy

Chain

Anothe

rView

Kester,W

.“Tips

abou

tprin

tedcircuitb

oard

desig

n:Part1

Dealingwith

harm

fulPCB

effects”

KelvinCo

nnectio

n

EfficiencyMeasuremen

t

Boost

Converter

POWER

CONVE

RTER

DESIGN

ANDLO

SSAN

ALYSIS

ConverterD

esign MOSFET

Selection

Indu

ctor

Design

Switching

Freq

uency

ThermalMod

el

CostMod

el

Loss

Mod

el

. . .

Design

Specificatio

ns

Performan

ceSpecificatio

n

Design

Assessmen

t

AnalyticalMod

el

AnalyticalLoss

Mod

eling

•High

efficiencyapproxim

ationisacceptableforh

and

calculations,aslon

gas

itisjustified

•Solveidealw

aveformso

flossle

ssconverter,then

calculatelosses

•Arguewhich

losses

need

tobe

includ

ed,and

which

may

bene

glected

•“Rou

gh”approxim

ationto

gaininsig

htinto

significance

Additio

nalR

esou

rces

•Ad

ditio

nallecturesinECE581

http://w

eb.eecs.utk.ed

u/~d

costine/ECE581

/Fall20

16/sched

ule.ph

pAccessibleon

lyfrom

campu

snetwork

•Sw

itching

Overla

pLossL4

L5•De

vice

Capacitances

L6L7

•Magne

ticsL

ossesL

19(2

ndhalf)

andL20

•Be

ginby

solvingim

portantw

aveformsthrou

ghou

tconvertera

ssum

inglosslessop

eration

BoostC

onverter

Loss

Analysis

MOSFETS

Body

Diod

esIndu

ctor

Capacitors

•R o

n•

V F•

R d•

R dc

•ESR

•C o

ss•

Overla

p•

P g

•T dcond

.•

C d•

Reverse

Recovery

•SkinEffect

•Co

reLoss

•Fringing

•Proxim

ity

•Dielectric

Losses

Low

Freq

uency

Losses

Freq

uency

Depe

nden

tLosses

Power

StageLosses

LOW

FREQ

UEN

CYCO

NDU

CTIONLO

SSES

•Co

nsideringon

lypo

wer

stagelosses

(gatedrive

neglected)

•MOSFET

operated

aspo

wer

switch

•Intrinsic

body

diod

ebe

haviorsc

onsid

ered

using

norm

aldiod

eanalysis

MOSFET

Equivalent

Circuit

•Onresistanceextractedfrom

datasheetw

aveforms

•Significantlyde

pend

ento

nV g

sam

plitu

de,tem

perature

MOSFET

OnRe

sistan

ce

•MOSFET

cond

uctio

nlosses

dueto

(rds) onde

pend

given

asBoostC

onverter

RMSCu

rren

ts

•RM

Svalues

ofcommon

lyob

served

waveforms

appe

ndixfrom

Power

Book

MOSFET

Cond

uctio

nLosses

•Ope

ratio

nwellbelow

resonance

•Alllossm

echanism

sinacapacitora

regene

rally

lumpe

dinto

anem

piricalloss

mod

el•Equivalent

Serie

sResistance

(ESR)is

high

lyfreq

uencyde

pend

ent

•Da

tasheetsmay

give

effectiveim

pedance

atafreq

uency,or

lossfactor:

Capa

citorLossM

odel

•DC

Resistancegivenby

•At

room

temp,

=1.72

410

6cm

•At

100°C,

=2.310

6cm

•Losses

dueto

DCcurren

t:

DCIndu

ctor

Resistan

ce

•Co

nductio

nlosses

depe

nden

tonRM

Scurren

tthrou

ghindu

ctor

Indu

ctor

Cond

uctio

nLosses

Switching

Loss

Switching

Loss

Mod

eling

59

V gs1

V gs2

t t

V sw

t

Type

sofSwitching

Loss

1.Ga

teCh

arge

Loss

2.Overla

pLoss

3.CapacitiveLoss

4.Bo

dyDiod

eCo

nductio

n5.

ReverseRe

covery

6.ParasiticIndu

ctiveLosses

7.An

omalou

sLosses

Gate

Charge

Loss

scc

gg

fV

QP

Overla

pLoss

V gs2

V ds2

i d2

t t tssw

Loverlap

TtVI

P21

M2M1

LumpSw

itche

dNod

eCa

pacitance

•Co

nsider

asin

gleeq

uivalent

capacitora

tsw

itche

dno

dewhich

combine

sene

rgy

storagedu

eto

allfou

rsem

icon

ductor

devices

•Exam

plelossmod

elinclud

esresistanceand

forw

ardvolta

gedrop

extractedfrom

datasheet

Diod

eLoss

Mod

el

Diod

eRe

verseRe

covery

•Diod

eswillturn

ondu

ringde

adtim

eintervals

•Significant

reverse

recovery

possibleon

both

body

diod

eandexternaldiod

e

bus

rrrr

LL

rron

VQ

ti

IE

,

INDU

CTORAC

LOSSES

•Cu

rren

tprofileat

high

freq

uencyisexpo

nential

functio

nof

distance

from

center

with

characteristic

length

SkinEffectinCo

pper

Wire

r w

ACRe

sistan

ce

SkinDe

pth

•Infoilcond

uctorcloselyspaced

with

h>>

,fluxbe

tweenlayers

gene

ratesa

ddition

alcurren

taccordingto

Lentz’s

law.

•Po

wer

lossinlayer2

:

•Needs

mod

ificatio

nforn

onfoil

cond

uctors

+

Proxim

ityEffect

SeeFund

amentalsof

Power

Electron

ics,Section13.4

SimulationExam

ple

Freq

uency:1kH

zFreq

uency:10

0kH

z

Freq

uency:1MHz

Freq

uency:10

MHz

•Neara

irgap,flu

xmay

bowou

tsignificantly,causin

gadditio

nal

eddy

currentlossesinne

arby

cond

uctors

Fringing

PhysicalOrig

inof

Core

Loss

•Magne

ticmaterialisd

ivided

into

“dom

ains”of

saturatedmaterial

•Bo

thHy

steresisandEddy

Curren

tlosseso

ccur

from

domainwallshifting

Rei

nert,

J.; B

rock

mey

er, A

.; D

e D

onck

er, R

.W.;

, "C

alcu

latio

n of

loss

es in

ferr

o-an

d fe

rrim

agne

ticm

ater

ials

bas

ed

on th

e m

odifi

ed S

tein

met

z eq

uatio

n,"

Indu

ctor

Core

Loss

•Go

verned

bySteinm

etz

Equatio

n:

•ParametersK

fe,,and

extra

cted

from

m

anuf

actu

rer d

ata

•sm

alllosses

with

smallripple[m

W/cm

3 ]

[mW]

Steinm

etzP

aram

eter

Extractio

n

Ferroxcube

CurveFitP

aram

eters

Non

Sinu

soidalWaveforms

•Mod

ified

Steinm

etzE

quation(M

SE)

“Gue

ss”that

losses

depe

ndon

Calculate

andfin

dfreq

uencyof

equivalent

sinusoid

Albach

,DurbauandBrockm

eyer,199

6Re

inert,Brockm

eyer,and

Doncker,19

99

NSE/iGS

E

Vande

nBo

ssche,A.;V

alchev,V

.C.;Ge

orgiev,G

.B.;,"Measuremen

tand

lossmod

elof

ferrite

swith

nonsin

usoidalw

aveforms,“

K.Ve

nkatachalam;C

.R.Sullivan;T.A

bdallah;H.

Tacca,“Accuratepred

ictio

nof

ferrite

core

losswith

nonsinusoidalw

aveformsu

singon

lySteinm

etzparameters”

SimpleForm

ulaforS

quarewave

volta

ges:

INDU

CTORDE

SIGN

Indu

ctor

Design

Freedo

ms:

1.Co

reSize

andMaterial

2.Num

bero

fturns

andwire

gauge

3.Length

ofAirG

apCo

nstraints:

1.ObtainDe

signe

dL

2.Preven

tSaturation

3.Minim

izeLosses

Equivalent

Circuit

•Forg

iven

core,num

bero

fturns

canbe

used

toindex

possiblede

signs,w

ithairg

apsolved

after(andlim

ited)

togetcorrectindu

ctance

•Aminim

umsum

ofthetw

oexistsa

ndcanbe

solved

•De

signalwayssub

jectto

constraint

B max<B s

at

Minim

izatio

nof

Losses

Spread

sheetD

esign •

Use

ofspreadsheet

perm

itssim

pleite

ratio

nof

desig

n•Caneasilychange

core,

switching

freq

uency,loss

constraints,etc.

Matlab(Program

matic)D

esign

•Matlab,or

similar,pe

rmits

morepo

werfuliteratio

nand

plottin

g/insig

htinto

desig

nvaria

tion

Closed

Form

Design

Metho

ds

•Fund

amen

talsof

Power

Electron

icsC

h13

15Step

byStep

desig

nmetho

dsSimplified

,and

may

requ

ireadditio

nalcalculatio

ns

K gK g

fe

Losses

DCCo

pper

(spe

cifie

d)DC

Copp

er,

SECo

reLoss

(optim

ized)

Saturatio

nSpecified

CheckedAfter

B max

Specified

Optim

ized

K gan

dK g

feMetho

ds•

Twoclosed

form

metho

dsto

solveforthe

optim

alindu

ctor

desig

nun

der

certainconstraints/assumptions

•Neither

metho

dconsiderslosseso

ther

than

DCcopp

erand(possib

ly)

steinm

etzc

oreloss

•Bo

thmetho

dsparticularlywellsuitedto

spreadsheet/ite

rativede

sign

proced

ures

•Metho

dusefulforfilter

indu

ctorsw

here

Bissm

all

•Co

relossisno

tinclude

d,bu

tmay

besig

nificant

particularlyiflargerip

pleispresen

t•Co

pper

lossisspecified

throughasettargetresistance

•Thede

sired

B maxisgivenas

aconstraint

•Metho

ddo

esno

tche

ckfeasibility

ofde

sign;

must

ensure

that

airg

apisno

textremelylargeor

wire

size

excessivelysm

all

•Simplefirst

cutd

esigntechniqu

e;usefulfor

determ

iningapproxim

atecore

sizerequ

ired

•Step

bystep

desig

nproced

ureinclud

edon

web

site

K gMetho

d

•Metho

dusefulforcases

whe

ncore

lossandcopp

erlossareexpe

cted

tobe

significant

•Saturatio

nisno

tinclude

dinthemetho

d,rather

itmustb

echeckedafterw

ard

•Enforces

ade

signwhe

rethesum

ofcore

andcopp

eris

minim

ized

K gfeMetho

d

K gfeProced

ure

2

2

nW

KA

Au

wk

11nn

nn

kk

Verify

K gfeMetho

d:Summary

•Metho

den

forces

anop

erating

Binwhich

core

and

copp

erlosses

areminim

ized

•Onlytakesintoaccoun

tlossesfrom

standard

Steinm

etze

quation;

notcorrectun

lesswaveformsa

resin

usoidal

•Do

esno

tcon

sider

high

freq

uencylosses

•Step

bystep

desig

nproced

ureinclud

edon

web

site