dcis09 program preview

8/14/2019 DCIS09 Program Preview

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Welcome to DCIS 2009

On behalf of the Organizing and the Steering Committee, we have the great pleasure in welcoming all of you to the Design of Circuits and Integrated Systems Conference,

DCIS 2009. This is the 23th DCIS.The Conference is being held in the old Building of the Universidad de Zaragoza, the Paraninfo. This

Building is very conveniently located in the centre of the city of Zaragoza.

The Program Chairs and the Program Committee have prepared a rich and very interesting programfollowing the same scheme of previous conferences. Each day of the conference a plenary session isscheduled. This year we have invited one academic researcher, Wouter

Serdijn

from TUDelft

and twoindustry researches Andreia

Cathelin

from ST microelectronics and Jos

Ramn Garca

from BoshSiemens Hausgerte.

This Year the conference has been affected by the world economic

crisis. Less than one hundred papershave been presented, but the quality of all of them is very high. The blind reviewers have given high

scores to almost all of them, and the Steering Committee has rejected very few papers.

Because of the economic crisis, the Organizing Committee have done a great effort to keep the inscriptionfees low and negotiating very low prices with the recommended hotels.

Last year a World Exhibition took place in Zaragoza. The city has changed its urban panorama. Newbridges over the Ebro river, new airport terminal and new river sides parks and terraces are

infrastructures that have left the World Expo in the city.

The Organising

Committee wishes to the conference attendants a fruitful work in the DCIS 2009 and agood and enjoyable stay in Zaragoza.

Armando Roy YarzaGeneral Chair


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Program

Social Event & Gala Dinner Welcome Reception18:00

Communications SystemsAnalog-Digital Interface DesignDefect & Fault Tolerance Techniques

Low Power Design

Modelling, Simulation and SynthesisTechniques (II)Testability & Test Techniques

16:00 17:30

LunchLunchLunch14:00 16:00

Closing Remarks13:30 14:00

Analog & Mixed-Signal IC Design (II)

Bioinspired Systems & IntegratedSensorsVision & Image Processing

RF IC Design (II)

Modelling, Simulation and SynthesisTechniques (I)Programmable Devices and Systems

12:30 13:30

Reconfigurable Computing & Digital ICDesignHW-SW CodesignSmart Objects & Wireless Applications

12:15 12:30

BreakCoffee BreakCoffee Break

12:00 12:15

Analog & Mixed-Signal IC Design (III)

System Design MethodsDigital Signal Processing

Analog & Mixed-Signal IC Design (I)

MEMsFailure Analysis & Reliability

RF IC Design (I)

Embedded Design & SoCIndustrial Applications10:30 12:00

Coffee BreakBreak10:00 10:30

Invited Talk. : Jos Ramn Garca(BS Home Appliances, Zaragoza)

9:30 10:00Invited Talk. : Andreia Cathelin(STMicroelectronics, Grenoble)

Invited Talk.:

Wouter Serdijn(Delft University of Technology,The Netherlands)

Opening Session9:00 9:30

Registration8:00 9:00

Friday, Nov. 20Thursday, Nov. 19Wednesday, Nov. 18Schedule


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Openning

Session

Opening Session.Chaired by Armando Roy

Invited Talk:Chaired by Armando Roy

Power Converters for Induction Cookers

Jos

Ramn Garca(BSH Bosch und Siemens Hausgerte GmbH)

Induction

cookers

market

is

growing

very

fast. Power

electronics

plays

an

important

role in this

field. Theprinciples

of

induction

cookers

and

the

market

evolution

is

discussed. A comparison

between

the

mostsuccesfull

topologies

and

controls

is

shown. Trends

in electronic

developments

for

this

field

is

analysed .

H O M E


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Embedded Design & SoC

Chaired by by

Jos

Silva Matos (U. Porto) and Luis A. Barragn

(U. Zaragoza)

1.

AN INTEGRATED SOLUTION FOR OFDM NARROW BAND PLC COMMUNICATION SYSTEMSantiago Miguel, Alfredo Sanz, J.Ignacio

Garcia, Pedro Estopian

This paper describes the process of evolution of PRIME from the early definition state to the first implementation of a SoC

solution. PRIME is the Draft Standard for Power-line-Related Intelligent Metering Evolution. It is a complete draft standard for a new OFDM-based power line technol-ogy

for the provision of all kinds of SmartGrid services over electricity distribution networks. Both PHY and MAC layers according to IEEE conventions, plus a Convergence layer, are described in thestandard. PRIME is the base line technology of the new Open Meter project supported by the larger European utilities.

2.

DESIGN OF AN INTEGRATED LIQUID LENS FOR DRIVER A VISION SYSTEM OF AN ENDOSCOPIC CAPSULELlus

Freixas, Oscar Alonso, Angel Dieguez

The paper describes the electronics used to drive a liquid lens for a vision system of an endoscopic capsule. The liquid lens ARCTIC 416 works with high voltage

signals. For this reason the driver integrates a boost converter

to generate a supply voltage of 50 V from 3.3 V. An H-Bridge is the main block of the driver to drive theliquid lens. The H-Bridge transistors are controlled with specific level-shifters. An integrated 5 V Dickson charge pump is integrated to

feed the level-shifters acting onthe LV part of the H-bridge. Voltages to drive the level-shifters acting on the HV part of the H-Bridge are obtained from the boost. An ASIC has been fabricated to testthe liquid lens driver designed.

3.

ENABLING ACTIVE LOCOMOTION IN CAPSULAR ENDOSCOPYOscar Alonso, Llus

Freixas, Angel Diguez

It is described the architecture of the electronics for the control of a wireless endoscopic capsule with locomotive capabilities and advanced sensing and actuatingfunctions. Special emphasis is done to the description of the driver used for locomotion, which is the most innovative element in the capsule.

H O M E


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Invited

Talk

Wearable and Implantable Medical Devices--

towards better monitoring, treatment and care --

Wouter

Serdijn(Delft University of Technology, The Netherlands)

Induction

In the design process of wearable and implantable medical devices (WIMDs), such as pacemakers, cochlear implantsand neurostimulators, the trade off between performance and power consumption is a delicate balancing act and yet todaysdevices all fall short on one or more of the following aspects: number of electrodes, ability to detect morphological features of theincoming signal, ability to generate a variety of impulses in a closed-loop (thus adaptive) fashion, ability to transmit and receivereliably over a radio-harsh, signal-blocking radio channel, power consumption, and form factor.Most of these shortcomings originate from the way the current sensor, pulse generator and transceiver electronics, are specified,

designed and tested: in the time or frequency domain; they are therefore successful in the creation and analysis/detection of artificial signals, such as square and sinusoidal waves as, e.g., occur in various communication systems (e.g., for mobiletelephony, fiber-optic communication, etc.). However, they are less successful in

dealing with more natural signals, such as thenon-stationary electrophysiological signals entering WIMDs.In this presentation we will cover some recent techniques to deal with the acquisition and generation of electrophysiologicalsignals and to provide reliable communication through the body. We will discuss analog wavelet filters and signal-specific analog-to-digital converters that preserve the main features of the signal

while removing noise and interference. It will be shown how

analog pre-

or post-processing can lead to tremendous gains in power efficiency because of the exploitation of analog primitivesfor computation. .

H O M E


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Communications Systems

Chaired by Andoni

Irizar

(CEIT, TECNUN) and Pilar

Molina (U. Zaragoza)

1.

MEASURING FPGA SOFT PROCESSOR PERFORMANCE IN STREAMING APPLICATIONSSergio Costas-Rodrguez, Rafael Martnez-lvarez, Francisco J. Gonzlez-Castao, Felipe Gil-Castieira

This paper analyzes a low-cost streaming server based on a FPGA virtual processor, or soft

processor. We measure the performance of a soft processor server implementation to

bring development costs down, and compare it with a fully hardware-oriented implementation.

2.

HARDWARE IMPLEMENTATION OF A LOW-COMPLEXITY SYNCHRONIZER FOR A WLAN 802.11ATRANSCEIVER

Aritz

Alonso, Andoni

Irizar, Jose Ramn Martn, Igone

Vlez, Ainhoa

Corts, Naiara

Arrue

In this paper we are presenting a hardware implementation of a synchronizer for a WLAN 802.11a compliant transceiver based on the algorithm proposed by J. Liuand J. Li. The architecture of the synchronizer has been designed

with simplicity in mind and to reuse as many blocks as possible from the existing transceiver. The synchronizer has been described in VHDL.

3.

TRADEOFFS IN THE DESIGN OF A VITERBI DECODER FOR A MB-OFDM RECEIVERMrio

Vstias, Hugo Santos, Helena Sarmento, Horcio

Neto

MB-OFDM is an ultra wide band technology for low power, short range

and high speed wireless communications, using the 3.1 GHz-10.6 GHz band. It is a promisingtechnology to be used in Wireless Personal Area Networks, permitting data rates up to 480 Mbit/s.

This paper analyses the tradeoffs involved in the design of a Viterbi

decoder using FPGA technology. The number of soft bits, the traceback

length and the coderates are the parameters considered in this analysis.

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Invited

Talk

Millimeter wave design in bulk-CMOS and CMOS-SOI

Andreia

Cathelin(STMicroelectronics, Grenoble)

The presentation will start with a short notice about mmW

applications targeting CMOS integration: high data rate WLAN/WPANcommunications, low data date sensor applications and THz imaging. Then, an overview of deep submicron CMOS technologies(bulk and SOI) will be presented. Insights on the SOI specific devices will be given. The HF behavior of active devices will be outlighted via the well-known figures of merit: fT, fmax

and NFmin. The design of passive devices for mmW

will also be presented,taking into account all the constraints coming from the BEOL of digital deep-submicron technologies. Active and passive devicesdesign hints for mmW

will finalise

this section. The following section presents mmW

building blocks on CMOS: LNA, mixer, VCO,Rx Front-End, ... Design techniques will be discussed, based on the information presented in the previous section, together withtechnical implementation details and measurement results.

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