1Introduction to MechatronicsIntroduction to Mechatronics

DATA ACQUISITION DATA ACQUISITION AND INTERFACINGAND INTERFACING

Prof.Dr. Fatih M. Botsal

DATA ACQUISITIONDATA ACQUISITION

Computing Unit

DATA

System

Control Software

Control Signal

Interface

Interface Interface

2DATA ACQUISITIONDATA ACQUISITION

A data acquisition system is a device designed to A data acquisition system is a device designed to measure and log some parameters. measure and log some parameters.

The purpose of the data acquisition system is generally The purpose of the data acquisition system is generally the analysis of the logged data and the improvement of the analysis of the logged data and the improvement of the object of measurements. the object of measurements.

The data acquisition system is normally electronics The data acquisition system is normally electronics based, and it is made of hardware and software. based, and it is made of hardware and software.

The hardware part is made of sensors, cables and The hardware part is made of sensors, cables and electronics components (among which memory is where electronics components (among which memory is where imformation are stored). imformation are stored).

The software part is made of the data acquisition logic The software part is made of the data acquisition logic and the analysis software (and some other utilities that and the analysis software (and some other utilities that can be used to configure the logic or to move data from can be used to configure the logic or to move data from data acquisition memory to a laptop or to a mainframe data acquisition memory to a laptop or to a mainframe computer).computer).

DATA ACQUISITIONDATA ACQUISITION

An example: Data logging, carried out by a An example: Data logging, carried out by a data acquisition system (DAS), can be used to data acquisition system (DAS), can be used to measure parameters such as temperature and measure parameters such as temperature and humidity in storage facilities with perishable humidity in storage facilities with perishable products; the measurement data is then products; the measurement data is then stored for analysis to improve quality stored for analysis to improve quality assurance. assurance.

Another example: a data acquisition system Another example: a data acquisition system can be placed on a race car to measure RPM can be placed on a race car to measure RPM and vehicle speed to analyze car's behaviour and vehicle speed to analyze car's behaviour once it's back to pits and improve the car once it's back to pits and improve the car setup. setup.

3COMPUTING UNITCOMPUTING UNIT

Microprocessor

Programmable Interface Controller (PIC)

Programmable Logic Controller (PLC)

Industrial PC(IPC)

Single Board Computer

INTERFACING

4INTERFACEINTERFACE

An interface defines the communication An interface defines the communication boundary between two entities, such as a boundary between two entities, such as a piece of software, a hardware device, or a piece of software, a hardware device, or a user. user.

It may also provide a means of translation It may also provide a means of translation between entities which do not speak the same between entities which do not speak the same language.language.

Interfaces between hardware components are Interfaces between hardware components are

physical interfaces.physical interfaces.

INTERFACESINTERFACES

RSRS--232232

RSRS--485485

USBUSB

BUSBUS

ADCADC

DACDAC

MULTIPLEXORMULTIPLEXOR

SAMPLESAMPLE--HOLDHOLD

5INTERFACING STANDARTSINTERFACING STANDARTS

DATA TRANSFERDATA TRANSFER

6DATA COMMUNICATIONDATA COMMUNICATION

Data transmissionData transmission is the conveyance is the conveyance of any kind of information from one of any kind of information from one space to another. space to another.

Series/Parallel communicationSeries/Parallel communication

Synchronous/Asenchronous Synchronous/Asenchronous communicationcommunication

Simplex/ HalfSimplex/ Half--Dublex / FullDublex / Full--Dublex Dublex communicationcommunication

DATA COMMUNICATIONDATA COMMUNICATION

7DATA TRANSFERDATA TRANSFERPARALEL DATA TRANSFER:PARALEL DATA TRANSFER:

Multiple wires are used and transmit multiple Multiple wires are used and transmit multiple bits simultaneously and is much faster than bits simultaneously and is much faster than Serial transmission as one byte can be sent Serial transmission as one byte can be sent rather than one bit. This method is used rather than one bit. This method is used internally within the computer, for example the internally within the computer, for example the internal buses, and sometimes externally for internal buses, and sometimes externally for such things as printers, however this method of such things as printers, however this method of transmission is only available over short transmission is only available over short distances as the signal will degrade and become distances as the signal will degrade and become unreadable, as there is more interference unreadable, as there is more interference between many wires than between one.between many wires than between one.

PARALLEL DATA TRANSFERPARALLEL DATA TRANSFER

8SERIES DATA TRANSFER SERIES DATA TRANSFER

Bits are sent over a single wire Bits are sent over a single wire individually. Whilst only one bit is sent individually. Whilst only one bit is sent at a time, high transfer rates are at a time, high transfer rates are possible. This can be used over longer possible. This can be used over longer distances as a check digit or parity bit distances as a check digit or parity bit can be sent along it easily. can be sent along it easily.

SERIES DATA TRANSFERSERIES DATA TRANSFER

9CHANNEL TYPESCHANNEL TYPES

In In Simplex systemsSimplex systems, transmission can occur , transmission can occur only in one direction at all the times. only in one direction at all the times.

CHANNEL TYPESCHANNEL TYPES

In In HalfHalf--Duplex operationDuplex operation, communication , communication can take place in only one direction at a time. can take place in only one direction at a time. This is an obvious solution to a balanced This is an obvious solution to a balanced system employing only one set of wires system employing only one set of wires ---- if if signals were coming in both directions at signals were coming in both directions at once, they would conflict with each other. once, they would conflict with each other. However, in even systems in which different However, in even systems in which different pairs of wire are used for transmission and pairs of wire are used for transmission and reception can still operate in Halfreception can still operate in Half--Duplex Duplex mode. mode.

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CHANNEL TYPESCHANNEL TYPES

In In FullFull--Duplex systemsDuplex systems, transmission and , transmission and reception can occur at the same time. Thus reception can occur at the same time. Thus Point A can send information to Point B while Point A can send information to Point B while at the same time receiving data from Point B. at the same time receiving data from Point B. FullFull--Duplex operation becomes especially Duplex operation becomes especially important in systems where a single master is important in systems where a single master is communicating with multiple receivers. With a communicating with multiple receivers. With a FullFull--Duplex configuration, Point A can send Duplex configuration, Point A can send data to Point B while receiving data from Point data to Point B while receiving data from Point C. C.

CHANNEL TYPESCHANNEL TYPES

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SYNCHRONOUS TRANSMISSIONSYNCHRONOUS TRANSMISSION uses no start and stop bits but instead synchronizes uses no start and stop bits but instead synchronizes

transmission speeds at both the receiving and sending transmission speeds at both the receiving and sending end of the transmission using clock signals built into end of the transmission using clock signals built into each component. A continual stream of data is then each component. A continual stream of data is then sent between the two nodes. Due to there being no sent between the two nodes. Due to there being no start and stop bits the data transfer rate is quicker start and stop bits the data transfer rate is quicker although more errors will occur, as the clocks will although more errors will occur, as the clocks will eventually get out of sync, and the receiving device eventually get out of sync, and the receiving device would have the wrong time that had been agreed in would have the wrong time that had been agreed in protocol (computing) for sending/receiving data, so protocol (computing) for sending/receiving data, so some bytes could become corrupted (by losing bits). some bytes could become corrupted (by losing bits). Ways to get around this problem include reWays to get around this problem include re--synchronization of the clocks and use of check digits synchronization of the clocks and use of check digits to ensure the byte is correctly interpreted and to ensure the byte is correctly interpreted and received.received.

ASYNCHRONOUS TRANSMISSIONASYNCHRONOUS TRANSMISSION

uses start and stop bits to signify the beginning bit uses start and stop bits to signify the beginning bit ASCII character would actually be transmitted ASCII character would actually be transmitted using 10 bits e.g.: A "0100 0001" would become using 10 bits e.g.: A "0100 0001" would become "1 0100 0001 0". The extra one (or zero "1 0100 0001 0". The extra one (or zero depending on parity bit) at the start and end of depending on parity bit) at the start and end of the transmission tells the receiver first that a the transmission tells the receiver first that a character is coming and secondly that the character is coming and secondly that the character has ended. This method of transmission character has ended. This method of transmission is used when data is sent intermittently as is used when data is sent intermittently as opposed to in a solid stream. In the previous opposed to in a solid stream. In the previous example the start and stop bits are in bold. The example the start and stop bits are in bold. The start and stop bits must be of opposite polarity. start and stop bits must be of opposite polarity. This allows the receiver to recognize when the This allows the receiver to recognize when the second packet of information is being sent. second packet of information is being sent.

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PROTOCOLPROTOCOLA protocol is an agreedA protocol is an agreed--upon format for upon format for transmitting data between two devices e.g.: transmitting data between two devices e.g.: computer and printer. All communications computer and printer. All communications between devices require that the devices between devices require that the devices agree on the format of the data. The set of agree on the format of the data. The set of rules defining a format is called a protocol. rules defining a format is called a protocol. The protocol determines the following:The protocol determines the following:

the type of error checking to be used if any the type of error checking to be used if any e.g.: Check digit (and what type/ what e.g.: Check digit (and what type/ what formula to be used) formula to be used)

data compression method, if any e.g.: Zipped data compression method, if any e.g.: Zipped files if the file is large, like transfer across the files if the file is large, like transfer across the Internet, LANs and WANs. Internet, LANs and WANs.

PROTOCOLPROTOCOL how the sending device will indicate that it has how the sending device will indicate that it has

finished sending a message, e.g.: in a finished sending a message, e.g.: in a Communications port a spare wire would be used, for Communications port a spare wire would be used, for serial (USB) transfer start and stop digits may be serial (USB) transfer start and stop digits may be used. used.

how the receiving device will indicate that it has how the receiving device will indicate that it has received a message received a message

rate of transmission (in baud or bit rate) rate of transmission (in baud or bit rate)

whether transmission is to be synchronous or whether transmission is to be synchronous or asynchronous asynchronous

In addition, protocols can include sophisticated In addition, protocols can include sophisticated techniques for detecting and recovering from techniques for detecting and recovering from transmission errors and for encoding and decoding transmission errors and for encoding and decoding data.data.

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HANDSHAKINGHANDSHAKING

The process by which two devices initiate The process by which two devices initiate communications e.g.: a certain ASCII communications e.g.: a certain ASCII character or an interrupt signal/ request bus character or an interrupt signal/ request bus signal to the processor along the Control Bus. signal to the processor along the Control Bus.

Handshaking begins when one device sends a Handshaking begins when one device sends a message to another device indicating that it message to another device indicating that it wants to establish a communications channel. wants to establish a communications channel. The two devices then send several messages The two devices then send several messages back and forth that enable them to agree on a back and forth that enable them to agree on a communications protocol. Handshaking must communications protocol. Handshaking must occur before data transmission as it allows the occur before data transmission as it allows the protocol to be agreed.protocol to be agreed.

RSRS--232232 RSRS--232 (Recommended Standard 232) 232 (Recommended Standard 232)

is a standard for serial binary data is a standard for serial binary data signals connecting between a DTE (Data signals connecting between a DTE (Data terminal equipment) and a DCE (Data terminal equipment) and a DCE (Data CircuitCircuit--terminating Equipment). It is terminating Equipment). It is commonly used in computer serial commonly used in computer serial ports. A similar ITUports. A similar ITU--T standard is V.24. T standard is V.24.

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RSRS--232232The Electronic Industries Alliance (EIA) The Electronic Industries Alliance (EIA)

standard RSstandard RS--232232--C[1] as of 1969 defines:C[1] as of 1969 defines:

Electrical signal characteristics such as voltage Electrical signal characteristics such as voltage levels, signaling rate, timing and slewlevels, signaling rate, timing and slew--rate of rate of signals, voltage withstand level, shortsignals, voltage withstand level, short--circuit circuit behavior, maximum stray capacitance and cable behavior, maximum stray capacitance and cable length. length.

Interface mechanical characteristics, pluggable Interface mechanical characteristics, pluggable connectors and pin identification. connectors and pin identification.

Functions of each circuit in the interface Functions of each circuit in the interface connector. connector.

Standard subsets of interface circuits for Standard subsets of interface circuits for selected telecom applications. selected telecom applications.

RSRS--232232 The standard does not define such elements The standard does not define such elements

as character encoding (for example, ASCII, as character encoding (for example, ASCII, Baudot or EBCDIC) Baudot or EBCDIC)

the framing of characters in the data stream the framing of characters in the data stream (bits per character, start/stop bits, parity) (bits per character, start/stop bits, parity)

the framing of characters in the data stream the framing of characters in the data stream (bits per character, start/stop bits, parity) (bits per character, start/stop bits, parity)

protocols for error detection or algorithms for protocols for error detection or algorithms for data compression. data compression.

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RSRS--232232 bit rates for transmission, although the standard bit rates for transmission, although the standard

says it is intended for bit rates lower than 20,000 says it is intended for bit rates lower than 20,000 bits per second. Many modern devices can exceed bits per second. Many modern devices can exceed this speed (38,400 and 57,600 bit/s being this speed (38,400 and 57,600 bit/s being common, and 115,200 and 230,400 bit/s making common, and 115,200 and 230,400 bit/s making occasional appearances) while still using RSoccasional appearances) while still using RS--232 232 compatible signal levels. compatible signal levels.

Details of character format and transmission bit Details of character format and transmission bit rate are controlled by the serial port hardware, rate are controlled by the serial port hardware, often a single integrated circuit called a UART that often a single integrated circuit called a UART that converts data from parallel to serial form. A converts data from parallel to serial form. A typical serial port includes specialized driver and typical serial port includes specialized driver and receiver integrated circuits to convert between receiver integrated circuits to convert between internal logic levels and RSinternal logic levels and RS--232 compatible signal 232 compatible signal levelslevels

RSRS--232232

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RSRS--232232 CommonlyCommonly--used signals are:used signals are:

Transmitted Data (TxD)Transmitted Data (TxD)

Data sent from DTE to DCE. Data sent from DTE to DCE.

Received Data (RxD)Received Data (RxD)

Data sent from DCE to DTE. Data sent from DCE to DTE.

Request To Send (RTS)Request To Send (RTS)

Asserted (set to 0) by DTE to prepare DCE to Asserted (set to 0) by DTE to prepare DCE to receive data. This may require action on the part receive data. This may require action on the part of the DCE, e.g. transmitting a carrier or of the DCE, e.g. transmitting a carrier or reversing the direction reversing the direction

Clear To Send (CTS)Clear To Send (CTS)

Asserted by DCE to acknowledge RTS and allow Asserted by DCE to acknowledge RTS and allow DTE to transmit. DTE to transmit.

RSRS--232232

Data Terminal Ready (DTR)Data Terminal Ready (DTR) Asserted by DTE to indicate that it is ready to Asserted by DTE to indicate that it is ready to

be connected. If the DCE is a modem, this may be connected. If the DCE is a modem, this may "wake up" the modem, bringing it out of a "wake up" the modem, bringing it out of a power saving mode. This behaviour is seen power saving mode. This behaviour is seen quite often in modern PSTN and GSM modems. quite often in modern PSTN and GSM modems. When this signal is deWhen this signal is de--asserted, the modem asserted, the modem may return to its standby mode, immediately may return to its standby mode, immediately hanging up any calls in progress. hanging up any calls in progress.

Data Set Ready (DSR)Data Set Ready (DSR) Asserted by DCE to indicate an active Asserted by DCE to indicate an active

connection. If DCE is not a modem (e.g. a null connection. If DCE is not a modem (e.g. a null modem cable or other equipment), this signal modem cable or other equipment), this signal should be permanently asserted (set to 0), should be permanently asserted (set to 0), possibly by a jumper to another signal. possibly by a jumper to another signal.

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RSRS--232232

Data Carrier Detect (DCD)Data Carrier Detect (DCD) Asserted by DCE when a connection has been Asserted by DCE when a connection has been

established with remote equipment. established with remote equipment. Ring Indicator (RI)Ring Indicator (RI)

Asserted by DCE when it detects a ring signal Asserted by DCE when it detects a ring signal from the telephone line. from the telephone line.

NOTE:NOTE: The standard defines RTS/CTS as the The standard defines RTS/CTS as the signaling protocol for flow control for data signaling protocol for flow control for data transmitted from DTE to DCE. The standard has no transmitted from DTE to DCE. The standard has no provision for flow control in the other direction. In provision for flow control in the other direction. In practice, most hardware seems to have practice, most hardware seems to have repurposed the RTS signal for this function.repurposed the RTS signal for this function.

RSRS--232232

RTS : (Request to send) Bu sinyal DCE'yi DTE'den bir veri transferi iin uyarr.RTS : (Request to send) Bu sinyal DCE'yi DTE'den bir veri transferi iin uyarr.

CTS: (Clear to send) Bu sinyal DCE'nin veri almak iin hazr sinyali ile dier CTS: (Clear to send) Bu sinyal DCE'nin veri almak iin hazr sinyali ile dier DCE'den cevap bekler.DCE'den cevap bekler.

TD : tranmitted dataTD : tranmitted data

RD : received dataRD : received data

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RSRS--232232

RSRS--232232

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RSRS--232 SIGNAL232 SIGNAL

RSRS--485485

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RSRS--485485

OTHER SERIAL INTERFACESOTHER SERIAL INTERFACES RSRS--422 (a high422 (a high--speed system similar to RSspeed system similar to RS--232 but with 232 but with

differential signaling) differential signaling)

RSRS--485 (a descendant of RS485 (a descendant of RS--422 that can be used as a bus in 422 that can be used as a bus in multidrop configurations) multidrop configurations)

RSRS--423 (a high423 (a high--speed system similar to RSspeed system similar to RS--422 but with 422 but with unbalanced signaling) unbalanced signaling)

RSRS--449 (a functional and mechanical interface that used RS449 (a functional and mechanical interface that used RS--422 and RS422 and RS--423 signals 423 signals -- it never caught on like RSit never caught on like RS--232 and 232 and was withdrawn by the EIA) was withdrawn by the EIA)

MILMIL--STDSTD--188 (a system like RS188 (a system like RS--232 but with better 232 but with better impedance and rise time control) impedance and rise time control)

EIAEIA--530 (a high530 (a high--speed system using RSspeed system using RS--422 or RS422 or RS--423 423 electrical properties in an EIAelectrical properties in an EIA--232 pinout configuration, thus 232 pinout configuration, thus combining the best of both; supersedes RScombining the best of both; supersedes RS--449) 449)

TIATIA--574 (standardizes the 9574 (standardizes the 9--pin Dpin D--subminiature connector subminiature connector pinout for use with EIApinout for use with EIA--232 electrical signalling, as originated 232 electrical signalling, as originated on the IBM PC/AT) on the IBM PC/AT)

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USBUSB

USB USB Universal Serial Bus (USB) is a serial bus standard to Universal Serial Bus (USB) is a serial bus standard to

interface devices. interface devices.

A major component in the legacyA major component in the legacy--free PC, USB was free PC, USB was designed to allow peripherals to be connected using a designed to allow peripherals to be connected using a single standardized interface socket and to improve single standardized interface socket and to improve plugplug--andand--play capabilities by allowing devices to be play capabilities by allowing devices to be connected and disconnected without rebooting the connected and disconnected without rebooting the computer (hot swapping). computer (hot swapping).

Other convenient features include providing power to Other convenient features include providing power to lowlow--consumption devices without the need for an consumption devices without the need for an external power supply and allowing many devices to be external power supply and allowing many devices to be used without requiring manufacturer specific, individual used without requiring manufacturer specific, individual device drivers to be installed.device drivers to be installed.

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USB USB USB is intended to help retire all legacy USB is intended to help retire all legacy

varieties of serial and parallel ports. USB can varieties of serial and parallel ports. USB can connect computer peripherals such as mouse connect computer peripherals such as mouse devices, keyboards, PDAs, gamepads and devices, keyboards, PDAs, gamepads and joysticks, scanners, digital cameras, printers, joysticks, scanners, digital cameras, printers, personal media players, and flash drives. personal media players, and flash drives.

For many of those devices USB has become For many of those devices USB has become the standard connection method. the standard connection method.

USBUSB USB is also used extensively to connect nonUSB is also used extensively to connect non--

networked printers; USB simplifies connecting networked printers; USB simplifies connecting several printers to one computer. USB was several printers to one computer. USB was originally designed for personal computers, originally designed for personal computers, but it has become commonplace on other but it has become commonplace on other devices such as PDAs and video game devices such as PDAs and video game consoles. consoles.

In 2004, there were about 1 billion USB In 2004, there were about 1 billion USB devices in the world.devices in the world.

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USBUSB The design of USB is standardized by the USB The design of USB is standardized by the USB

Implementers Forum (USBImplementers Forum (USB--IF), an industry IF), an industry standards body incorporating leading standards body incorporating leading companies from the computer and electronics companies from the computer and electronics industries. Notable members have included industries. Notable members have included Apple Inc., HewlettApple Inc., Hewlett--Packard, NEC, Microsoft, Packard, NEC, Microsoft, Intel, and Agere.Intel, and Agere.

USBUSBUSB connection has three components: USB connection has three components:

OO HostHostOO HubHubOO USB deviceUSB device

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USB DATA RATESUSB DATA RATES USB supports three data rates:USB supports three data rates: A Low Speed (1.1, 2.0) rate of 1.5A Low Speed (1.1, 2.0) rate of 1.5 Mbit/s Mbit/s

(187(187 kB/s) that is mostly used for Human kB/s) that is mostly used for Human Interface Devices (HID) such as keyboards, Interface Devices (HID) such as keyboards, mice, and joysticks. mice, and joysticks.

A Full Speed (1.1, 2.0) rate of 12A Full Speed (1.1, 2.0) rate of 12 Mbit/s Mbit/s (1.5(1.5 MB/s). Full Speed was the fastest rate MB/s). Full Speed was the fastest rate before the USB 2.0 specification and many before the USB 2.0 specification and many devices fall back to Full Speed. Full Speed devices fall back to Full Speed. Full Speed devices divide the USB bandwidth between them devices divide the USB bandwidth between them in a firstin a first--come firstcome first--served basis and it is not served basis and it is not uncommon to run out of bandwidth with several uncommon to run out of bandwidth with several isochronous devices. All USB Hubs support Full isochronous devices. All USB Hubs support Full Speed. Speed.

A HiA Hi--Speed (2.0) rate of 480Speed (2.0) rate of 480 Mbit/s (60Mbit/s (60 MB/s). MB/s).

USB SIGNALUSB SIGNAL USB signals are transmitted on a twisted pair data cable USB signals are transmitted on a twisted pair data cable

with 90 with 90 15% impedance, labeled D+ and D15% impedance, labeled D+ and D--. .

These collectively use halfThese collectively use half--duplex differential signaling duplex differential signaling to combat the effects of electromagnetic noise on longer to combat the effects of electromagnetic noise on longer lines.lines.

D+ and DD+ and D-- usually operate together; they are not usually operate together; they are not separate simplex connections. separate simplex connections.

Transmitted signal levels are 0.0Transmitted signal levels are 0.00.3 volts for low and 0.3 volts for low and 2.82.83.6 volts for high in Full Speed and Low Speed 3.6 volts for high in Full Speed and Low Speed modes, and +modes, and +--400mV in High Speed (HS) mode. 400mV in High Speed (HS) mode.

In FS mode the cable wires are not terminated, but the In FS mode the cable wires are not terminated, but the HS mode has termination of 45 to ground, or 90 HS mode has termination of 45 to ground, or 90 differential to match the data cable impedance. differential to match the data cable impedance.

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USB PROTOCOLUSB PROTOCOL

USB uses a special protocol to negotiate the USB uses a special protocol to negotiate the High Speed mode called "chirping". High Speed mode called "chirping".

In simplified terms, a device that is HS In simplified terms, a device that is HS capable always connects as a FS device first, capable always connects as a FS device first, but after receiving a USB RESET (both D+ and but after receiving a USB RESET (both D+ and DD-- are driven LOW by host) it tries to pull the are driven LOW by host) it tries to pull the DD-- line high. If the host (or hub) is also HS line high. If the host (or hub) is also HS capable, it returns alternating signals on Dcapable, it returns alternating signals on D--and D+ lines letting the device know that the and D+ lines letting the device know that the tier will operate at High Speed.tier will operate at High Speed.

USBUSB When a new USB device is connected to a USB When a new USB device is connected to a USB

host, the host, the USB device enumerationUSB device enumeration process is process is started. The enumeration process first sends a started. The enumeration process first sends a reset signal to the USB device. The speed of the reset signal to the USB device. The speed of the USB device is determined during the reset USB device is determined during the reset signaling. After reset, USB device setup signaling. After reset, USB device setup information is read from the device by the host information is read from the device by the host and the device is assigned a unique hostand the device is assigned a unique host--controller specific 7controller specific 7--bit address. If the device is bit address. If the device is supported by the host, the device drivers needed supported by the host, the device drivers needed for communicating with the device are loaded for communicating with the device are loaded and the device is set to configured state. If the and the device is set to configured state. If the USB host is restarted, the enumeration process USB host is restarted, the enumeration process is repeated for all connected devices.is repeated for all connected devices.

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USB AND HIDUSB AND HIDMice and keyboards are frequently fitted with USB connectors, but because most PC motherboards still retain PS/2 connectors for the keyboard and mouse as of 2007, they are often supplied with a small USB-to-PS/2 adaptor, allowing usage with either USB or PS/2 interface. There is no logic inside these adaptors: they make use of the fact that such HID interfaces are equipped with controllers that are capable of serving both the USB and the PS/2 protocol, and automatically detect which type of port they are plugged in to. Joysticks, keypads, tablets and other human-interface devices are also progressively migrating from MIDI, PC game port, and PS/2 connectors to USB.

DATA BUSDATA BUS In computer architecture, a bus (bidirectional In computer architecture, a bus (bidirectional

universal switch) is a subsystem that transfers universal switch) is a subsystem that transfers data or power between computer components data or power between computer components inside a computer or between computers, inside a computer or between computers,

A bus typically is controlled by device driver A bus typically is controlled by device driver software. Unlike a pointsoftware. Unlike a point--toto--point connection, point connection,

A bus can logically connect several peripherals A bus can logically connect several peripherals over the same set of wires. over the same set of wires.

Each bus defines its set of connectors to Each bus defines its set of connectors to physically plug devices, cards or cables physically plug devices, cards or cables together.together.

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DATA BUSDATA BUS Early computer buses were literally parallel Early computer buses were literally parallel

electrical buses with multiple connections, but electrical buses with multiple connections, but the term is now used for any physical the term is now used for any physical arrangement that provides the same logical arrangement that provides the same logical functionality as a parallel electrical bus. functionality as a parallel electrical bus.

Modern computer buses can use both parallel Modern computer buses can use both parallel and bitand bit--serial connections, and can be wired in serial connections, and can be wired in either a multidrop (electrical parallel) or daisy either a multidrop (electrical parallel) or daisy chain topology, or connected by switched chain topology, or connected by switched hubs, as in the case of USB.hubs, as in the case of USB.

DATA BUSDATA BUS Most computers have both internal and external buses. Most computers have both internal and external buses.

An internal bus connects all the internal components of a An internal bus connects all the internal components of a computer to the motherboard (and thus, the CPU and computer to the motherboard (and thus, the CPU and internal memory).internal memory).

These types of buses are also referred to as a local bus, These types of buses are also referred to as a local bus, because they are intended to connect to local devices, not because they are intended to connect to local devices, not to those in other machines or external to the computer. to those in other machines or external to the computer. An external bus connects external peripherals to the An external bus connects external peripherals to the motherboard.motherboard.

Network connections such as Ethernet are not generally Network connections such as Ethernet are not generally regarded as buses, although the difference is largely regarded as buses, although the difference is largely conceptual rather than practical. conceptual rather than practical.

Modern trends in personal computers, especially laptops, Modern trends in personal computers, especially laptops, have been moving towards eliminating all external have been moving towards eliminating all external connections except for modem jack, Cat5, USB, connections except for modem jack, Cat5, USB, headphone jack, and optional VGA or FireWire.headphone jack, and optional VGA or FireWire.

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Description Controlling Standard and Date Market Acceptance Performance Notes

1553 Data Bus Mil Std 1553B Most US military aircraft systems now 1553 based.

1 Mb/s throughput at 16 bits

Optic Fiber Mil Std 1773 Widely used in space craft systems 1 Mb/s throughput, 32 bits (Dual rate AS 1773 in development to

provide 1 Mb/s or 20 Mb/s) Used for on-board command and

telemetry transfer between spacecraft components and

subsystems IEEE P1014-1987 (developed from

Motorola VersaBus) VME bus

-1981

Over 200 manufacturers, wide application in industrial and

commercial computing, also significant military application

40 Mb/s sustained throughput at 32 bits.

Extension of the 68xxx microprocessor technology, 32 bit

architecture. Current trend is use of mezzanine buses with VME

backplane to increase capability. PCI bus (Peripheral

Component Interconnect)

PCI-SIG 2.1 Local Bus Specification Widely used in commercial PC market 132 Mb/s peak throughput at 32 bits, (25 Mb/s sustained), 264 Mb/s

peak throughput at 64 bits

Originally based on x86/DOS processor technology

Futurebus+ IEEE 896.5a Proposed for military applications 100 Mb/s at 32 bits Advertised potential throughput 500 Mb/s; board size 300mmx300mm

twice the size of VME. Few manufacturers. High cost.

VME64 ANSI/VITA 1-1994 Developed from VME standard, expected to be produced by many of

current VME manufacturers

80 Mb/s sustained at 64 bits (proposed upgrade to 160 Mb/s

stalled by development problems) In production. Growth potential with VME320, with 320 Mb/s throughput

is in development

Mark 33 Digital Information Transfer

System

ARINC 429 Commercial aircraft data bus 100Kb/s or 12.5Kb/s at 25 or 32 bits Wide use in the commercial aircraft avionics industry.

SIB (Systems Interface Bus)

LeCroy P1123 (1990) Proprietary bus, some military applications

5 Mb/s throughput at 32 bits

ISA IEEE P-1882.1 (1996) (From IBM P-ISA, 1982)

De facto industry standard for commercial PC until

3 Mb/s throughput at 16 bits Widely used in commercial PC applications

GPIBGPIB-- GENERAL PURPOSE GENERAL PURPOSE

INTERFACE BUS IEEINTERFACE BUS IEE--488488

GPIB System

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GPIBGPIB-- GENERAL PURPOSE GENERAL PURPOSE INTERFACE BUS IEEINTERFACE BUS IEE--488488

The IEEEThe IEEE--488 interface bus, also known as the 488 interface bus, also known as the General Purpose Interface Bus "GPIB" is an 8 General Purpose Interface Bus "GPIB" is an 8 bit wide byte serial, bit parallel interface bit wide byte serial, bit parallel interface system which incorporates:system which incorporates: 5 control lines5 control lines 3 handshake lines3 handshake lines 8 bi8 bi--directional data lines.directional data lines.

GPIBGPIB-- GENERAL PURPOSE GENERAL PURPOSE INTERFACE BUS IEEINTERFACE BUS IEE--488488

The entire bus consists of 24 lines, with the The entire bus consists of 24 lines, with the remaining lines occupied by ground wires. remaining lines occupied by ground wires.

Additional features include: TTL logic levels Additional features include: TTL logic levels (negative true logic), the ability to communicate (negative true logic), the ability to communicate in a number of different language formats, and in a number of different language formats, and no minimum operational transfer limit. The no minimum operational transfer limit. The maximum data transfer rate is determined by a maximum data transfer rate is determined by a number of factors, but is assumed to be 1Mb/s.number of factors, but is assumed to be 1Mb/s.

Devices exist on the bus in any one of 3 general Devices exist on the bus in any one of 3 general forms:forms:

1. Controller1. Controller2. Talker2. Talker3. Listener3. Listener

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GPIBGPIB-- GENERAL PURPOSE GENERAL PURPOSE INTERFACE BUS IEEINTERFACE BUS IEE--488488

A single device may incorporate all three A single device may incorporate all three options, although only one option may be options, although only one option may be active at a time. active at a time.

The Controller makes the determination as to The Controller makes the determination as to which device becomes active on the bus. which device becomes active on the bus.

The GPIB can handle only 1 active The GPIB can handle only 1 active controller controller on the bus, although it may pass operation to on the bus, although it may pass operation to another controller. another controller.

Any Any number of active listeners can exist on number of active listeners can exist on the bus with an active talker as long as the bus with an active talker as long as no no more then 15 devices are connected to the more then 15 devices are connected to the bus.bus.

GPIBGPIB-- GENERAL PURPOSE GENERAL PURPOSE INTERFACE BUS IEEINTERFACE BUS IEE--488488

The controller determines which devices The controller determines which devices become active by sending interface messages become active by sending interface messages over the bus to a particular instrument. Each over the bus to a particular instrument. Each individual device is associated with a 5 bit BCD individual device is associated with a 5 bit BCD code which is unique to that device. By using code which is unique to that device. By using this code, the controller can coordinate the this code, the controller can coordinate the activities on the bus and the individual devices activities on the bus and the individual devices can be made to talk, listen (uncan be made to talk, listen (un--talk, untalk, un--listen) listen) as determined by the controller. A controller as determined by the controller. A controller can only select a particular function of a can only select a particular function of a device, if that function is incorporated within device, if that function is incorporated within the device; for example a listen only device the device; for example a listen only device can not be made to talk to the controller.can not be made to talk to the controller.

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GPIB DEVICESGPIB DEVICES A Controller is typically a board that you install in A Controller is typically a board that you install in

your computer. Talkers and Listeners are your computer. Talkers and Listeners are typically instruments such as oscilloscopes, typically instruments such as oscilloscopes, function generators, multimeters, and so on. function generators, multimeters, and so on. Most modern instruments are both Talkers and Most modern instruments are both Talkers and Listeners.Listeners.

A Talker transmits data over the interface when A Talker transmits data over the interface when addressed to talk by the Controller. There can be addressed to talk by the Controller. There can be only one Talker at a given time. only one Talker at a given time.

A Listener receives data over the interface when A Listener receives data over the interface when addressed to listen by the Controller. There can addressed to listen by the Controller. There can be up to 14 Listeners at a given time. Typically, be up to 14 Listeners at a given time. Typically, the Controller is a Talker while one or more the Controller is a Talker while one or more instruments on the GPIB are Listeners. instruments on the GPIB are Listeners.

GPIB DEVICESGPIB DEVICES The Controller specifies which devices are Talkers or The Controller specifies which devices are Talkers or

Listeners. Listeners.

A GPIB system can contain multiple Controllers one of A GPIB system can contain multiple Controllers one of which is designated the System Controller. However, only which is designated the System Controller. However, only one Controller can be active at a given time. The current one Controller can be active at a given time. The current active controller is the Controlleractive controller is the Controller--InIn--Charge (CIC). The Charge (CIC). The CIC can pass control to an idle Controller, but only the CIC can pass control to an idle Controller, but only the System Controller can make itself the CIC. System Controller can make itself the CIC.

When the Controller is not sending messages, then a When the Controller is not sending messages, then a Talker can send messages. Typically, the CIC is a Listener Talker can send messages. Typically, the CIC is a Listener while another device is enabled as a Talker. while another device is enabled as a Talker.

Each Controller is identified by a unique board index Each Controller is identified by a unique board index number. Each Talker/Listener is identified by a unique number. Each Talker/Listener is identified by a unique primary address ranging from 0 to 30, and by an optional primary address ranging from 0 to 30, and by an optional secondary address, which can be 0 or can range from 96 secondary address, which can be 0 or can range from 96 to 126.to 126.

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GPIB DATAGPIB DATAThere are two types of data that can be transferred There are two types of data that can be transferred over the GPIB: over the GPIB:

Instrument data Instrument data ---- Instrument data consists of vendorInstrument data consists of vendor--specific commands that configure your instrument, specific commands that configure your instrument, return measurement results, and so on. For a complete return measurement results, and so on. For a complete list of commands supported by your instrument, refer to list of commands supported by your instrument, refer to its documentation. its documentation.

Interface messages Interface messages ---- Interface messages are defined Interface messages are defined by the GPIB standard and consist of commands that by the GPIB standard and consist of commands that clear the GPIB bus, address devices, return selfclear the GPIB bus, address devices, return self--test test results, and so on. results, and so on.

Data transfer consists of one byte (8 bits) sent in Data transfer consists of one byte (8 bits) sent in parallel.The data transfer rate across the interface is parallel.The data transfer rate across the interface is limited to 1 megabyte per second. However, this data limited to 1 megabyte per second. However, this data rate is usually not achieved in practice, and is limited by rate is usually not achieved in practice, and is limited by the slowest device on the bus.the slowest device on the bus.

GPIB CONNECTORGPIB CONNECTOR

IEEEIEEE--488 / ANSI Connector488 / ANSI Connector

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INTERBUSINTERBUS

A/D D/A CONVERSIONA/D D/A CONVERSION

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A/D A/D -- D/A CONVERSIOND/A CONVERSION An analogAn analog--toto--digital converter (abbreviated ADC, digital converter (abbreviated ADC,

A/D or A to D) is an electronic integrated circuit, A/D or A to D) is an electronic integrated circuit, which converts continuous signals to discrete digital which converts continuous signals to discrete digital numbers. numbers.

The reverse operation is performed by a digitalThe reverse operation is performed by a digital--toto--analog converter (DAC).analog converter (DAC).

Typically, an ADC is an electronic device that Typically, an ADC is an electronic device that converts an input analog voltage (or current) to a converts an input analog voltage (or current) to a digital number. The digital output may be using digital number. The digital output may be using different coding schemes, such as binary, Gray code different coding schemes, such as binary, Gray code or two's complement binary. However, some nonor two's complement binary. However, some non--electronic or only partially electronic devices, such electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs.as rotary encoders, can also be considered ADCs.

RESOLUTIONRESOLUTION

The resolution of the converter indicates the The resolution of the converter indicates the number of discrete values it can produce over number of discrete values it can produce over the range of analog values. The values are the range of analog values. The values are usually stored electronically in binary form, so usually stored electronically in binary form, so the resolution is usually expressed in bits. In the resolution is usually expressed in bits. In consequence, the number of discrete values consequence, the number of discrete values available, or "levels", is usually a power of two. available, or "levels", is usually a power of two.

For example, an ADC with a resolution of 8 bits For example, an ADC with a resolution of 8 bits can encode an analog input to one in 256 can encode an analog input to one in 256 different levels, since 2different levels, since 288 = 256. = 256.

The values can represent the ranges 0 to 255 The values can represent the ranges 0 to 255 (i.e. unsigned integer) or (i.e. unsigned integer) or --128 to 127 (i.e. 128 to 127 (i.e. signed integer), for example, depending on the signed integer), for example, depending on the application.application.

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RESOLUTIONRESOLUTION

Resolution can also be defined electrically, and Resolution can also be defined electrically, and expressed in volts. The voltage resolution of expressed in volts. The voltage resolution of an ADC is equal to its overall voltage an ADC is equal to its overall voltage measurement range divided by the number of measurement range divided by the number of discrete intervals as in the formula:discrete intervals as in the formula:

LINEAR ADCsLINEAR ADCs Most ADCs are of a type known as linear, Most ADCs are of a type known as linear,

although analogalthough analog--toto--digital conversion is an digital conversion is an inherently noninherently non--linear process (since the linear process (since the mapping of a continuous space to a discrete mapping of a continuous space to a discrete space is a nonspace is a non--invertible and therefore noninvertible and therefore non--linear operation). The term linear operation). The term linearlinear as used here as used here means that the range of the input values that means that the range of the input values that map to each output value has a linear map to each output value has a linear relationship with the output value, i.e., that relationship with the output value, i.e., that the output value the output value kk is used for the range of is used for the range of input values from input values from mm((kk + + bb) to ) to mm((kk + 1 + + 1 + bb), ), where where mm and and bb are constants. are constants.

Here Here bb is typically 0 or 0.5. When is typically 0 or 0.5. When bb = 0, the = 0, the ADC is referred to as ADC is referred to as midmid--riserise, and when , and when bb = = 0.5 it is referred to as 0.5 it is referred to as midmid--treadtread..

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RESOLUTIONRESOLUTIONExample 1 Example 1

Full scale measurement range = 0 to 10 volts Full scale measurement range = 0 to 10 volts ADC resolution is 12 bits: 2ADC resolution is 12 bits: 21212 = 4096 quantization levels = 4096 quantization levels

(codes) (codes) ADC voltage resolution is: (10V ADC voltage resolution is: (10V -- 0V) / 4096 codes = 10V / 0V) / 4096 codes = 10V /

4096 codes 0.00244 volts/code 2.44 mV/code 4096 codes 0.00244 volts/code 2.44 mV/code Example 2 Example 2 Full scale measurement range = Full scale measurement range = --10 to +10 volts 10 to +10 volts ADC resolution is 14 bits: 2ADC resolution is 14 bits: 21414 = 16384 quantization levels = 16384 quantization levels

(codes) (codes) ADC voltage resolution is: (10V ADC voltage resolution is: (10V -- ((--10V)) / 16384 codes = 10V)) / 16384 codes =

20V / 16384 codes 0.00122 volts/code 1.22 mV/code 20V / 16384 codes 0.00122 volts/code 1.22 mV/code Example 3 Example 3 Full scale measurement range = 0 to 8 volts Full scale measurement range = 0 to 8 volts ADC resolution is 3 bits: 2ADC resolution is 3 bits: 233 = 8 quantization levels (codes) = 8 quantization levels (codes) ADC voltage resolution is: (8V ADC voltage resolution is: (8V -- 0V)/8 codes = 8V / 8 codes 0V)/8 codes = 8V / 8 codes

= 1 volts/code = 1000 mV/code = 1 volts/code = 1000 mV/code

ACCURACYACCURACY

An ADC has several sources of errors. An ADC has several sources of errors. Quantization error and (assuming the ADC is Quantization error and (assuming the ADC is intended to be linear) nonintended to be linear) non--linearity is intrinsic linearity is intrinsic to any analogto any analog--toto--digital conversion. There is digital conversion. There is also a soalso a so--called called aperture erroraperture error which is due to which is due to a clock jitter and is revealed when digitizing a a clock jitter and is revealed when digitizing a signal (not a single value).signal (not a single value).

These errors are measured in a unit called the These errors are measured in a unit called the LSBLSB, which is an abbreviation for least , which is an abbreviation for least significant bit. In the above example of an significant bit. In the above example of an eighteight--bit ADC, an error of one LSB is 1/256 of bit ADC, an error of one LSB is 1/256 of the full signal range, or about 0.4%.the full signal range, or about 0.4%.

eliminates the distortion. It is known as dither.eliminates the distortion. It is known as dither.

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QUANTQUANTIIZATZATIION ERRORON ERROR Quantization error is due to the finite resolution Quantization error is due to the finite resolution

of the ADC, and is an unavoidable imperfection in of the ADC, and is an unavoidable imperfection in all types of ADC. The magnitude of the all types of ADC. The magnitude of the quantization error at the sampling instant is quantization error at the sampling instant is between zero and half of one LSB.between zero and half of one LSB.

In the general case, the original signal is much In the general case, the original signal is much larger than one LSB. When this happens, the larger than one LSB. When this happens, the quantization error is not correlated with the quantization error is not correlated with the signal, and has a uniform distribution. Its RMS signal, and has a uniform distribution. Its RMS value is the standard deviation of this value is the standard deviation of this distribution, given by . In the eightdistribution, given by . In the eight--bit ADC bit ADC example, this represents 0.113% of the full signal example, this represents 0.113% of the full signal range.range.

NONNON--LINEARITYLINEARITY All ADCs suffer from nonAll ADCs suffer from non--linearity errors caused linearity errors caused

by their physical imperfections, causing their by their physical imperfections, causing their output to deviate from a linear function (or output to deviate from a linear function (or some other function, in the case of a some other function, in the case of a deliberately nondeliberately non--linear ADC) of their input. linear ADC) of their input.

These errors can sometimes be mitigated by These errors can sometimes be mitigated by calibration, or prevented by testing.calibration, or prevented by testing.

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ADCADC

HOLDING AND SAMPLINGHOLDING AND SAMPLING

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QUANTIZATIONQUANTIZATION

QUANTIZINGANALOG DATA DIGITIZING

DIGITAL DATA

ALIASINGALIASING All ADCs work by sampling their input at discrete All ADCs work by sampling their input at discrete

intervals of time. Their output is therefore an intervals of time. Their output is therefore an incomplete picture of the behaviour of the input. There incomplete picture of the behaviour of the input. There is no way of knowing, by looking at the output, what is no way of knowing, by looking at the output, what the input was doing between one sampling instant and the input was doing between one sampling instant and the next. the next.

If the input is known to be changing slowly compared to If the input is known to be changing slowly compared to the sampling rate, then it can be assumed that the the sampling rate, then it can be assumed that the value of the signal between two sample instants was value of the signal between two sample instants was somewhere between the two sampled values. If, somewhere between the two sampled values. If, however, the input signal is changing fast compared to however, the input signal is changing fast compared to the sample rate, then this assumption is not valid.the sample rate, then this assumption is not valid.

If the digital values produced by the ADC are, at some If the digital values produced by the ADC are, at some later stage in the system, converted back to analog later stage in the system, converted back to analog values by a digital to analog converter or DAC, it is values by a digital to analog converter or DAC, it is desirable that the output of the DAC be a faithful desirable that the output of the DAC be a faithful representation of the original signal. representation of the original signal.

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ALIASINGALIASING

If the input signal is changing much faster than the If the input signal is changing much faster than the sample rate, then this will not be the case, and spurious sample rate, then this will not be the case, and spurious signals called signals called aliasesaliases will be produced at the output of will be produced at the output of the DAC. the DAC.

The frequency of the aliased signal is the difference The frequency of the aliased signal is the difference between the signal frequency and the sampling rate. between the signal frequency and the sampling rate. For example, a 2For example, a 2 kHz sinewave being sampled at kHz sinewave being sampled at 1.51.5 kHz would be reconstructed as a 500kHz would be reconstructed as a 500 Hz sinewave. Hz sinewave.

This problem is called This problem is called aliasingaliasing.. To avoid aliasing, the input to an ADC must be lowTo avoid aliasing, the input to an ADC must be low--pass pass

filtered to remove frequencies above half the sampling filtered to remove frequencies above half the sampling rate. rate.

This filter is called an This filter is called an antianti--aliasingaliasing filter, and is essential filter, and is essential for a practical ADC system that is applied to analog for a practical ADC system that is applied to analog signals with higher frequency content.signals with higher frequency content.

ALIASINGALIASING

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ALIASINGALIASING

ALIASINGALIASING

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NYQUISTS SAMPLING NYQUISTS SAMPLING THEOREMTHEOREM

AliasingAliasing occursoccurs ifif a a signalsignal is not is not sampledsampled withwitha a frequencyfrequency greatergreater thanthan twicetwice of theof themaximummaximum frequencyfrequency of of thethe signalsignal..

ffss= 2 f = 2 f maksmaks

t=1/ t=1/ ffss

NYQUIST THEOREMNYQUIST THEOREM

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Signal ConditioningElectrical signals are conditioned so they can

be used by an analog input board. Types of signal conditioner:

Amplification Isolation Filtering Linearization

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Analog to Digital (A/D) Converter

A/D Converter: Input Signal Analog

Signal is continuous Example: strain gage. Most transducers

produce analog signals

Digital Signal is either ON or OFF Example: light switch.

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The data is acquired by an ADC using a process called sampling.

Sampling a analog signal - taking a sample of the signal at discrete times.

A/D Converter: Sampling

A/D Converter: Sampling Rate Determines how often conversions take

place. The higher the sampling rate, the better.

AnalogInput

4 Samples/cycle

8 Samples/cycle

16 Samples/cycle

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This rate at which the signal is sampled -sampling frequency.

Sampling frequency - determines the quality of the analog signal that is converted.

Higher sampling frequency achieves better conversion of the analog signals

A signal of lower frequency is generated from such a process (this is called aliasing).

Sample and hold Take the snapshot of the sensor signal and hold the

value Switch connect the capacitor and the capacitor hold the

value until the new sample is acquired

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DIRECT CONVERSION ADCDIRECT CONVERSION ADC

A direct conversion ADC or flash ADC has a A direct conversion ADC or flash ADC has a bank of comparators, each firing for their bank of comparators, each firing for their decoded voltage range. The comparator bank decoded voltage range. The comparator bank feeds a logic circuit that generates a code for feeds a logic circuit that generates a code for each voltage range. Direct conversion is very each voltage range. Direct conversion is very fast, but usually has only 8 bits of resolution fast, but usually has only 8 bits of resolution (256 comparators) or fewer, as it needs a (256 comparators) or fewer, as it needs a large, expensive circuitlarge, expensive circuit

SUCCESSIVESUCCESSIVE--APPROXIMATION ADCAPPROXIMATION ADC

A successiveA successive--approximation ADC uses a approximation ADC uses a comparator to reject ranges of voltages, comparator to reject ranges of voltages, eventually settling on a final voltage range. eventually settling on a final voltage range. Successive approximation works by constantly Successive approximation works by constantly comparing the input voltage to the output of comparing the input voltage to the output of an internal digital to analog converter (DAC, an internal digital to analog converter (DAC, fed by the current value of the approximation) fed by the current value of the approximation) until the best approximation is achieved. At until the best approximation is achieved. At each step in this process, a binary value of the each step in this process, a binary value of the approximation is stored in a successive approximation is stored in a successive approximation register (SAR). approximation register (SAR).

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SUCCESSIVESUCCESSIVE--APPROXIMATION ADCAPPROXIMATION ADC

RAMPRAMP--COMPARE ADCCOMPARE ADC

A rampA ramp--compare ADC (also called integrating, compare ADC (also called integrating, dualdual--slope or multislope or multi--slope ADC) produces a slope ADC) produces a sawsaw--tooth signal that ramps up, then quickly tooth signal that ramps up, then quickly falls to zero. When the ramp starts, a timer falls to zero. When the ramp starts, a timer starts counting. starts counting.

When the ramp voltage matches the input, a When the ramp voltage matches the input, a comparator fires, and the timer's value is comparator fires, and the timer's value is recorded. Timed ramp converters require the recorded. Timed ramp converters require the least number of transistors. least number of transistors.

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RAMPRAMP--COMPARE A/D COMPARE A/D CONVERSIONCONVERSION

DELTADELTA--ENCODED ADCENCODED ADC

A deltaA delta--encoded ADC has an upencoded ADC has an up--down counter down counter that feeds a digital to analog converter (DAC). that feeds a digital to analog converter (DAC). The input signal and the DAC both go to a The input signal and the DAC both go to a comparator. The comparator controls the comparator. The comparator controls the counter. The circuit uses negative feedback counter. The circuit uses negative feedback from the comparator to adjust the counter from the comparator to adjust the counter until the DAC's output is close enough to the until the DAC's output is close enough to the input signal. The number is read from the input signal. The number is read from the counter. Delta converters have very wide counter. Delta converters have very wide ranges, and high resolution, but the ranges, and high resolution, but the conversion time is dependent on the input conversion time is dependent on the input signal level, though it will always have a signal level, though it will always have a guaranteed worstguaranteed worst--case. case.

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PIPELINE ADCPIPELINE ADC

A pipeline ADC (also called subranging quantizer) uses A pipeline ADC (also called subranging quantizer) uses two or more steps of subranging. First, a coarse two or more steps of subranging. First, a coarse conversion is done. In a second step, the difference to conversion is done. In a second step, the difference to the input signal is determined with a digital to analog the input signal is determined with a digital to analog converter (DAC). This difference is then converted finer, converter (DAC). This difference is then converted finer, and the results are combined in a last step. This can be and the results are combined in a last step. This can be considered a refinement of the successive considered a refinement of the successive approximation ADC wherein the feedback reference approximation ADC wherein the feedback reference signal consists of the interim conversion of a whole signal consists of the interim conversion of a whole range of bits (for example, four bits) rather than just range of bits (for example, four bits) rather than just the nextthe next--mostmost--significant bit. By combining the merits significant bit. By combining the merits of the successive approximation and flash ADCs this of the successive approximation and flash ADCs this type is fast, has a high resolution, and only requires a type is fast, has a high resolution, and only requires a small die size. small die size.

SIGMASIGMA--DELTA ADCDELTA ADC

A SigmaA Sigma--Delta ADC (also known as a DeltaDelta ADC (also known as a Delta--Sigma ADC) oversamples the desired signal by Sigma ADC) oversamples the desired signal by a large factor and filters the desired signal a large factor and filters the desired signal band. Generally a smaller number of bits than band. Generally a smaller number of bits than required are converted using a Flash ADC after required are converted using a Flash ADC after the Filter. The resulting signal, along with the the Filter. The resulting signal, along with the error generated by the discrete levels of the error generated by the discrete levels of the Flash, is fed back and subtracted from the Flash, is fed back and subtracted from the input to the filter. input to the filter.

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DIGITALDIGITAL--TOTO--ANALOG ANALOG CONVERTER CONVERTER DACDAC

A digitalA digital--toto--analog converter (DAC or Danalog converter (DAC or D--toto--A) A) is a device for converting a digital (usually is a device for converting a digital (usually binary) code to an analog signal (current, binary) code to an analog signal (current, voltage or electric charge).voltage or electric charge).

An analogAn analog--toto--digital converter (ADC) performs digital converter (ADC) performs the reverse operation.the reverse operation.

A DAC usually only deals with pulseA DAC usually only deals with pulse--code code modulation (PCM)modulation (PCM)--encoded signals. The job of encoded signals. The job of converting various compressed forms of converting various compressed forms of signals into PCM is left to codecs.signals into PCM is left to codecs.

DIGITALDIGITAL--TOTO--ANALOG ANALOG CONVERTER CONVERTER DACDAC

The DAC fundamentally converts finiteThe DAC fundamentally converts finite--precision numbers precision numbers into a physical quantity, usually an electrical voltage. into a physical quantity, usually an electrical voltage.

Normally the output voltage is a linear function of the input Normally the output voltage is a linear function of the input number. number.

Usually these numbers are updated at uniform sampling Usually these numbers are updated at uniform sampling intervals and can be thought of as numbers obtained from a intervals and can be thought of as numbers obtained from a sampling process. sampling process.

These numbers are written to the DAC, sometimes along These numbers are written to the DAC, sometimes along with a clock signal that causes each number to be latched in with a clock signal that causes each number to be latched in sequence, at which time the DAC output voltage changes sequence, at which time the DAC output voltage changes rapidly from the previous value to the value represented by rapidly from the previous value to the value represented by the currently latched number. the currently latched number.

The effect of this is that the output voltage is held in time at The effect of this is that the output voltage is held in time at the current value until the next input number is latched the current value until the next input number is latched resulting in a piecewise constant output. resulting in a piecewise constant output.

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DIGITALDIGITAL--TOTO--ANALOG ANALOG CONVERTER CONVERTER DACDAC

This is equivalently a zeroThis is equivalently a zero--order hold operation and has an order hold operation and has an effect on the frequency response of the reconstructed effect on the frequency response of the reconstructed signal.signal.

The fact that practical DACs do not output a sequence of The fact that practical DACs do not output a sequence of dirac impulses (that, if ideally lowdirac impulses (that, if ideally low--pass filtered, result in the pass filtered, result in the original signal before sampling) but instead output a original signal before sampling) but instead output a sequence of piecewise constant values or rectangular sequence of piecewise constant values or rectangular pulses, means that there is an inherent effect of the zeropulses, means that there is an inherent effect of the zero--order hold on the effective frequency response of the DAC order hold on the effective frequency response of the DAC resulting in a mild rollresulting in a mild roll--off of gain at the higher frequencies off of gain at the higher frequencies (a 3.9224 dB loss at the Nyquist frequency). (a 3.9224 dB loss at the Nyquist frequency).

This zeroThis zero--order hold effect is a consequence of the hold order hold effect is a consequence of the hold action of the DAC and is not due to the sample and hold action of the DAC and is not due to the sample and hold that might precede a conventional analog to digital that might precede a conventional analog to digital converter as is often misunderstood.converter as is often misunderstood.

DACsDACs

Resolution: is the number of possible output levels the Resolution: is the number of possible output levels the DAC is designed to reproduce. This is usually stated as DAC is designed to reproduce. This is usually stated as the number of bits it uses, which is the base two the number of bits it uses, which is the base two logarithm of the number of levels. For instance a 1 bit logarithm of the number of levels. For instance a 1 bit DAC is designed to reproduce 2 (2DAC is designed to reproduce 2 (211) levels while an 8 ) levels while an 8 bit DAC is designed for 256 (2bit DAC is designed for 256 (288) levels. ) levels.

Maximum sampling frequency: This is a measurement Maximum sampling frequency: This is a measurement of the maximum speed at which the DACs circuitry can of the maximum speed at which the DACs circuitry can operate and still produce the correct output. As stated operate and still produce the correct output. As stated in the Shannonin the Shannon--Nyquist sampling theorem, a signal Nyquist sampling theorem, a signal must be sampled at over twice the freqency of the must be sampled at over twice the freqency of the desired signal. For instance, to reproduce signals in all desired signal. For instance, to reproduce signals in all the audible spectrum, which includes frequencies of up the audible spectrum, which includes frequencies of up to 20 kHz, it is necessary to use DACs that operate at to 20 kHz, it is necessary to use DACs that operate at over 40 kHz. over 40 kHz.

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4 BIT LADDER DAC4 BIT LADDER DAC

MULTIPLEXERMULTIPLEXER A multiplexer or mux (occasionally the term A multiplexer or mux (occasionally the term

muldex is also found, for a combination muldex is also found, for a combination multiplexermultiplexer--demultiplexer) is a device that demultiplexer) is a device that performs multiplexing: it selects one of many performs multiplexing: it selects one of many analog or digital data sources and outputs that analog or digital data sources and outputs that source into a single channel.source into a single channel.

A demultiplexer (or demux) is a device taking a A demultiplexer (or demux) is a device taking a single input that selects one of many datasingle input that selects one of many data--outputoutput--lines and connects the single input to the selected lines and connects the single input to the selected output line. A multiplexer is often used with a output line. A multiplexer is often used with a complementary demultiplexer on the receiving complementary demultiplexer on the receiving end.end.

Frequently a multiplexor and demultiplexor are Frequently a multiplexor and demultiplexor are combined into a single device capable of combined into a single device capable of processing both outgoing and incoming signals. processing both outgoing and incoming signals.

A multiplexor is sometimes called a mux and also A multiplexor is sometimes called a mux and also spelled as multiplexer.spelled as multiplexer.

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MULTIPLEXERMULTIPLEXER A real world example is the creation of telemetry for A real world example is the creation of telemetry for

transmission from the computer/instrumentation transmission from the computer/instrumentation system of a satellite, space craft or other remote vehicle system of a satellite, space craft or other remote vehicle to a ground system.to a ground system.

In analog circuit design, a multiplexer is a special type In analog circuit design, a multiplexer is a special type of analog switch that connects one signal selected from of analog switch that connects one signal selected from several inputs to a single output.several inputs to a single output.

MULTIPLEXERMULTIPLEXER--DEMULTIPLEXERDEMULTIPLEXER

Multiplexer

Demultiplexer

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MULTIPLEXERMULTIPLEXER--DEMULTIPLEXERDEMULTIPLEXER

Data Data AcquisitionAcquisition

A data acquisition system consists of many A data acquisition system consists of many components that are integrated to:components that are integrated to:

Sense physical variables (use of transducers)Sense physical variables (use of transducers)

Condition the electrical signal to make it Condition the electrical signal to make it readable by an A/D board readable by an A/D board

Convert the signal into a digital format Convert the signal into a digital format acceptable by a computeracceptable by a computer

Process, analyze, store, and display the Process, analyze, store, and display the acquired data with the help of softwareacquired data with the help of software

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Data Acquisition SystemBlock Diagram

Flow of information in DAQFlow of information in DAQ

1.1. Input transducer Input transducer measure physical quantitymeasure physical quantity

2.2. Output from transducer Output from transducer conditioned i.e. conditioned i.e. amplify, filter, conversionamplify, filter, conversion

3.3. Conditioned analog signal Conditioned analog signal digitized using ADCdigitized using ADC

4.4. Digital information Digital information acquired, process and acquired, process and record by computerrecord by computer

5.5. Modify physical signal, digital output converted Modify physical signal, digital output converted to analog by DACto analog by DAC

6.6. Analog signals are conditionedAnalog signals are conditioned

7.7. Output transducer interact with physical Output transducer interact with physical variablesvariables

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TransducersSense physical phenomena and translate it into

electricsignals.

Examples:

Temperature Pressure Light Force

Displacement Level Electric signals ON/OFF switch

Example of Computer DAQ SystemExample of Computer DAQ System

Computer

TimerDigital ControlCircuit

Trigger

Interrupt

Parallel/SeriesInput Port

Parallel/SeriesOutput Port

A/D

D/A

Filter+

-S/H

Sensor

Bridge

InstrumentationAmplifier

InputStrobe

Display

Control

Output Strobe

DAQ Board

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Data Acquisition Software It can be the most critical factor in obtaining reliable,

high performance operation. Transforms the PC and DAQ hardware into a

complete DAQ, analysis, and display system. Different alternatives:

Programmable software. Data acquisition software packages.

Programmable Software Involves the use of a programming language, such

as: C++, Visual C++ BASIC, Visual Basic + Add-on tools (such as

VisuaLab with VTX) Fortran C#

Advantage: flexibility Disadvantages: complexity and steep learning curve

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Data Acquisition Software Does not require programming. Enables developers to design the

custom instrument best suited to their application.

Examples: TestPoint, SnapMaster, LabView, DADISP, DASYLAB, etc.

In the processIn the process--control industry, sophisticated computer control industry, sophisticated computer programs have been availprograms have been avail--able for some time. Using able for some time. Using selections from various menus, the operator can configure selections from various menus, the operator can configure the program for the particular application. These programs the program for the particular application. These programs can be configured to take data from transducers at the can be configured to take data from transducers at the times requested, display the data on the screen, and use times requested, display the data on the screen, and use the data to perform required control functions. These the data to perform required control functions. These systems are often consystems are often con--figured by technicians rather than figured by technicians rather than engineers or programmers, so it is important that the engineers or programmers, so it is important that the software setup be straightforward. software setup be straightforward.

For complicated processing or control functions, it is For complicated processing or control functions, it is possible to include instructions programmed in a higherpossible to include instructions programmed in a higher--level language such as C. level language such as C.

SOFTWARE SOFTWARE FOR DAS SYSTEMSFOR DAS SYSTEMS

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SOFTWARE SOFTWARE FOR DAS SYSTEMSFOR DAS SYSTEMS There are a number of very sophisticated software There are a number of very sophisticated software

packages now available for personal computerpackages now available for personal computerbased based datadata--acquisition systems. These packages are very acquisition systems. These packages are very capablecapablethey can take data, display it in real time, write they can take data, display it in real time, write the data to files for subsequent processing by another the data to files for subsequent processing by another program, and perform some control functions. program, and perform some control functions.

TheThesese programs are configured for a particular application programs are configured for a particular application using menus or icons. using menus or icons.

SomeSome of of themthem may allow for the incorporation of C may allow for the incorporation of C program modulesprogram modules..

TThesehese software packages are the best choice for the software packages are the best choice for the majority of experimental situations. majority of experimental situations.