chapter7 cpu

8/3/2019 Chapter7 CPU

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Computer Organization

and Architecture

Chapter 7

Central Processing Unit (CPU)


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Central Processing Unit (CPU)

CPU structure and function

Instruction Sets: Characteristics

and Functions

Instruction Sets: Addressing Modes

and Formats


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CPU structure and function


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CPU Structure

CPU must:

Fetch instructions CPU reads an instruction frommemory

Interpret instructions instruction is decoded todetermine what action is required

Fetch data execution instruction may requirereading data from memory or I/O module

Process data execution instruction may requiredoing arithmetic or logical operation on data

Write data result of instruction may writing data tomemory or I/O module


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CPU Organization


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-The major components of the CPU are arithmeticand logic unit (ALU), Control Unit (CU) and

registers.

-The ALU does the actual computing or processingthe data

-The control unit controls the movement of data and

instructions into and out of the CPU and control theoperation of ALU.

-Registers is a small storage location in the CPU.

CPU Organization cont


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CPU Internal Structure


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Registers

CPU must have some working space (temporary

storage) Called registers

Number and function vary between processor designs

One of the major design decisions

Top level of memory hierarchy

General roles are performed by CPU register:

User-visible register-Enable assembly-language

programmer to minimize main memory references byoptimizing use of registers.

Control and status registers- Used by the control unit tocontrol the operation of CPU and to control the execution ofprograms.


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User Visible Registers

General Purpose

Data

Address

Condition Codes

General purpose-can be assigned to a variety of functions by theprogrammer. Can contain the operand for any opcode.

Data register-used only to hold data.

Address register-this register only hold address information.Condition codes-values set by the CPU as the result of performingoperations. Example code bits: zero, positive, negative


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Control & Status Registers

Four register essential to instruction execution (control themovement of data between CPU and memory):

Program counter (PC)contains the address of an instruction

to be fetched

Instruction register (IR)

Contains the instruction most

recently fetched

Memory address register (MAR) Contains the address of a

location in memory.

Memory buffer register (MBR) Contains a word of data to be

written to memory or the word most recently read.


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All CPU design include a register or a set of registers known as

Program Status Word (PSW), that contain status information Common fields or flags for PSW:

Sign -contain the sign bit of the result of the last arithmeticoperation.

Zero -set when the result is 0.

Carry -set if an operation resulted in a carry (addition) into orborrow (subtraction) out of a high-order bit.

Equal -set if a logical compare result is equality

Overflow -Used to indicate arithmetic overflow

Interrupt enable/disable -used to enable or disable interrupts

Supervisor -Indicates whether the CPU is executing in supervisoror user mode. Certain privileged instructions can be executed onlyin supervisor mode, and certain areas of memory can be accessedonly in supervisor mode.

Control & Status Registers cont.


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Example Register Organizations


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Instruction Sets:

Characteristics and Functions


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What is an instruction set?

The complete collection of instructions that are

understood by a CPU

Machine Code

Binary

Usually represented by assembly codes


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Elements of an Instruction

Operation code (Op code)

Do this

Source Operand reference

To this

Result Operand referencePut the answer here

Next Instruction Reference

When you have done that, do this...


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Where have all the Operands gone?

The location for the source and destination for

the operand can be in one of three areas:

-Main memory (or virtual memory or cache)

-CPU register-I/O device


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Instruction Cycle State Diagram


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Instruction Representation

In machine code each instruction has a unique

bit pattern

For human consumption (well, programmersanyway) a symbolic representation is used

e.g. ADD, SUB, LOAD Operands can also be represented in this way

ADD A,B


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Simple Instruction Format


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Instruction Types

Data processing

Data storage (main memory)

Data movement (I/O)

Program flow control


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Number of Addresses (a)

3 addresses

Operand 1, Operand 2, Result

a = b + c;

May be a forth - next instruction (usually implicit)

Not commonNeeds very long words to hold everything


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Number of Addresses (b)

2 addresses

One address doubles as operand and result

a = a + b

Reduces length of instruction

Requires some extra work Temporary storage to hold some results


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Number of Addresses (c)

1 address

Implicit second address

Usually a register (accumulator)

Common on early machines


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Number of Addresses (d)

0 (zero) addresses

All addresses implicit

Uses a stack

e.g. push a

push b add

pop c

c = a + b


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How Many Addresses

More addresses

More complex (powerful?) instructions

More registers

Inter-register operations are quicker

Fewer instructions per program

Fewer addresses

Less complex (powerful?) instructions

More instructions per program

Faster fetch/execution of instructions


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Types of Operand

Addresses

Numbers

Integer/floating point

Characters

ASCII etc.

Logical Data

Bits or flags


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Types of Operation

Data Transfer

Arithmetic

Logical

Conversion

I/O

System Control

Transfer of Control


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Data Transfer

Specify

Source

Destination

Amount of data

May be different instructions for differentmovements

e.g. IBM 370

Or one instruction and different addresses

e.g. VAX


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Arithmetic

Add, Subtract, Multiply, Divide

Signed Integer

Floating point ?

May include

Increment (a++)

Decrement (a--)

Negate (-a)


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Shift and Rotate Operations


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Logical

Bitwise operations

AND, OR, NOT


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Conversion

E.g. Binary to Decimal


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Input/Output

May be specific instructions

May be done using data movement instructions(memory mapped)

May be done by a separate controller (DMA)


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Systems Control

Privileged instructions

CPU needs to be in specific state

Ring 0 on 80386+

Kernel mode

For operating systems use


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Transfer of Control

Branch

e.g. branch to x if result is zero

Skip

e.g. increment and skip if zero

ISZ Register1Branch xxxx

ADD A

Subroutine call

c.f. interrupt call


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Branch Instruction


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Instruction Sets: Addressing Modes

and Formats


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Addressing Modes

Immediate

Direct

Indirect

Register

Register Indirect

Displacement (Indexed)

Stack


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Immediate Addressing

Operand is part of instruction

Operand = address field

e.g. ADD 5

Add 5 to contents of accumulator

5 is operand No memory reference to fetch data

Fast

Limited range


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Immediate Addressing Diagram

OperandOpcode

Instruction


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Direct Addressing

Address field contains address of operand

Effective address (EA) = address field (A)

e.g. ADD A

Add contents of cell A to accumulator

Look in memory at address A for operand Single memory reference to access data

No additional calculations to work out effectiveaddress

Limited address space


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Direct Addressing Diagram

Address AOpcode

Instruction

Memory

Operand


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Indirect Addressing (1)

Memory cell pointed to by address field contains

the address of (pointer to) the operand

EA = (A)

Look in A, find address (A) and look there foroperand

e.g. ADD (A)

Add contents of cell pointed to by contents of A toaccumulator


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Indirect Addressing (2)

Large address space

2n where n = word length

May be nested, multilevel, cascaded

e.g. EA = (((A)))

Draw the diagram yourself

Multiple memory accesses to find operand

Hence slower


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Indirect Addressing Diagram

Address AOpcodeInstruction

Memory

Operand

Pointer to operand


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Register Addressing (1)

Operand is held in register named in address

filed

EA = R

Limited number of registers

Very small address field neededShorter instructions

Faster instruction fetch


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Register Addressing (2)

No memory access

Very fast execution

Very limited address space

Multiple registers helps performance

Requires good assembly programming or compilerwriting

Likes C programming

register int a;

Same with Direct addressing


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Register Addressing Diagram

Register Address ROpcode

Instruction

Registers

Operand


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Register Indirect Addressing

EA = (R)

Operand is in memory cell pointed to bycontents of register R

Large address space (2n)

One fewer memory access than indirectaddressing


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Register Indirect Addressing Diagram

Register Address ROpcode

Instruction

Memory

OperandPointer to Operand

Registers


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Displacement Addressing

EA = A + (R)

Address field hold two values

A = base value

R = register that holds displacement

or vice versa


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Displacement Addressing Diagram

Register ROpcode

Instruction

Memory

OperandPointer to Operand

Registers

Address A

+


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Relative Addressing

A version of displacement addressing

R = Program counter, PC

EA = A + (PC)

i.e. get operand from A cells from current

location pointed to by PC locality of reference & cache usage


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Indexed Addressing

A = base

R = displacement

EA = A + R

Good for accessing arrays

EA = A + RR++


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Stack Addressing

Operand is (implicitly) on top of stack

e.g.

ADD Pop top two items from stackand add


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Stack Addressing

Top of stack register

Implicit

Instruction

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