chapter 2 basic principle of plc
DESCRIPTION
Chapter 2 Basic Principle of PLC. 2.1 PLC Configuration &Function. 2.1.1 Basic Configuration CPU Memory Programming Interface Communication Interfaces I/O Power Supply. 2.1 PLC Configuration &Function. Major PLC Manufacturers : Allen Bradley (Rockwell) Modicon (Schneider) - PowerPoint PPT PresentationTRANSCRIPT
Chapter 2
Basic Principle of PLC
2
2.1 PLC Configuration &Function 2.1.1 Basic Configuration CPUCPU MemoryMemory Programming InterfaceProgramming Interface Communication InterfacesCommunication Interfaces I/OI/O Power SupplyPower Supply.
3
2.1 PLC Configuration &FunctionMajor PLC Manufacturers:
Allen Bradley (Rockwell)Allen Bradley (Rockwell) Modicon (Schneider)Modicon (Schneider) General Electric – FanucGeneral Electric – Fanuc SiemensSiemens OmronOmron MitsubishiMitsubishi
4
2.1 PLC Configuration &Function
2.1.2 Function-----Input Elements:Input Elements: Control button: --start --Stop --Debug --Emergency Stopping
5
2.1 PLC Configuration &Function
2.1.2 Function-----Input Elements:Input Elements:Input Signal has two types:Input Signal has two types: ---Digital Input:---Digital Input:
from the relay or buttonsfrom the relay or buttons ---Analog Input:---Analog Input:
from the detection elements/sensors.from the detection elements/sensors.
Including the temperature, pressure, liquid and flow detection elements.Including the temperature, pressure, liquid and flow detection elements.
6
2.1 PLC Configuration &Function
2.1.2 Output Elements:put Elements:Control the site devices to work:Control the site devices to work: ---motor: Start, Run ---motor: Start, Run ---Valve: CW, CCW---Valve: CW, CCW
7
2.1 PLC Configuration &Function 2.1.2 CPU:: The rated output for the CPM2C-PA201 AC Power Supply Unit is 15 W. Any surplus power not required for the PC directly can be used as service power supply for sensors and other devices.
8
2.2 PLC Structure 2.2.1 Integration type CPU is integrated with the I/O devices. C Series of PLCs have 60-Points, 40-points, 28-points, 20-points.
9
2.2 PLC Structure 2.2.2 Unit type CPU is separated from the I/O devices. The special units include A/D, D/A, Temperature units, Position units, High-speed count units and so on.
10
2.3 PLC Work Process 2.3.3 CPM1/CPM1A Cycle Time and I/O Response Time
The overall flow of CPM1/CPM1A operation is as shown in the following flowchart.
11
12
2.3.1 CPM1/CPM1A Cycle Time
CPM1/CPM1A Cycle Time The processes involved in a single CPM1/CPM1A cycle are shown in the following.
13
2.3.1.1 CPM1/CPM1A Cycle Time
Cycle Time and Operations
The effects of the cycle time on CPM1/CPM1A operations are as shown below.
.
14
2.3.1.2 Cycle Time Example
In this example, the cycle time is calculated for a CPM1/CPM1A CPU Unit with 20 I/O points (12 input points and 8 output points). The I/O is configured as follows:
Inputs: 1 word (00000 to 00011)Outputs: 1 word (01000 to 01007)
15
2.3.1.2 Cycle Time Example
The rest of the operating conditions are assumed to be as follows:
User’s program:500 instructions (consists of only LD and OUT)
Cycle time: Variable (no minimum set)
• The average processing time for a single instruction in the user’s program is assumed
• to be 2.86 ms. The cycle times are as shown in the following table.
16
2.3.1.2 Cycle Time Example
17
2.3.2 I/O Response Time
The I/O response time is the time it takes after an input signal has been received (i.e., after an input bit has turned ON) for the PC to check and process the information and to output a control signal (i.e., to output the result of the processing to an output bit).
The I/O response time varies according to the timing and processing conditions.
18
2.3.2 I/O Response Time
The minimum and maximum I/O response times are shown here, using the following
program as an example.
19
2.3.2 I/O Response Time
The following conditions are taken as examples for calculating the I/O response
times.. Input ON delay: 8 ms (input time constant: default
setting) Overseeing time: 1 ms (includes I/O refresh for
CPM1A) Instruction execution time: 14 ms Output ON delay: 10 ms Peripheral port: Not used.
20
2.3.2 I/O Response Time Minimum I/O Response Time The
CPM1/CPM1A responds most quickly when it receives an input signal just
prior to I/O refreshing, as shown in the illustration below.
21
2.3.2 I/O Response Time
22
2.3.2 I/O Response Time
The following conditions are taken as examples for calculating the I/O response times.
In CPM1/CPM1A PCs, LR area words LR 00 to LR 15 are used in 1:1 data links and the transmission time is fixed at 12 ms.
Input ON delay: 8 ms (input time constant: default setting)
23
2.3.2 I/O Response Time
Master cycle time: 10 ms Slave cycle time: 15 ms Output ON delay: 10 ms Peripheral port: Not used.
24
2.3.3 Minimum I/O Response Time
1. The CPM1/CPM1A receives an input signal just prior to the input refresh
phase of the cycle. 2. The Master’s communications servicing
occurs just as the Master-to-Slave transmission begins. 3. The Slave’s communications servicing
occurs just after the transmission is completed.
25
2.3.3 Minimum I/O Response Time
26
2.3.3 Minimum I/O Response Time
Calculation formula = Input ON response time + Master’s cycle time + Slave’s
cycle time + Output ON response time
27
2.3.4 Maximum I/O Response Time
The CPM1/CPM1A takes the longest to respond under the following circumstances:
1. The CPM1/CPM1A receives an input signal just after the input refresh phase of the cycle.
28
2.3.4 Maximum I/O Response Time
2. The Master’s communications servicing just misses the Master-to-Slave
transmission. 3. The transmission is completed just
after the Slave’s communications servicing ends.
29
2.3.4 Maximum I/O Response Time
30
2.4 Interrupt Processing Time
This section explains the processing times involved from the time an interrupt is
executed until the interrupt processing routine is called, and from the time an interrupt
processing routine is completed until returning to the initial location.
This explanation applies to input interrupts, interval timer interrupts, and high-speed
counter interrupts.
31
2.4 Interrupt Processing Time
32
2.4.1 Example Calculation
This example shows the interrupt response time (i.e., the time from when the interrupt input turns ON until the start of the interrupt processing routine) when input interrupts are used under the conditions shown below.
33
2.4.1 Example Calculation
Minimum Response Time Interrupt ON delay: 100 ms Interrupt mask standby time: 0 ms + Change-to-interrupt processing: 30 ms Minimum response time: 130 ms Maximum Response Time (Except for the Online Editing of DM 6144 to DM6655) Interrupt ON delay: 100 ms Interrupt mask standby time: 170 ms + Change-to-interrupt processing: 30 ms Maximum response time: 300 ms
34
2.5 CPM2A/CPM2C Cycle Time and I/O Response Time
2.5.1 CPM2A/CPM2C Cycle Time
The processes involved in a single CPM2A/CPM2C cycle are shown in the following table, and their respective processing times are explained.
35
2.5.1 CPM2A/CPM2C Cycle Time
36
2.5.1 CPM2A/CPM2C Cycle Time
Cycle Time and Operations The effects of the cycle time on CPM2A/CPM2C operations are as shown below.
When a long cycle time is affecting operation, either reduce the cycle time or improve responsiveness with interrupt programs.
37
2.5.1 CPM2A/CPM2C Cycle Time
38
2.5.1 CPM2A/CPM2C Cycle Time
CPM2A/CPM2C Cycle Time and I/O Response Time
39
2.5.2 CPM2A/CPM2C Cycle Time and I/O Response Time CPM2A/CPM2C Cycle Time
2.5.3 Cycle Time Example
In this example, the cycle time is calculated for a CPM2A/CPM2C CPU Unit with30 I/O points (18 input points and 12 output points). The I/O is configured as follows:
40
2.5.3 Cycle Time Example
18 inputs: 2 words (00000 to 00011, 00100 to 00105) 12 outputs: 2 words (01000 to 01007, 01100 to 01103) The rest of the operating conditions are assumed to be
as follows: User’s program:500 instructions (consists of only LD
and OUT) Cycle time: Variable (no minimum set) The average processing time for a single instruction in
the user’s program is assumed to be 1.26 ms. The cycle times are as shown in the following table.
41
2.5.3 Cycle Time Example
42
2.6 Minimum I/O Response Time
The CPM2A/CPM2C responds most quickly when it receives an input signal just prior to I/O refreshing, as shown in the illustration below.
43
2.6 I/O Response Time
The I/O response time is the time it takes after an input signal has been received (i.e., after an input bit has turned ON) for the PC to check and process the information and to output a control signal (i.e., to output the result of the processing to an output bit).
The I/O response time varies according to the timing and processing conditions.
The minimum and maximum I/O response times are shown here, using the following program as an example.
44
2.6 I/O Response Time
The following conditions are taken as examples for calculating the I/O response times.Input ON delay: 10 ms (input time constant: default setting)Overseeing time: 1 ms (includes I/O refreshing)Instruction execution time: 14 msOutput ON delay: 15 msCommunications ports: Not used.
45
2.7 Minimum I/O Response Time
The CPM2A/CPM2C responds most quickly when it receives an input signal just prior to I/O refreshing, as shown in the illustration below.
46
2.8 Maximum I/O Response Time
The CPM2A/CPM2C takes longest to respond when it receives the input signal
just after the input refresh phase of the cycle, as shown in the illustration below.
In that case, a delay of approximately one cycle will occur.
47
2.8 Maximum I/O Response Time