chapter 11 differential amplifier circuitsstaff.utar.edu.my/limsk/analog electronics/chapter 11...

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Chapter 11

Differential Amplifier Circuits _____________________________________________ 11.0 Introduction Differential amplifier or diff-amp is a multi-transistor amplifier. It is the fundamental building block of analog circuit. It is virtually formed the differential amplifier of the input part of an operational amplifier. It is used to provide high voltage gain and high common mode rejection ratio. It has other characteristics such as very high input impedance, very low offset voltage and very low input bias current.

Differential amplifier can operate in two modes namely common mode and differential mode. Each type will have its output response illustrated in Fig. 11.1. Common mode type would result zero output and differential mode type would result high output. This shall mean the amplifier has high common mode rejection ratio.

Figure 11.1: Differential amplifier shows differential inputs and common-mode inputs

11 Differential Amplifier Circuits

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If two input voltage are equal, the differential amplifier gives output voltage of almost zero volt. If two input voltages are not equal, the differential amplifier gives a high output voltage.

Let’s define differential input voltage Vin(d) as Vin(d) = Vin1 – Vin2 and

common-mode input voltage Vin(c) = 2

VV 2in1in + . From these equations, input

voltage one and two are respectively equal to

Vin1 = 2

VV )d(in

)c(in + (11.1)

and

Vin2 = 2

VV )d(in

)c(in − (11.2)

The input voltage represented by common-mode voltage and differential voltage is shown in Fig. 11.2.

Figure 11.2: Small differential and common-mode inputs of a differential amplifier

Let Vout1 be the output voltage due to input voltage Vin1 and Vout2 be the output voltage due to Vin2. The differential-mode output voltage Vout(d) be defined as

Vout(d) = Vout1 – Vout2 and common-mode output is defined Vout(c) = 2

VV 2out1out +.

Combining these equations yield Vout1 as Vout2 respectively as equal to

Vout1 = 2

VV )d(out

)c(out + (11.3)


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and

Vout2 = 2

VV )d(out

)c(out − (11.4)

Let AV1 = Vout1/V in1 be the gain of differential amplifier due to input Vin1 only and AV2 Vout2/V in2 due to input Vin2 only. Then from superposition theorem, the output voltage Vout is equal to Vout = AV1V in1 + AV2V in2. After substituting Vin1 and Vin2 from equation (11.1) and (11.2), the output voltage Vout is equal to

Vout =

−+

+

2

VVA

2

VVA )d(in

)c(in2V)d(in

)c(in1V (11.5)

Equation (11.5) is also equal to Vout = AV(dm)V in(d) +AV(cm)V in(c), where the differential voltage gain is AV(dm) = (AV1 – AV2)/2 and common-mode voltage gain is AV(cm) = (AV1 + AV2).

The ability of a differential amplifier to reject common-mode signal depends on its common-mode rejection ratio CMRR, which is defined as

CMRR = )cm(V

)dm(V

A

A (11.6)

From Vout = AV(dm)V in(d) +AV(cm)V in(c), output voltage Vout is equal to

Vout =

+ )c(in)d(in)dm(V VCMRR

1VA (11.7)

Equation (11.7) clearly indicates that for large CMRR value, the effect of common-mode input is not significant to the output voltage. Example 11.1 A differential amplifier shown in figure below has differential gain of 2,500 and a CMRR of 30,000. In part A of the figure, a single-ended input of signal 500µV rms is applied. At the same time a 1V, 50Hz interference signal appears on both inputs as a result of radiated pick-up from ac power system.

In part B of the figure, differential input signal of 500µV rms each is applied to the inputs. The common-mode interference is the same as in part A.


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1. Determine the common-mode gain. 2. Express CMRR in dB. 3. Determine the rms output signal for part A and B. 4. Determine the rms interface voltage on the output. Solution 1. The common-mode gain Vcm = AV(dm)/CMRR= 2,500/30,000 = 0.083. 2. CMRR = 30,000. Also 20log(30,000) = 89.5dB. 3. The difference input for part A is 500µV - 0V = 500µV.

Thus, the rms output is AV(d) x 500µV = 2,500 x 500µV = 1.25Vrms The difference input for part B is 500µV - (-500µV) = 1mV Thus, the rms output is AV(d) x 1mV = 2,500 x 1mV = 2.5Vrms.

4. Since the common-mode gain Acm is 0.083 (from answer 1), then output voltage of interface from 1V 50Hz ac pick-up is Acm x 1V = 0.083V.

11.1 Bipolar Junction Transistor Differential Amplifier Consider an emitter coupled bipolar junction transistor differential amplifier shown in Fig. 11.3. Assuming that the physical parameters of transistor Q1 and Q2 are closed to identical. With the modern fabrication technique and fabricating the transistor Q1 and Q2 in close approximity in the same wafer slide, close to identical physical parameters for both transistors are achievable.


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Figure 11.3: A bipolar junction transistor differential amplifier

11.1.1 dc Characteristics Using Kirchhoff’s voltage law, the voltage at emitter VE1 and VE2, of the amplifier is Vin1 - VBE1 = Vin2 - VBE2. From the theory of semiconductor physics, the collector current IC of a bipolar transistor is equal to [ ]I I V VC S BE T= −exp( / ) 1 , where IS is the reverse saturation current, which is design dependent. VT is the thermal voltage, which has value approximately equal to 25.0mV at temperature 300K. Under normal operating conditions the term exp(VBE/VT) >> 1, thus, the

base-to-emitter voltage VBE is equal to V VI

IBE TC

S1 =

ln . The differential input

voltage Vin(d) = (Vin1 - Vin2) shall then be equal to

Vin(d) = VI

I

I

ITC1

S

S

C

ln1

2

2

⋅

(11.8)

For identical transistor pair reverse saturation current is IS1 = IS2 and Vin(d) =

2C

1CT I

IlnV . The ratio of collector current of transistor Q1 and transistor Q2 is

equal to


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I

I

V

VC1

C

in d

T2

=

exp

( ) (11.9)

The emitter current is IE = IE1 + IE2, which is also equal to IE = I IC1 C+ 2

α. Using

this equation and equation (11.9), the collector current IC1 and IC2 of the transistor are separately derived shown in equation (11.10) and (11.11).

II

V

V

C1E

in d

T

=+ −

α

1 exp( )

(11.10)

II

V

V

CE

in d

T

2

1

=+

α

exp( )

(11.11)

The current transfer characteristic curve showing the plot of collector current of transitor Q1 and Q2 versus the differential input voltage Vin(d) is shown in Fig. 11.4.

Figure 11.4: The current transfer characteristic curve of a bipolar junction transistor

differential amplifier From the characteristic curve, once can notice that for several VT values such as V in(d) > 4VT, either IC1 >> IC2 or IC1 << IC2 shall be obtained. For Vin(d) < 2VT, the collector current is almost linear.


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At the output side, the output voltage are Vout1 = VCC - IC1RC and Vout2 = VCC - IC2RC respectively. The differential output voltage Vout(d) shall be Vout(d) = RC(IC2 - IC1). The differential output voltage Vout(d) also equal to

V I RV

V

V

V

out d E Cin d

T

in d

T

( )( ) ( )exp exp

=+

−+ −

α1

1

1

1

(11.12)

This equation is also equal to V I RV

Vout d E C

in d

T( )

( )tanh=

−

α

2 since IC2 =

( ) ( ) ( )1 1 2 2 2/ exp( / exp / / exp( / ) exp( /( ) ( ) ( ) ( )+ = − − +V V V V V V V Vin d T in d T in d T in d T and IC1

= ( ) ( ) ( )1 1 2 2 2/ exp( / exp / / exp( / ) exp( /( ) ( ) ( ) ( )+ − = + −V V V V V V V Vin d T in d T in d T in d T . The

transfer characteristic of the output shall be as shown in Fig. 11.5.

Figure 11.5: Output transfer characteristic curve of a BJT differential amplifier

From the analysis, one can see that to increase the range of input voltage so that it has more linear operating region, a seperate emitter resistor which is termed as emitter-degeneration resistor, can be added to each transistor instead of sharing emitter resistor. This is becasue emitter current of each transistor will be double instead of half. This configuration will also improve the bandwidth of the amplifier. 11.1.2 Differential Mode The differential input circuit of the amplifier is shown in Fig. 11.6.


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Figure 11.6: Differential input circuit of an emitter couple BJT differential amplifier

Asssuming identical transistor, the increase of emitter voltage by Vin1 i.e Vin(d)/2 is compensated by the decrease of same value of emitter voltage by Vin2 i.e. – V in(d)/2. Thus, the voltage at emitter E1 and E2 remain unchange. Thus, the emitter current Ie is approximately zero. As the result the potential at emitter is regards as same potential as ground level and RE is treated as short.

Based on the analysis, the ac differential input circuit of the amplifier can be splitted into two half circuits as one is shown in Fig. 11.7.

Figure 11.7: ac differential mode half circuit of an emitter coupled BJT differential amplifier


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The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.8.

Figure 11.8: ac circuit of circuit shown in Fig. 11.7 The output voltage is equal to

( )2

Vr||Rg

2

V )d(inoCm

)d(out −= (11.13)

Thus, the differential-mode gain AV(dm) is equal to

( )oCm)d(in

)d(out)dm(V r||Rg

V

VA −== (11.14)

The differential input impedance Rin(d) can be obtained from equation Vin(d)/2 = ib1rπ. Thus, the differential input impedance is equal to Rin(d) = 2rπ (11.15) The differential output impedance Rout(dm) can be obtained from equation Vout(dm)/2 = iC(ro||RC). Thus, the differential output impedance Rout(dm) is equal to Rout(d) = 2(ro||RC) (11.16) 11.1.2 Common Mode The common input circuit of the amplifier is shown in Fig. 11.9 and its corresponding half circuit is shown in Fig. 11.10. Since emitter voltage at emitter E1 and E2 is changing, therefore, the emitter resistance of the half circuit should be 2RE instead of RE after splitting into two half circuits.


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Figure 11.9: Common input circuit of an emitter couple BJT differential amplifier

Figure 11.10: ac common mode half circuit of an emitter coupled BJT differential amplifier The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.11.


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Figure 11.11: ac circuit of circuit shown in Fig. 11.10

At input side, Vin(c) = ib1rπ +ib1(β+1)2RE. Thus, the common-mode input impedance Rin(c) is equal to Rin(c) = [rπ + (β +1)2RE] (11.17) The common-mode output impedance Rout(c) is equal to (RC||ro).

The output common-mode voltage Vout(c) = -βib1(RC||ro). The common-mode gain AV(cm) is equal to

AV(cm) = [ ])1(R2ri

)r||R(i

V

V

E1b

oC1b

)c(in

)c(out

+β+β

−=π

= )/11(Rg21

r||Rg

Em

oCm

β++− (11.18)

11.1.3 Common Mode Rejection Ratio The common-mode rejection ratio of the emitter coupled BJT differential amplifier is equal to CMRR = AV(dm)/AV(cm). Thus from equation (11.14) and (11.18), common-mode rejection ration is

CMRR = [ ])/11(Rg21)r||R(

)r||R(gEm

oC

oCm β++⋅−

−=[ ])/11(Rg21 Em β++

(11.19) For large beta value, the common rejection ratio is approximately equal to

[ ]EmRg21CMRR += . Thus, one can see for high common rejection ratio CMRR,


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the differential amplfier should be designed with high emitter resistance and high transconductance values.

11.2 JFET Differential Amplifier A JFET differential amplifier is shown in Fig. 11.12 and its ac equivalent circuit is shown in Fig. 11.4. Since JFET has very high impedance, it satisfies the high impedance and low input bias current requirements for the differential amplifier. Theoretically, the JFETs M1 and M2 should have same physical parameters. This can be achieved via modern fabrication technique. This shall also mean that close to zero offset voltage is also achievable.

Figure 11.12: A JFET differential amplifier 11.2.1 dc Characteristics Using Kirchhoff’s voltage law, the voltage at source of the amplifier is -Vin1 +

VGS1 + Vin2 – VGS2 = 0. Drain current of JFET is ID = IDSS

2

)off(GS

GS

V

V1

− .

Therefore, DSS

1D

)off(GS

1GS

I

I1

V

V−= and

DSS

2D

)off(GS

2GS

I

I1

V

V−= . Since – Vin1 + Vin2 = VGS2 –


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VGS1, Vin1 – Vin2 = DSS

D2)off(GS I

IV

DSS

1D)off(GS I

IV− . Since Vin1 – Vin2 = Vin(d), this

equation becomes

=)off(GS

)d(in

V

V

DSS

2D

I

I

DSS

1D

I

I− (11.20)

IS current is equal to the sum of ID1 and ID2. Thus, IS is IS = ID1 + ID2. Substituting this equation into equation (11.20) and solve the resultant quadratic, it yields drain current one and two, which are

ID1 =

2/12

S

DSS

2

)off(GS

)d(in

S

DSS

)off(GS

)d(inSS

I

I

V

V

I

I2

V

V

2

I

2

I

−

+ (11.21)

and

ID2 =

2/12

S

DSS

2

)off(GS

)d(in

S

DSS

)off(GS

)d(inSS

I

I

V

V

I

I2

V

V

2

I

2

I

−

− (11.22)

The equation for drain current is only true for sum of the drain currents less than IDSS current. The plot of drain current versu input differential voltage Vin(d) is shown in Fig. 11.13.

Figure 11.13: The current transfer characteristic curve of a JFET differential amplifier


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The output voltage Vout1 and Vout2 are respectively equal to VDD – ID1RD and VDD – ID2RD. The differential output voltage Vout(d) = Vout1 – vout2 = RD(ID2 – ID1). Substuting equation (11.21) and (11.22) yields the differential output voltage Vout(d) as

Vout(d) =

2/12

S

DSS

2

)off(GS

)d(in

S

DSS)d(in

)off(GS

DS

I

I

V

V

I

I2V

V

RI

−

− (11.23)

11.2.1 Differential Mode The differential input of the JFET differential amplifier can be analyzed like the way how the anlysis is done for BJT counterpart. The half circuit of the amplifier is shown in Fig. 11.14.

Figure 11.14: ac differential mode half circuit of a JFET differential amplifier

The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.15.



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The output voltage Vout(d)/2 is equal to

( )2

Vr||Rg

2

V )d(inoDm

)d(out −= (11.24)

Thus, the differential-mode gain AV(dm) is equal to

( )0Dm)d(in

)d(out)dm(V r||Rg

V

VA −== (11.25)

Normal RD << ro then the differential-mode gain AV(dm) is

Dm)d(in

)d(out)dm(V Rg

V

VA −== .

11.2.2 Common Mode The common input circuit of the amplifier is shown in Fig. 11.16 and its corresponding half circuit is shown in Fig. 11.17. Since source voltage at emitter S1 and S2 is changing, therefore, the emitter resistance of the half circuit should be 2RD instead of RD after splitting into two half circuits.

Figure 11.16: Common input circuit of a JFET differential amplifier


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Figure 11.17: ac common mode half circuit of a JFET differential amplifier The corresponding ac circuit of the half circuit amplifier is shown in Fig. 11.18.


At input side, common-mode input voltage is Vin(c) = Vgs1 + gmVgs12RS. Thus,

the common-mode input impedance Rin(c) = gate

)c(in

I

V is equal to

Rin(c) = gate

Sgsmgs

I

RV2gV += Rin(gate)(1 + 2gmRS) (11.17)


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where Vgs/Igate = Rin(gate). Depending on the value of Rin(gate) that can be a infinite value for very small Igate current.

The output common-mode voltage Vout(c) = -gmVgs1(RD||ro). The common-

mode gain AV(cm) = )d(in

)d(out

V

Vis equal to

AV(cm) = S1gsm1gs

oD1gsm

RVg2V

)r||R(Vg

+− =

Sm

oDm

Rg21

)r||R(g

+− (1126)

11.2.3 Common Mode Rejection Ratio The common-mode rejection ratio of the JFET differential amplifier is equal to CMRR = AV(dm)/AV(cm). Thus from equation (11.25) and (11.26), common-mode rejection ration is

CMRR = [ ]SmoDm

oDm Rg21)r||R(g

)r||R(g+⋅

−−

= [ ]SmRg21+

(11.27)

11.3 MOSFET Differential Amplifier A JFET differential amplifier is shown in Fig. 11.19. Using Kirchhoff’s voltage law, the voltage at source of the amplifier is -Vin1 + VGS1 + Vin2 – VGS2 = 0.

Drain current of MOSFET is ID = ( )2tnGS

oxn VVL2

WC−

µ= ( )2

tnGSn VVK − , where Kn

= L2

WCoxnµ. This implies that VGS = tn

D VK

I+ . From equation -Vin1 + VGS1 +

V in2 – VGS2 = 0. The differential input voltage Vin(d) is

Vin(d) = Vin1 – Vin2 = tn2D V

K

I+ - tn

1D VK

I− =

K

I

K

I 1D2D −

(11.28) From Kirchhoff’s current law, IS = ID1 + ID2 and substituting Vin(d). The drain currents are dound to be


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ID1 = 2/1

nS

2)d(in)d(in

SnS

)K2/I(

)2/V(1

2

VIK2

2

I

−

+ (11.29)

and

ID1 = 2/1

nS

2)d(in)d(in

SnS

)K2/I(

)2/V(1

2

VIK2

2

I

−

− (11.30)

Figure 11.19: A MOSFET differential amplifier

The output voltage Vout1 = VDD – ID1RD and Vout2 = VDD – ID2RD. The differential output voltage is Vout(d) = Vout1 – Vout2 = RD(ID2 – ID1). Substituting equation (11.29) and (11.30) into this equation yields the differential output voltage Vout(d) equal to

Vout(d) = )d(in

2/1

SnD V

2

IKR

− (11.31)

Employing the method used in JFET differential amplifier analysis, the common-mode gain AV(cm) and differential-mode gain AV(dm) are found to be


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AV(cm) = Sm

oDm

Rg21

)r||R(g

+− and AV(dm) = Dm)dm(V RgA − respectively. Subsequently, the

common-mode rejection ratio CMRR is found to be CMRR = [ ]SmRg21+ . 11.3.1 Active Load MOSFET Differential Amplifier Let’s consider an active load MOSFET differential amplifier shown in Fig. 11.20. MOSFET M1 and M2 formed the differential pair. They have same design parameters. MOSFET M5 is current sink, which provides the bias current to the amplifier. MOSFET M3 and M4 form a current mirror, which is assumed to have same design parameters.

From Kirchhoff’s current law, current ID5 is equal to the sum of current ID1 and ID2. If the input voltage Vin1 and Vin2 are equal then current ID1 = ID2 = ID3 = ID4. This shall mean the output current Iout is equal to zero. Thus, output voltage Vout is equal to zero.

If the input voltage Vin1 is greater than Vin2, which Vin1 > Vin2, then current

ID1, ID3, and ID4 are equal. This shall mean current ID1 is greater than ID2. Therefore, at output node current is ID4 = ID2 + Iout. This result implies that the output voltage is a positive value.

If the input voltage Vin2 is greater than Vin1, which Vin2 > Vin1, then current ID1, ID3, and ID4 are equal. This shall mean current ID1 is less than ID2. This implies that current ID2 is equal to the sum of current ID4 and Iout. i.e. ID2 = ID4 + Iout.

The differential input voltage is Vin(d) = (Vin1 –Vin2). For each input of the differential pair would see a change of (Vin1 – Vin2)/2 = Vin(d)/2. Thus, a change in input Vin(d)/2 will result a change of gmV in(d)/2 for the drain current of MOSFET M1 and M2. The ac equivalent circuit of output side is shown in Fig. 11.21.

The differential voltage gain AV(dm) of the differential amplifier is found to

be

AV(dm) = )R||r||r)(gg(2

1

VV

VL4O2O4m2m

1in2in

out +−=−

(11.32)


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Figure 11.20: An active load MOSFET differential amplifier

From Kirchhoff’s voltage law, output voltage is Vout = - (gm2V in(d)/2 +gm4V in(d)/2)(ro1||ro4||RL). Therefore, the differential voltage gain AV(dm) is Av(dm)

= )R||r||r)(gg(2

1

VV

VL4O2O4m2m

1in2in

out +−=−

.

In normal circumstance transcondctance gm2 is equal to transconductance

gm4. i.e. gm2 = gm4. Thus, the differential gain is )R||r||r(gA L4O2O2m)dm(V −= . Since

the output impedance of the MOSFET ro4 and ro2 are large, it can be assumed that they are equal. If the load RL is not connected then the differential gain

equation O2m

)dm(V r2

gA −= , where ro4 = ro2 = ro. The equation demonstrates that

the differential gain is a large constant for a given MOSFET in active load configuration.


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Figure 11.21: ac model of the half circuit of an active load MOSFET differential amplifier

11.4 BiCMOS Differential Amplifier The differential mode gain of a BJT differential amplifier is equal to AV(dm) = -

gmro. It is also equal to T

A

C

A

T

C)dm(V V

V

I

V2

V2

IA −=⋅−= . This result shows that the

gain is a constant value. For a typical Early voltage VA of 50V and thermal voltage VT of 25mV, the gain is – 2,000V/V. Thus, lowering the collector current IC will improve input impedance but reducing gm, thus, scarifying

bandwidth because the unity gain frequency fT of BJT is )CC(2

gm

πµ +π. The input

impedance of the BJT is equal to C

T

m I

V

gr β=β=π .

The differential mode gain AV(dm) of a MOSFET differential amplifier is

equal to AV(dm) = -gmro = D

MD

MD I

K2V2

I

V2KI2 −=⋅− , which shall mean gain is

inversely proportional to DI . Since the thermal voltage VM of MOSFET is much lower than the thermal voltage of BJT differential amplifier, the differential gain AV(dm) of BJT is much higher than differential gain of MOSFET differential amplifier. If drain current ID is lower, the bandwidth of the amplifier reduces because the transconductance gm is proportional to DI and the unity gain frequency fT is proportional to transconductance gm. The input impedance of the MOSFET has infinite value. Combining the high gain of BJT and infinite impedance of MOSFET will lead to BiCMOS differential amplifier design that


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can be a basic configuration, cascade configuration, active load configuration, etc. The circuit of active load BiCMOS differential amplifier is shown in Fig. 11.22.

Figure 11.22: An active load BiCMOS differential amplifier The differential voltage gain AV(dm) of the BiCMOS differential amplifier is equal to

Av(dm) = )R||r||r)(gg(2

1

VV

VL4O2O4m2m

1in2in

out +−=−

(11.33)

whereby 5D

M2m I

V2g = ,

5D

M4m I

V2g = ,

5D

M4O I

V2r = , and

5D

M2O I

V2r = . In normal

circumstance gm2 = gm4. Thus, the differential gain is AV(dm) =

)R||r||r(gVV

VL4O2O2m

1in2in

out −=−

.

Example 11.2


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A BiCMOS differential amplifier as shown in Fig. 11.21 has ID5 = 10µA, identical BJT with VA = 50V and β = 40, identical MOSFET with VM = 20V, K = 25µA/V2, W = 30µm, L = 10µm, VGS = 1.0V, VDD = 10 V and VSS = 10V Determine the differential gain of the amplifier without the load RL and Vbias voltage. Solution The output impedance of the BJT is 2VA/ID5 = 2x50/10µA = 4MΩ. The output impedance of the MOSFET is 2VM/ID5 = 2x20/10µA = 10MΩ. The overall output impedance RO of differential amplifier is 4MΩ||10MΩ = 2.86MΩ. The transconductance gm2 of MOSFET is A10xV/A25x2KI2 2

5D µµ= =

22.36µA/V. Thus, the differential voltage gain AV(dm) is -gm2RO = - 22.36x2.86MΩ = - 63.9. The gate-to-source voltage of MOSFET M5 is 1.5V. The current ID5 is ID5 =

( )2tnGS

nOX VVL

W

2

C−

µ = 2.5x10-5x3/2(VGS – 1.0)2 = 10µA. This implies that VGS

is equal to 1.51V. Since VS = - 10V and VGS = Vbias - VS, Vbias is equal to -8.49 V.

11.5 Cascode Differential Amplifier Let’s discuss one type of cascade differential amplifier, which is bipolar junction transistor type.

Consider a BJT cascode differential amplifier shown in Fig. 11.23. This configuration is usually to improve the output resistance for the gain and frequency response. Transistor Q5 and Q6 are connected as common base amplifier.

The half circuit of the amplifier is shown in Fig. 11.24. The ac circuit of

the half circuit amplifier is shown in Fig. 11.25. From the ac circuit rπ6/(β+1) is parallel to ro2 i.e. rπ6/(β+1) || ro2. All ro2, ro4,

and ro6 are the same because the collector current flows in them are the same ro. The transconductance gm2, gm4, and gm6 should be equal to gm.


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Figure 11.23: A BJT cascode differential amplifier


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Figure 11.24: Half circuit of a BJT cascade differential amplifier The output voltage is equal to Vout = )R||r(Vg Lo)d(inm− . Thus, the differential-

mode gain is equal to AV(dm) = )R||r(g Lom− .

Figure 11.25: ac circuit of the half circuit differential amplifier

11.6 Effect of Device Mismatch An ideal BJT differential amplifier has identical transistor pair and bias resistors. This shall mean that if the differential input voltage Vin(d) is zero then the differential output voltage Vout(d) should be zero. In reality, there should have some mismatch in the bias resistor and the transistor pair should have offset difference.

The offset voltage of a differential amplifier Vos is defined the input differential voltage Vin(d) required to drive the output differential voltage Vout(d) to zero voltage. From Fig. 11.2, the offset voltage Vos shall be Vos = Vbe1 - Vbe2, which is also equal to

Vos = VI

I

I

ITC1

S

S

C

ln1

2

2

⋅

(11.34)

Offset voltage can also be expressed as the change of collector resistance and reverse saturation current of the transistors in which it follows equation (11.35).


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Vos = VR

R

I

ITC

C

S

S

− −

∆ ∆ (11.35)

where ∆RC = RC1 - RC2, ∆IS = IS1 - IS2, RR R

CC1 C=

+ 2

2, and I

I IC

S S=+1 2

2.

11.7 Frequency Response of Differential Amplifier If the base resistor RB is added to the bipolar junction transistor differential amplifier circuit shown in Fig. 11.2, then the differential mode voltage gain

AV(dm) shall be Av(dm) = −+

g Rr

r Rm CB

π

π. From the earlier analysis of high

frequency response of the common-emitter configuration, the differential mode voltage gain transfer function is Av(dm)(s) =

( ))CC(R||rs1

1

Rr

rRg

MBBCm ++

⋅+

−πππ

π

)CC(sR1

1

ceC ++⋅

µ

, where CM is Miller's

capacitance, which is equal to Cµ(1 + gmRC) and Cµ is the collector-to-base capacitance. From the function, it shows there are two critical frequency fH and

fH1 determined by [ ])CC(R||r2

1

MB +π ππ

and [ ]1

2π µR C CB ce( )+. However, due to

very small value of Cce and Cµ, and small RC, the critical frequency is extremely high, which can be infinite. Since there is no coupling capacitor in the circuit, the bandwidth different mode gain shall be from zero Hz frequency to fH. The frequency response is shown in Fig. 11.26.

The frequency response for the common mode voltage gain of the amplifier can be analyzed using small signal equivalent half circuit shown in Fig. 11.27 and the emitter current source is replaced with a capacitor Co and a resistor Ro.


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Figure 11.26: Frequency response of differential mode gain

Figure 11.27: ac equivalent circuit of the common mode differential amplifier

The common mode output voltage Vout(c) is -gmVπRC. At base-to-emitter loop, from Kirchhoff’s voltage law, it produces Vin(c)(s) =

+++

π

π

ππ

π

π

oom

B

sC

1||RVg2

2/r

VV

2

R

2/r

V or Vin(c)(s) =

+

β+++ππ

πoo

oB

CsR1

R

r

121

r

RV . Substituting Vπ from Vout(c)(s) equation, the

commom mode voltage gain AV(cm)(s) shall be


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AV(cm)(s) = ( )

− +

+

+ +

+g R sR C

R

rsR C

R

r

m C o o

Bo o

o

( )

( )

1

1 12 1

π π

β (11.36)

The gain equation shows that there is a zero and a pole. From the zero, the critical frequency fZ shall be ( )1 2/ πR Co o . The zero also explains why Co parallel with Ro. At low frequency, Co is a open circuit and the common signal see impedance Ro. As frequency increase, the impedance Co decreases and Ro becomes bypassed. Since the current source can has very high resistance Ro and small capacitance Co, the critical frequency can be very small. Soon the operating frequency is more than the critical frequency, the gain of the amplifier increases at the rate 20 dB/decade or 6 dB/octave. Figure 11.28 illustrates the freqeuncy response.

Figure 11.28: Frequency response of the common mode gain

From equation (11.36), the critical frequency of the pole is

f Peq oR C

=1

2π (11.37)

where RR

R

r

R

r

R

r

eq

oB

B o=

+

+ ++

1

12 1

π

π π

β( ). The denominator of this resistance Req is very

large due to (1 + β)Ro term. This shall mean that Req is very small. Therefore, the critical frequency is very high.


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If the ratio of the frequency response for differential mode gain and common mode gain is plotted, then the frequency response of common mode rejection ratio shall be obtained and it is shown in Fig. 11.29.

Figure 11.29: Frequency response of the common mode rejection ratio


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Exercises 11.1. An active load emitter coupled BJT differential amplifier is shown in the

Fig.

i. Draw differential half circuit for the amplifier. ii. Show that the differential-mode gain AV(dm) = ).R||r||r(g L4o2om− iii. If ro2 = ro4 = ro, prove that the differential-mode gain is equal to

T

A)dm(V V2

VA −= .

iv. Calculate the room temperature differential-mode gain of the amplifier if the Early voltage of the transistor is 80V and express the result in decibel.

v. Comment the result.

11.2. An n-channel MOSFET differential amplifier is shown below. Both MOSFETs have aspect ratio W/L = 25µm/1.0µm, µnCox = 50µA/V2, threshold voltage VT = 0.6V, and VDD = 3.0V. You may use equation ID =

( )= −W C

LV Vn ox

GS T

µ2

2for calculation and assume both MOSFET's have

same design parameters.


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i. Prove that the common mode gain of the amplifier is −+

R

g RD

m S

/

/ ( )

2

1 2.

ii. What is the common mode input voltage Vin1 = Vin2 for the voltage drop across resistor RS to be 0.6V?

iii. What should be the value of resistor RS for maintaining 0.6V voltage drops across it?

11.3. An n-channel MOSFET differential amplifier is show below has common

mode gain follow expression −+

R

g RD

m S

/

/ ( )

2

1 2. Both MOSFETs have

aspect ratio W/L = 25µm/1.0µm, µnCox = 50µA/V2, threshold voltage VT = 0.6V, RS = 600Ω, and VDD = 3.0V. You may use equation ID =

( )= −W C

LV Vn ox

GS T

µ2

2for calculation and assume both MOSFET's have

same design parameters.


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i. Prove that the differential mode gain of the amplifier is − g Rm D . ii. Derive the equation for transconductance gm. iii. Derive the formula for the common rejection ratio for the amplifier.

State a way to improve this parameter. iv. Calculate the common rejection ratio of this amplifier and express

the result in decibel. 11.4. The parameters of the emitter-coupled pair BJT differential amplifier are

β = 100, RE = 50 kΩ, IE = 1mA, VCC = 15V, RC = 10 kΩ .

i. Calculate the dc collector current of Vin(d) = 5mV. ii. Calculate the CMRR of the amplifier.

11.5. The design of JFET differential amplifier is shown in the Fig. with one

input terminal is grounded. The dc biasing current IS = 10mA, VDD = – VSS = 15V. The JFETs are identical and have VGS(off) = - 4.0V and IDSS = 20mA. A small signal voltage of A1 = -10 is required. Calculate the design values of AV(dm), AV(cm), and CMRR.


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11.6. Calculate the differential gain of the given MOSFET amplifier circuit

shown in the in figure. Given that Vbias = - 3.5V, µnCox = 5.2x10-5A/V2, µpCox = 2.1x10-5A/V2, Vtn = 0.7V, Vtp = - 0.7V, (W/L)1,2 = 40, (W/L)3,4 = 20, (W/L)5 = 40, (1/λ)1,2 = 0.01, (1/λ)3,4 = 0.02, and RL = 5.0kΩ.


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Bibliography 1. Jacob Millman and Arvin Grabel, "Microelectronics", second edition,

McGraw-Hill International Editions, 1987. 2. Muhammad H. Rashid, "Microelectronic Circuits: Analysis and Design",

PWS Publishing Company, 1999. 3. Robert T. Paynter, "Electronic Devices and Circuits", fifth edition,

McGraw-Hill, 1997. 4. Adel S. Sedra and Kenneth C. Smith, "Microelectronic Circuits", fourth

edition, Oxford University Press, 1998. 5. Theodore F. Bogart Jr., Jeffrey S. Beasley, and Guillermo Rico,

“Electronic Devices and Circuit”, sixth edition, Prentice Hall, 2004.

chapter 11 differential amplifier circuitsstaff.utar.edu.my/limsk/analog electronics/chapter 11...

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