challenges in concurrent computing
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Challenges in Concurrent Computing. Danny Hendler. Moore’s law Exponential growth in computing power. The Future of Computing. Speeding up uni-processors is harder and harder Intel, Sun (RIP), AMD, IBM now focusing on “multi-core” architectures Already, multiprocessors are everywhere: - PowerPoint PPT PresentationTRANSCRIPT
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Challenges in Concurrent Computing
Danny Hendler
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From the New York Times …
May 7th, 2004 – “Intel said on Friday that it was scrapping its development of a faster Pentium 4 to focus on “dual core” microprocessors, a move that is a shift in the company's business strategy….”
May 8th,2004 – “Intel … [has] decided to focus its development efforts on “dual core” processors …. with two engines instead of one, allowing for greater efficiency because the processor workload is essentially shared.”
, מצטיינים 2012למאי 20סמינר
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Moore’s lawExponential growth in computing power
, מצטיינים 2012למאי 20סמינר
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The Future of Computing Speeding up uni-processors is harder and harder Intel, Sun (RIP), AMD, IBM now focusing on “multi-core”
architectures Already, multiprocessors are everywhere:
o Desktops
o Laptop
o Smart phones
o Smart TVs
o ...?
, מצטיינים 2012למאי 20סמינר
How can programmers write correct, efficient and scalable algorithms for multiprocessors?
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, מצטיינים 2012למאי 20סמינר
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Synchronization alternatives: coarse-grained locks
Pros Easy to
program
Cons Sequential
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Synchronization alternatives: fine-grained locks
Pros Potentially scalable
Cons Difficult to program
correctlyo Deadlocko Priority inversiono Convoying
Locks do not compose
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compare-and-swapLoad-link/store-
conditionalSwap, fetch-and-add
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Synchronization alternatives: nonblocking
synchronization Various progress guarantees
o Wait-freedom, o Lock-freedomo Obstruction-freedom
Generally requires strong synchronization
Pros Potentially scalable Avoids lock-based hazards
Cons Extremely difficult to program
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, מצטיינים 2012למאי 20סמינר
Synchronization alternatives: Transactional Memory
A (memory) transaction is a sequence of memory reads and writes executed by a single thread that either commits or aborts
If a transaction commits, all the reads and writes appear to have executed atomically
If a transaction aborts, none of its operations take effect
Transaction operations aren't visible until they commit (if they do)
To be supported soon in hardware by Intel and IBM processors
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Talk outline
IntroductionNon-blocking algorithms (separate presentation)Randomized mutual exclusion (separate presentation)
Research directions
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, מצטיינים 2012למאי 20סמינר
Talk outline
IntroductionNon-blocking algorithms (separate presentation)Randomized mutual exclusion (separate presentation)
Research directions
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, מצטיינים 2012למאי 20סמינר
Talk outline
IntroductionNon-blocking algorithms (separate presentation)Randomized mutual exclusion (separate presentation)
Research directions
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Devising efficient implementations of transactional memory Includes incorporating OS kernel support
Devising efficient and scalable lock-based and non-blocking data structures Some find their way to Java libraries
Devising algorithms that use few barrier instructions ... , מצטיינים 2012למאי 20סמינר
Research directions: practical
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Research directions: theoretical
Lower bounds and impossibility results on deterministic and randomized mutual exclusion
Lower bounds and impossibility results on concurrent data-structures' (counters, stacks, queues, ...) complexity according to various metrics.
Formulating novel realistic metrics for concurrent algorithms and corresponding upper/lower bounds
, מצטיינים 2012למאי 20סמינר
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, מצטיינים 2012למאי 20סמינר