ca s8 assembly

8/12/2019 CA S8 Assembly

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E N G . S O U H A I L A N A D A



INTRO:

As you know, any programming language is a medium through which

humans may give instructions to a computer.

Computer Languages:

HLL

LLL

Compiler :

HLL ---> | compiler|---> assembly --->| assembler|---> machine

language language

E N G . S O U H A I L A N A D A 3



HUMAN READABLE LANGUAGE:

- Computers like ones and zeros…

A CPU can only execute Machine language instructions…. Bits

stream…

- Humans like symbols…


0001110010000110

ADD R6,R2,R6 ; increment index reg.



WHAT IS AN ASSEMBLY LANGUAGE?

Assembly language is a low level programming language. We use symbolic

names to represent operations, registers, and memory location.Writing in assembly is efficient; because it is so close to machine language

A program written in assembly language must be converted to machine

language before the CPU can execute it.

A program called Assembler translates each assembly language statement into

a single machine language instruction




Example,

A program expressed in IBM PC assembly language would look like this:


Assembly LanguageInstruction

Comment

MOV AX,A

; fetch the contents of

location ; A and put it in

register AX

ADD AX,4 ; Add 4 to AX

MOV A, AX

; Move the contents of AX

into

; location A



BENEFITS OF WRITING IN ASM

When you write in assembly language you by pass the application software

and communicate directly with CPU, BIOS and MS DOS.

Assembly language is faster than any other programming language.

Assembly language uses the memory more efficiently than high-level

language.

Assembly language is best language controlling I/o devices; because

some operations , such as reading and writing to specific memory

locations and I/O ports can be done easily in assembly, but may be

sometimes impossible at higher level language.




ASSEMBLER


Assembler is a program that turns symbols into machine instructions.

The assembler translates an assembly language program

one line at a time. The assembler recognizes four types of lines:

empty lines,

label definition lines,directive lines, and

instruction lines.



An empty line is the line that only has spaces or tabs (i.e., white space)

Empty lines are ignored by the assembler.

A label defini t ion l in e consists of a label definition. A label definitionconsists of an identifier followed by a colon (“ : “ ). As in most

programming languages, an identifier must start with a letter (or an

underscore) and may be followed by any number of letters,

underscores, and digits.

A directive l ine consists of an optional label definition, followed by the name of

an assembler directive, followed by the arguments for the directive. In this labwe will consider three assembler directives: .data, .word, and .text.

An inst ruct ion l ine consists of an optional label definition, followed by

the name of an operation, followed by the operands. In this lab we will

consider five operations: load, store, set, add, and sub.




COMMENTS


Every line can conclude with a comment.

Comments begin with the character “ ! '„

Whenever it encounters a '' ! '', the assembler ignores the ``!'' and the

remaining characters on the line.


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Computer Organization:

The simple computer model as discussed earlier:

• RAM,

• CPU,

• I/P O/P And

• System Bus to connect

various components of computer.

Typical Von Neumann Machine



CU

The control unit is the main part of the processor. It performs its task by

repeatedly cycling through the following steps:

1. Read (fetch) the next instruction from memory.

2. Examine the instruction to determine what it is and to find any possible errors.

3. Execute the instruction.

These steps are known as the fetch-execute

cycle.




INTERACTION BETWEEN PROCESSOR AND MEMORY.

to execute an instruction, the processor must be able to request 3 things from

memory:1. instruction FETCH

2. operand (variable) LOAD

3. operand (variable) STORE

the memory really only needs to be able to do 2 operations

1. read (fetch or load)

2. write (store)





instructions and operands are stored in memory.

before they can be used by the processor, they must be fetched/loaded

proc essor steps involved:

1. fetch the instruction

2. figure out what the instruction is -- DECODE

IT IS A MULT INSTRUCTION

this also reveals how many operands there are, since

the number of operands is fixed for any given instruction

THERE ARE 3 OPERANDS x,y,z3. load operand(s)

OPERANDS ARE y AND z

4. do the operation specified by the instruction

MULTIPLY y AND z TOGETHER

5. store result(s) (if any)

RESULT GOES INTO VARIABLE x



EXECUTE AND FETCH CYCLE:

In order to read the next instruction from memory,

the control unit needs to know the location (memory address) of the instruction. Thisaddress is kept in

a special register called the program counter (PC).

The PC is a special register and is normally located in the control unit.

It always contains the address of the next instruction, not the current one.

When the next instruction is fetched, it is stored in the instruction register (IR),

IR: another special-purpose register, that always contains the current instruction.

Note that as soon as the next instruction is fetched and is stored in the IR it becomesthe current instruction




Therefore:

The fetch-execute cycle can now be rewritten as:

1. Read the instruction that‟s pointed to by the PC from memory and move it intothe IR.

2. Increment the PC.

3. Decode the instruction in the IR.

4. If the instruction has to read an operand from memory, calculate the operand‟s

address(this is called the effective address, or EA) and read the operand from memory.

5. Execute the current instruction from the IR.




REGISTER

Information inside Microprocessor is stored in Registers.

There are three sizes of registers:

8-bit, 16-bit and on 386 and above 32-bit. .

In 8086, In total there are fourteen 16-bit registers.




There are four different types registers;

general purpose registers,

address registers,

status registers

stack registers.




CPU REGISTERS:

Inside the CPU: (8086 processor)

E N G . S O U H A I L A N A D A20

CPU registers are very special memory

locations constructed from flip-flops.



GENERAL PURPOSE REGISTERS

8086 CPU has 4 general purpose data registers, each register has its own

name:Hold data for an o perat ion.

AX - the accumulator register (divided into AH / AL).

BX - the base address register (divided into BH / BL).

CX - the count register (divided into CH / CL).

DX - the data register (divided into DH / DL).

.


These are 16-bit registers.

AX is split up into :

AH which contains the high byte and

AL which contains the low byte.

for example if: AX= 0011000000111001b,

then

AH=00110000b and AL=00111001b.



ADDRESS REGISTERS

Hold the address of an instruction or data

1- Segment REGISTERS

2- Index REGISTERS

3- pointer REGISTERS




They are mainly used for string instructions. There are three

index registers SI (source index), DI (destination index) and IP(instruction pointer).)

IP is an index register but it can't be manipulated directly as it

stores the address of the next instruction.


IndexRegisters SI Source Index used by string operations as source DI Destination

Index used by string operations as destination

INDEX REGISTER



SI - source index register: Can be used for pointer addressing of data

Used as source in some string processing instructions

Offset address relative to DS

DI - destination index register: Can be used for pointer addressing of data

Used as destination in some string processing instructions

Offset address relative to ES




POINTER REGISTERS

IP


Pointer

Registers

IPInstruction

Pointer

16-bit number that points to the offset of the

next instruction

SP Stack Pointer16-bit number that points to the offset that thestack is using

BP Base Pointer used to pass data to and from the stack



BP - base pointer: Primarily used to access parameters passed via the

stack

Offset address relative to SS

SP - stack pointer: Always points to top item on the stack

Offset address relative to SS

Always points to word (byte at even address)

An empty stack will had SP = FFFEh




STACK REGISTERS


Stack registers

BP and SP are stack registers and are

used when dealing with the stack.



STATUS REGISTERS

Keeps the current status of the processor, and is called FLAG registers.

Consists of 9 status bits. These bits are also called flags, because they can

either be SET (1) or NOT SET (0).




STATUS REGISTERS


Consists of 9 status bits. These bits are also called flags, because

they can either be SET (1) or NOT SET (0).

Flags Register Abr. Name bit n Description OF Overflow Flag 11 indicates an overflow when set DF Direction Flag 10 used for string operations to check direction IF Interrupt Flag 9 if set, interrupt are enabled, else disabled TF Trap Flag 8 if set, CPU can work in single step mode SF Sign Flag 7 if set, resulting number of calculation is

negative ZF Zero Flag 6 if set, resulting number of calculation is zero AF Auxiliary Carry 4 some sort of second carry flag PF Parity Flag 2 indicates even or odd parity CF

Carry Flag

0

contains the left-most bit after calculations

Carry Flag (CF) - this flag is set to 1 when



Carry Flag (CF) - this flag is set to 1 when

there is an unsigned overflow. For example

when you add bytes 255 + 1 (result is not

in range 0...255). When there is no overflow

this flag is set to 0.

Parity Flag (PF) - this flag is set to 1 when

there is even number of one bits in result,

and to 0 when there is odd number of one

bits.

Zero Flag (ZF) - set to 1 when result is zero.For non-zero result this flag is set to 0.

Overflow Flag (OF) - set to 1 when there is a

signed overflow. For example, when you

add bytes 100 + 50 (result is not in range -

128...127).

Interrupt enable Flag (IF) - when this flag is set

to 1 CPU reacts to interrupts from external

devices.




SEGMENT

In the x86 processor architecture, memory addresses are specified in two partscalled the segment and the offset .

One usually thinks of the segment as specifying the beginning of a block of memoryallocated by the system and the offset as an index into it.

Segment values are stored in the segment registers. There are four or moresegment registers:

CS contains the segment of the current instruction (IP is the offset),SS contains the stack segment (SP is the offset),

DS is the segment used by default for most data operations,




SEGMENT REGISTERS

CS - points at the segment containing the current program.

DS - generally points at segment where variables are defined.ES - extra segment register, it's up to a coder to define its usage.

SS - points at the segment containing the stack.


SS Address

DS Address

CS Address




SEGMENT OFFSET



Segment registers work together with general purpose register to

access any memory value.

example1 :

if we would like to access memory at the physical address 12345h

(hexadecimal),

we could set the DS = 1230h and SI = 0045h.

This way we can access much more memory than with a single register,

which is limited to 16 bit values.

The CPU makes a calculation of the physical address by multiplying the

segment register by 10h and adding the general purpose register to it

(1230h * 10h + 45h = 12345h):


SEGMENT OFFSET



Address at register DS is 045F [0]

Address of the data 0032

Therefore the physical address is 045F0

0032

------------

04622


example2:



THE INTEL 8086 FAMILY OF MICROPROCESSOR

The IBM PC family consists of IBM PC, PC XT, PC AT, PS/1, and PS/2.

They are all based on the Intel 8086, 8088, 80286, 80386, 80486, …

Intel introduced the 8086 in 1978 as its first 16 bit-bit Microprocessor.

Intel introduced the 8088 in 1979, is essentially the same as the 8086 BUT,


8086 8080

16 bits data bus 8 bits data bus

faster clock rate than 8080

Less expensive than 8086



INSTRUCTIONS, OPERANDS, ADDRESS

Instructions are operations performed by the CPU.

Operands are entities operated upon by the instruction.

Addresses are the locations in memory of specified data.

The terms instruction and mnemonic are used interchangeably in this

document to refer to the names of x86 instructions.

Although the term opcode is sometimes used as a synonym for instruction,

(the thing the instruction is to do),




An instruction is a statement that is executed at runtime.An x86 instruction statement can consist of four parts:

Label (optional)

Instruction (required)

Operands (instruction specific)

Comment (optional)


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Instructions begin with a mnemonic which represents the

operation to be performed.

Ex.

MOVE, ADD, SUB, CLR, …… etc.

Note:How an operand is interpreteddepends on the information provided

and the addressing mode used for thatoperand.



mnemonics for opcodes

labels for memory locations

Two of the parts (LABEL and COMMENTS) are optional.

Two of the parts (OPCODE and OPERANDS) are mandatory.

MOVE VALUE 5 To the Register AX


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Label OpCode Operand Comment

Next: MOV AX , 5 ! initializeCounter

Assembly Instruction

syntax:



The Intel assembler uses (destination<-source) for operands.

Operands are separated by commas (,)

For instruct ions w ith two op erands, :

the first (righthand) operand is the source operand, and

the second (lefthand) operand is the destination operand

(that is, destination -> source).

Important Note –

An another set of instruction can have zero to three operands uses theopposite order (source --> destination).


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45

Some of the instructions have two operands,

others of these instructions have a single operand, and finally

instructions have no operands at all



EXAMPLE:

THE INSTRUCTION ADD HAS 2 OPERANDS X AND Y

Data of X is available in register X register to hold data

Data of Y is available in memory register to hold address that

contains data

Has 2 operands,

Add 5 to AX register


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ADD X,Y

ADD AX, 5



We will briefly discuss the missing link between assembly language and



We will briefly discuss the missing link between assembly language and

other HLL:

HLL: Add Instruction is

Ass: Add Instruction is

We used here 3 mnemonics :

1- LOAD : obtains the value from the location „a‟.

2- ADD : adds the value „5‟ to the loaded value.

3- STORE : saves the result again


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LOAD a

ADD 5

STORE a

a = a + 5 ;



4 9

A FEW EXAMPLE INSTRUCTIONS

ADD/SUB/MUL/DIV/AND/OR dest, source Performs operation on dest and source and stores result in dest.

NEG location Computes 2‟s complement of value in location, then stores it into

location.

NOT location

Computes complement of value in location, then stores it intolocation.

CLR location Sets value of byte/word/long at location to 0.

MOVE dest, source Moves value of source to dest location.

The arithmetic and logical instr ctions take the follo ing forms



The arithmetic and logical instructions take the following forms:

add reg, reg/memory/constant

sub reg, reg/memory/constant

cmp reg, reg/memory/constant

and reg, reg/memory/constant

or reg, reg/memory/constant

not reg/memory


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where reg is any of ax, bx, cx, or dx;

constant is a numeric constant (using hexadecimal notation), and

memory is an operand specifying a memory location



The add instruction adds the value of the second operand to the first (register) operand,

leaving the sum in the first operand.

The sub instruction subtracts the value of the second operand from the first, leaving the

difference in the first operand.

The cmp instruction compares the first operand against the second and saves the result

of this comparison for use with one of the conditional jump instructions (described in

a moment).

The and and or instructions compute the corresponding bitwise logical operation on the

two operands and store the result into the first operand.

The not instruction inverts the bits in the single memory or register operand.


51



MOV

The mov instruction is actually two instruction classes merged into the same

instruction.The two forms of the mov instruction take the following forms:

mov reg, reg/memory/constant

mov memory, reg

.


52



EXPLAIN, MOV AX,5


53

The Arithmetic & Logical Unit

The arithmetic and logical unit (ALU) is where most of the action takesplace inside the CPU.

Copies the value from AX into the ALU,

Sends the value five to the ALU,

Instructs the ALU to add these two values together,

Moves the result back into the AX register.



THE CONTROL TRANSFER INSTRUCTIONS

interrupt the sequential execution of instructions in memory and transfer control

to some other point in memory either unconditionally, or after testing the

result of the previous cmp instruction. These instructions include thefollowing:

unconditional jumps

The basic instruction that transfers control to another point in the program is

JMP.

The basic syntax of JMP instruction:

JMP label

Label will be discussed later


54



SHORT CONDITIONAL JUMPS

there are instructions that do a conditional jumps (jump only when someconditions are in act).

General example

Ja dest -- Jump if above CF=0 and ZF=0

jae dest -- Jump if above or equal (>=). CF=0

jb dest -- Jump if below

jbe dest -- Jump if below or equal

Je dest -- Jump if equal ZF=1

Jne dest -- Jump if not equal ZF=0

jz dest -- Jump on zero or equal ZF=1

JNZ dest -- Jump on not zero ZF=0

iret -- Return from an interrupt


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opcode Description CPU Flags

T h e s e

i n s t r u c t

i on s ar e

d i v i d e d

i n

t h

r e e

gr o u p s ,f i r s t

gr o u p

j u s t t e s t

s i n gl e

f l a g ,

I- Jump instructions that test single flag



Instruction Description Condition Opposite Instruction

JZ , JE Jump if Zero (Equal). ZF = 1 JNZ, JNE

JC , JB,JNAE

Jump if Carry (Below, Not Above Equal). CF = 1 JNC, JNB, JAE

JS Jump if Sign. SF = 1 JNS

JO Jump if Overflow. OF = 1 JNO

JPE, JP Jump if Parity Even. PF = 1 JPO

JNZ , JNE Jump if Not Zero (Not Equal). ZF = 0 JZ, JE

JNC , JNB,JAE

Jump if Not Carry (Not Below, AboveEqual).

CF = 0 JC, JB, JNAE

JNS Jump if Not Sign. SF = 0 JS

JNO Jump if Not Overflow. OF = 0 JO

JPO, JNP Jump if Parity Odd (No Parity). PF = 0 JPE, JP


56

II- Jump instructions for signed numbers



Instruction Description Condition

Opposite

Instructio

n

JE , JZ

Jump if Equal (=).

Jump if Zero. ZF = 1 JNE, JNZ

JNE , JNZJump if Not Equal (<>).

Jump if Not Zero.ZF = 0 JE, JZ

JG , JNLEJump if Greater (>).

Jump if Not Less or Equal (not <=).

ZF = 0

and

SF = OF

JNG, JLE

JL , JNGE Jump if Less (<).Jump if Not Greater or Equal (not >=).

SF <> OF JNL, JGE

JGE , JNLJump if Greater or Equal (>=).

Jump if Not Less (not <).SF = OF JNGE, JL

JLE , JNGJump if Less or Equal (<=).

Jump if Not Greater (not >).

ZF = 1

or

SF <> OF

JNLE, JG


57

<> - sign means not equal.

III - Jump instructions for unsigned numbers



Instruction Description Condition Opposite Instruction

JE , JZJump if Equal (=).

Jump if Zero.ZF = 1 JNE, JNZ

JNE , JNZJump if Not Equal (<>).

Jump if Not Zero.

ZF = 0 JE, JZ

JA , JNBE

Jump if Above (>).

Jump if Not Below or Equal

(not <=).

CF = 0

and

ZF = 0

JNA, JBE

JB , JNAE, JC

Jump if Below (<).

Jump if Not Above or Equal

(not >=).

Jump if Carry.

CF = 1 JNB, JAE, JNC

JAE , JNB, JNC

Jump if Above or Equal (>=).

Jump if Not Below (not <).

Jump if Not Carry.

CF = 0 JNAE, JB

JBE , JNA Jump if Below or Equal (<=).Jump if Not Above (not >).

CF = 1

orZF = 1

JNBE, JA


58



label -- symbo l ic name of memory loc at ion

assigns a symbolic name to the address corresponding to line: LOOP: ADD Ax,5

BRp LOOP

To declare a label in your program, just type its name and add ":" to the end,

label can be any character combination but it cannot start with a number,

for example here are 3 legal label definitions:

label1:

label2:

a: Label can be declared on a separate line or before any other instruction, for example:

x1:

MOV AX, 1

x2: MOV AX, 2


59



here's an example of JMP instruction to calculate the sum of two numbers:

org 100h

mov ax, 5 ; set ax to 5.mov bx, 2 ; set bx to 2.

jmp calc ; go to 'calc'.

back: jmp stop ; go to 'stop'.

calc:

add ax, bx ; add bx to ax. jmp back ; go 'back'.

stop:

ret ; return to operating system.


60



anything after a semicolon is a Comment (or, Exclamation Mark) ignored by assembler

used by humans to document/understand programs

tips for useful comments:

avoid restating the obvious, as “decrement R1”

provide additional insight, as in “accumulate product in R6”

use comments to separate pieces of program


61

here's an example of CMP instruction and conditional jump:




62

include "emu8086.inc"

org 100h

mov al, 25 ; set al to 25.mov bl, 10 ; set bl to 10.

cmp al, bl ; compare al - bl.

je equal ; jump if al = bl (zf = 1).

putc 'n' ; if it gets here, then al <> bl,

jmp stop ; so print 'n', and jump to stop.

equal: ; if gets here,

putc 'y' ; then al = bl, so print 'y'.

stop:

ret ; gets here no matter what.

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C or C++ or Java :type variable_name;

ASM:

variable _name data type value


63

Data type is to locate the memory



Data type is to locate the memory


DB Define Byte# tells the assembler to allocate 8 bits

DW Define Word

DD Define double word

# tells the assembler to allocate 32 bits

value is required --< it gives the variable an initial value

--< for explicitly leave value undefined, use the '?' character

EXAMPLES:



Alpha DB 4

means declare variable name Alpha , initialized by the value 4 and locate a Byte

LETTERS DB 27h, 48h,32h,69h

means declare 4 variables each 1 byte (total locate 4 bytes) , each bytesinitialized s shown

NUM DW ?

means declare one variable NUM the initialization is not clear yet.

MULLTIPLICATION DW 204Ah

When running the program the first address in the memory will be the lowerbyte

(4A h)

the next location will be the high byte (20 h)


CONTINUE



MSG DB „HELLO‟

CONSTANT_e DD 2.71828

LETTER_a DB 'a'

STRING1 DB 'This is a string.', 0 string better terminated by

null

We can use the directive EQU (Equates) as follow:

syntax is : name EQU constant

LF EQU 0A h

OR, MOV DL,0A h

MOV LF,DL


C C CO S S



CHARACTER CONSTANTS

A character constant is a single character enclosed in single or double quotes.

MASM stores the

value in memory as the character‟s binary ASCII code. Examples are

'A'

"d"




String Constants

A string constant is a sequence of characters (including spaces) enclosed in single or

double

quotes:

'ABC'

'X'

"Goodnight, Gracie"

'4096'Embedded quotes are permitted when used in the manner shown by the following

examples:

"This isn't a test"

'Say "Goodnight," Gracie'


RESERVED WORDS



RESERVED WORDS

Reserved words have special meaning in MASM and can only be used in their correctcontext. There

are different types of reserved words:

• Instruction mnemonics, such as MOV, ADD, and MUL.

• Directives, which tell MASM how to assemble programs.

• Attributes, which provide size and usage information for variables and operands.Examples are

BYTE and WORD.

• Operators, used in constant expressions.

• Predefined symbols, such as @data, which return constant integer values atassembly time.

A complete




Pseudo-operations

do not refer to operations executed by program

used by assembler

look like instruction, but “opcode” starts with dot


A way to give information to the assembler. Or

It is a message to the assembler that tells the assembler something it need to know in order to carry out the assembly process;

for example, an assemble directive tells the assembler where a program

is to be located in memory.



or ig in d irect ives:

Tel ls the assemb ler where to load instruct ion and data into memory.

Example,

68000 reserves the first 1024 by tes for memory for exceptio n vectors .

Therefore, your pro gram w il l start at location 1024;

ORG 1024 o r ORG $400 (1024 = 400H)




we introduce three directives: .data, .text, and .word.

The first two (.data and .text) are used to separate variable declarations andassembly language instructions.

The .word directive is used to allocate and initialize space for a variable..


Each group of variable declarations should be preceded by a.data directiv e.

Each group of assembly language instructions should be

preceded by a .text directive. Using these directives, you

could mix variable declarations and assembly language

instructions




Opcode Operand Desc r ipt ion

.ORIG address starting address of program

.END end of program

.BLKW n allocate n words of storage

.FILL n allocate one word, initialize with

value n.STRINGZ n-character

string

allocate n+1 locations,

initialize w/characters and null

terminator

TRAP CODES



TRAP CODES

LC-3 assembler provides “pseudo-instructions” for each trap code,

Code Equivalent Descr ipt ion

HALT TRAP x25 Halt execution and print message to

console.

IN TRAP x23 Print prompt on console,

read (and echo) one character from keybd.

Character stored in R0[7:0].OUT TRAP x21 Write one character (in R0[7:0]) to console.

GETC TRAP x20 Read one character from keyboard.

Character stored in R0[7:0].

PUTS TRAP x22 Write null-terminated string to console.

Address of string is in R0.

A i bl d l ti



A variable declaration,

starts with: a label definition (the name of the variable),

followed by a .word directive,

followed by the initial value for the variable


Examples:




.data

# identifies the start of the declaration section there can

be more than 1 (.data) section in a program

.code # identifies where instructions are there can be more

than 1 .code section in a program

.stack # You get this set of memory, called a stack. Don't worry

about it for now, just use it.

.model

# Gives the assembler information about how to place

stuff in memory, and how to call stuff outside the program

(like library calls)

Example:



Example:

Give directives to allocate space for three variables, x , y , and z . You should

initialize these variables to decimal 23, hexadecimal 3fce, and decimal 42,

respectively.

.data ! start a group of variable declarations

x: .word 23 ! int x = 23;

y: .word 0x3fce ! int y = 0x3fce;

z: .word 42 ! int z = 42;




THE X8 INSTRUCTION SET

See Hand OUT




WRITING AN ASSEMBLY PROGRAM


STYLE GUIDELINES



Use the following style guidelines to improve the readability and

understandability of your programs:

1. Provide a program header, with author‟s name, date, etc., and purpose of program.2. Start labels, opcode, operands, and comments in same column for each line. (Unless

entire line is a comment.)

3. Use comments to explain what each register does.

4. Give explanatory comment for most instructions.

5. Use meaningful symbolic names.• Mixed upper and lower case for readability.

• ASCII to Binary, Input Routine, Save R1

6. Provide comments between program sections.

7. Each line must fit on the page -- no wraparound or truncations.

• Long statements split in aesthetically pleasing manner.

SAMPLE PROGRAM

C t th f h t i fil



Count the occurrences of a character in a file.

Count = 0(R2 = 0)

Ptr = 1st file character (R3 = M[x3012])

Input char

from keybd(TRAP x23)

Done?(R1 ?= EOT)

Load char from file(R1 = M[R3])

Match?(R1 ?= R0)

Incr Count(R2 = R2 + 1)

Load next char from file(R3 = R3 + 1, R1 = M[R3])

Convert count to

ASCII character (R0 = x30, R0 = R2 + R0)

Print count(TRAP x21)

HALT(TRAP x25)

NO

NO

YES

YES

CHAR COUNT IN ASSEMBLY LANGUAGE (1 OF 3)



;; Program to count occurrences of a character in a file.; Character to be input from the keyboard.; Result to be displayed on the monitor.; Program only works if no more than 9 occurrences are found.

;;; Initialization;

.ORIG x3000AND R2, R2, #0 ; R2 is counter, initially 0LD R3, PTR ; R3 is pointer to charactersGETC ; R0 gets character inputLDR R1, R3, #0 ; R1 gets first character

;; Test character for end of file;

TEST ADD R4, R1, #-4 ; Test for EOT (ASCII x04)BRz OUTPUT ; If done, prepare the output




;; Test character for match. If a match, increment count.;

NOT R1, R1ADD R1, R1, R0 ; If match, R1 = xFFFF

NOT R1, R1 ; If match, R1 = x0000BRnp GETCHAR ; If no match, do not incrementADD R2, R2, #1

;; Get next character from file.;

GETCHAR ADD R3, R3, #1 ; Point to next character.LDR R1, R3, #0 ; R1 gets next char to test

BRnzp TEST;; Output the count.;OUTPUT LD R0, ASCII ; Load the ASCII template

ADD R0, R0, R2 ; Covert binary count to ASCIIOUT ; ASCII code in R0 is displayed.HALT ; Halt machine




;; Storage for pointer and ASCII template

; ASCII .FILL x0030PTR .FILL x4000.END



A ISA



An ISA encompasses …

Instructions and Instruction Formats

Data Types, Encodings, and Representations

Programmable Storage: Registers and Memory

Addressing Modes: Accessing Instructions and Data


ADDRESSING MODES



ADDRESSING MODES

Register direct, immediate, absolute long, register indirect,indexed basic, auto increment, auto decrement When to usethe various modes

ca s8 assembly

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