c. glenn shirley and jack t. mccullenweb.cecs.pdx.edu/~cgshirl/glenns publications/32 1996...c....

Component Reliability, ECTC, May 1996 1

COMPONENT RELIABILITY

C. Glenn Shirley and Jack T. McCullenIntel Corporation


Component ReliabilityTable of Contents

• Technology Trends• Failure Mechanisms and Acceleration Models

Temperature and biasMoistureThermomechanical

• Quality and Reliability AnalysisQuality analysis of wire bond placement.Reliability analysis of capacitor failure in T/C.


Technology Trendsand the reliability issues they drive...

• Focus mainly on package-related issues.Most new mechanisms are package-related.

• Market Segment Model• Package Attributes

TodayWhere we are going

• TrendsPackage OutlineLeadframe TrendsInterconnection TrendsPassivation TrendsOEM Trends


Process, Package Technology, and Product Evolve in Parallel

Process

1.5 micron

1.0 micron

0.8 micron

0.6 micron

0.4 micron

DIP, PLCC

PQFPMMPQFP HDPQFP, TAB, C4Plastic Package

386 486 Pentium© CPU "P6" ©Introduced Product

Follow-on and Plastic X X X X

BGA, PPGA

'85 '86 '87 '88 '89 '90 '91 '92 '93 '94 '95 '96


Technology TrendsPackage/Interconnect

OUTERCONNECTION

INNER CONNECTION

BGABall Grid Array SUB

CHIP CHIP CHIP

PGAPin Grid Array

TCPTape Carrier PKG

Wire Bond TAB FLIP CHIP

Board-CONNECTOR Board(MCM)

Gull WingQFP

Board Board

SUB


Power Quad Package

Tape/AdhesiveDielectric

Copper Heat SlugSingle LayerLead Frame


Ball Grid Array (BGA)Die Up Option

Solder Balls

Expoxy Based Molding Compound Ag - Epoxy Adhesive

Die Down Option

Epoxy Based Molding Compound Solder Balls1.27mm Grid Array

BT Resin Multilayer PCB

Metal Heat Sink PlateAg - Epoxy Adhesive


Plastic Pin Grid Array (PPGA)

CPGA: Tungsten metallization, higher R (5.6 μohms) higher dielectric constant (εr ~9-11)

PPGA: Copper metallization, lower R (1.7 μohms) lower dielectric constant (εr ~4.5-5)


Market Segment ModelMarket Segments Attributes/determinants

(by industry market segments) (key market requirements)Notebooks

laptops/palmtops

Low-End Desktops

High-End Desktops

Servers

End-User Upgrades

form-factor, costs, low-power, ....

costs, performance, .....

price/performance, power,......

performance, price, power

socketability, electrical & architectural compatibility, power

COT/QFPArray

PGA/E-QFP

PGA/LGA

Options

Technology Trends

QFPE-QFP

PGA/Array/Few-ChipModules


Technology Trends

• High-performance VLSI is moving into

everyday products.

• Economics continue to push VLSI into

plastic packages.

• Most package reliability issues are largely

plastic reliability issues.


Package Attributes...Where we are today

Technology Trends

Max No. Lead No. Pkg. Bodyof leads pitch (mm) planes Thickness (mm) Size (mm)

DIP 48 100 mils 1 4.7 14 x 61PLCC 84 50 mils 1 4.3 29PQFP 196 0.65 1 3.5 34PQFP/DPH 196 0.65 2 3.5 34PQFP/MM 196 0.65 3 3.5 34TSOP 56 0.5 1 1.1 14 x 18TQFP 208 0.5 1 1.5 34BGA 400 0.05 1 2.3 35HDPQFP 400 0.4 2 2.0 40TCP 600 0.2 1 0.5 20


# pads increases rapidly due tohigher clock rate = more power/gnd, bus width, functions

Pad DensityTechnology Trends

0

100

200

300

400

500

600

700

800

900

Product Complexity / Time


Power DissipationTechnology Trends

10

5

0

Power Dissipation

CPGA

TCP/QFP/PQFP

15

Multi Layer Metal (MM)

PRODUCT COMPLEXITY

PlasticHeat-Slug Pkgs


As the number of leads increase, lead-pitch must be scaled to keep the body size from growing too large = physical and electrical problems

# of Leads

Lead DensityTechnology Trends

Practical PackageBody Sizes

0.65mm

COT/Tape Pack

0.5mm

0.4mm

0.3mm

0.2mmCOT

0.1mm

Fine-PitchPackage Body

Size (mm)

0

10

20

30

40

50

60

70

80

200L 300L 400L 500L 600L 700L


Wirebond Running Out Of Gas?Wirebond is still the lowest cost, most flexible, and matured technology

compacted dice require tighter bond-pitch, larger # of pads push wirebond into a limiting regime.....practical limit believed to be around 60 μm for aluminum (ceramics) and 75 μm for gold (plastics)

VLSIVLSI VLSI

Standard Product Compaction

Bond-Pitch Decreases

Wirelength Increases

Technology Trends


Technology Trends

# Pads/# Pins

Pad Pitch (μm)

TAB

Array/C4

Wirebond

EvolutionaryVector

50 100 150

(Aluminium)

(Gold)

Compaction

Performance, I/O


Technology Trends

Package Outline Trends

• Larger die sizes (approx. 500 mils and up; mechanical issues)

• Higher lead count (> 300; reliability statistics)

• Finer pitch leads (Pin-pin shorts/leakage)• Thinner, wider packages (Mechanical

issues)


Technology TrendsLead Frame Trends

• Finer Pitch - (0.3mm)

• Copper lead frames for improved thermal performance (Si/Cu TCE mismatch).

• Multiple planes of metal separated by insulating tape for thermal & electrical performance (Tape/Cu chemical reactions in moisture and bias)

• Copper slugs attached to or used for die attach plane


Technology Trends

Interconnection Technology Trends• Increasing lead count is demanding finer pitch

bond pads.

• Plastic: gold wire bonding pitch > 70 μm.

• Plastic: TAB bond pitch > 70 μm.

(Bump-passivation overlap = new failure mode)

• Ceramic: Al, 95 μm pitch, then 85 μm pitch,

then C4, 75 μm pitch.


Technology TrendsPassivation Trends

• Approach 1. Nitride/polyimide.Nitride is a moisture barrier. Process window:0.5 μ < thickness < metal space.Polyimide (4 μ thick) is mechanical protection.

• Approach 2. Reflowable glass/nitride.Planarize metal topography before nitride deposition.Nitride thickness is not limited by top metal spacing.For single mask, exposed glass films at pad openings admit moisture for wire bond, but not TAB.


Technology TrendsPassivation Approaches

PECVD Oxynitride/Nitride Metal Bond Pad

Other films

Silicon

Polyimide

PECVD Oxynitride/Nitride Metal Bond Pad

Exposed Reflow Glass

Reflow Glass

Other films

(moisture penetration path)

Silicon


OEM Trends• Ceramic will still be used for high power - socketed

• Surface mount is the main-line board mount process.

• Severe thermal shocks to 219 C (solder reflow temperature) occur during board mount.

• For plastic, the big issue is “popcorn” fracture and other damage due to absorbed moisture.

• Re-bake is limited by solder wettability degradation.

• OEMs dislike the complex bagging, shipping, and shelf-life guidelines required to keep parts dry.

Technology Trends


Effect on Reliability• Lead Pitch Decrease

Contaminant Driven Interlead Growth

Bond Integrity (decreased wire size/increased span)

• Larger, More Complex Die / Thinner Packages

Thermal Mismatch Issues due to Increased Interfaces

Thermomechanical Stress

Moisture Induced Mounting Stresses (Mass Reflow)

Technology Trends


Mechanisms and ModelsOverview

• Classes of mechanisms...Defect vs intrinsic

Die-level field reliability is dominated by defect mechanismsPackage-level reliability is dominated by intrinsic mechanisms.

Accelerating Stresses...ThermalMoistureThermomechanical

• Our objectives...Describe the mechanism - examplesGive an acceleration model which can be used in field reliability calculations.



• Thermal

Die-level mechanisms

Au/Al Intermetallics and Au ball bonds.

Lead Finish



• Moisture

External Corrosion

Moisture Transport in Molding Compounds

Internal: Package Failure

Internal: Die Failure



• Thermomechanical

Temperature Cycling

Moisture Transport

“Popcorn” Mechanism in Plastic Surface Mount

Bond & Wire Damage

Passivation and other Thin Film Damage


Thermal Mechanisms

• Die-level mechanismsElectromigrationHot-electronOxide defects.

• Gold aluminum intermetallic “Purple Plague”Effect of BromineKelvin Resistance Measurements

• Lead finishCopper tin intermetallicSolder plate vs solder coat


Die-Level Mechanisms• Mechanisms include electromigration, oxide

degradation, hot-electron effects.• Die-level mechanisms are accelerated by

the die temperature and supply voltage.• Most die-related field reliability issues are

defect-related.• A useful “universal” acceleration model for

defect-related die-level mechanisms is

Q and C are mechanism-specific.

AFQk T T

C V V= −⎡

⎣⎢⎤

⎦⎥+ −

⎧⎨⎩

⎫⎬⎭

exp ( )1 1

1 22 1


Gold-Aluminum Bond Failure

• Gold and Aluminum interdiffuse.Intermetallic phases such as AuAl2 (“Purple Plague”) form.Imbalance in atomic flux causes Kirkendall Voiding

• Kirkendall voids lead toBond weakening - detected by wire pull test.Resistance changes in bond - detected by Kelvin measurement of bond resistance.


Gold-Aluminum Intermetallic

Cross-section of gold ball bond on aluminum pad after 200 hours at 160C


Gold-Aluminum Intermetallic

Cross-section of gold ball bond on aluminum pad after 80 hours at 156C/85%RH


Gold-Aluminum Bond Failure

380 340 300 260 220 200 180 1600.1

1

10

100

1E3

1E4

Temperature (deg C, Arrhenius Scale)

Hours

Arrhenius plot of time to 10% of wire pull failure.Activation energy = 1.17 eV.

Source: S. Ahmad, Intel


0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

20 40 60 80 100 120 140

2.7 1.450.8

0.5

Bake Time, hours

Log{ Resistance Change (milliohms)}

Weight % Bromine

Gold-Aluminum Bond Failure•Kelvin resistance measurements.

•Resistance increase of Au bonds to Al pads vs bake time.

•Bake at 200 C.

•Various levels of Br flame-retardent in molding compound.

•Br catalyzes Au-Al intermetallic growth.

Source: S. Ahmad, et al. “Effect of Bromine in Molding Compounds on Gold-Aluminum Bonds,” IEEE CHMT-9 p379 (1986)


Thermal Degradation of Lead Finish

Solder Solder

Cu6Sn5 intermetallic

CopperCopper

Lead

Post-plating solder plate Post burn-in solder plate showing copper-tin intermetallic



X-section of solder-plated lead X-section of solder-coated lead



• Only an issue for copper leadframes (not Alloy 42).

• Cu3Sn or Cu6Sn5 intermetallics grow at the interface between solder or tin plating.

• Activation energy for intermetallic phase growth is0.74 eV

• If intermetallic phase grows to surface of solder or tin plate, solder wetting will not occur.

• Main effect is to limit the number of dry-out bakes of surface mount plastic components.


Moisture-Related Mechanisms

• External Package Corrosion

• Internal Package MechanismsInterplanar LeakageAl Pad Corrosion

• Internal Die-Related MechanismsThin-Film DelaminationCircuit Failure due to Passivation Defects


External Package CorrosionTwo Types:

• Galvanic effects due to mismatch between package pin and socket.

Use Au-plated socket contacts with Au-plated pins.Use Sn-finished socket contacts with tin or solder-plated pins.

• Galvanic effects independent of socket due to pinholes in Au finish.

Pinhole in Au exposing ferrous base metal, or Ag/Cu brazing material causes strong galvanic cell on exposure to moisture.Prevented by passive Ni barrier under Au.


External Package Corrosion

• Sn, solder, and especially Ag can migrate under influence of humidity and electric fields.

• Ni barrier over Ag/Cu brazing material prevents this in laminated ceramic packages.

• Sn migration is also a possibility in saturated steam stress.

• These external moisture-related effects are infrequently observed in the field.


Internal Moisture Mechanisms

• Package-RelatedMM tape leakageLead stabilizing tape leakage.

• Die-RelatedAl pad corrosionMoisture-related Au/Al bond degradation.Logic failure due to passivation damage.

• Acceleration models for internal mechanisms.

Steady-state power dissipationMoisture transport in molding compound.Acceleration under quasi-periodic stress.


MM Tape Leakage

Leadframe

Power Plane Ground Plane


MM Tape Leakage

0 10 20 30 4050

200

400

600

800

1000MM Leakage vs 156/85 Biased HAST Time

Biased HAST Stress Time (HR)

LeakagemA

1 2 3 4 5 6 7 80

0.05

0.1

0.15

1/MTTF

Bias (Volts)

156/85 HAST of MM Tape Candidates

(hrs)

"A"

"B"

Acceleration factor is proportional to bias.Tape m Q eV“A” >12 0.74“B” 5 0.77Source: C. Hong, Intel, 1991

Experimental Tape Data:

AFV H Q kTm

=

× × −Constant exp( / )


Lead-Stabilizing Tape Leakage• A vendor process excursion.• Leakage observed after 336 hours of steam.• Re-activated by 48 hours at 70C/100% RH• No leakage seen between leads not crossed by tape• Rapid decay for leads crossing end of tape

Tape dries from exterior inwards

Die Lead Stabilizing TapeTape provides mechanical

stability to long leads during wirebond.


Lead-Stabilizing Tape Leakage

10 100 1000Recovery Time (Minutes)

1E-5

1E-6

1E-7

1E-8

1E-9

1E-10

1E-12

1E-13

LeakageCurrent (A) Pin 3 -4

Pin 2-3

Pins Crossed by Tape

Pins NOT crossed by tape

Source: S. Maston, Intel


TAB Interlead Leakage/Shorts• Requires bias• Accelerated by temperature & humidity• Seen as early as 20 hrs 156/85 HAST• Highly dependent on materials & process

Internal Moisture Mechanism

-

+

-

Copper dendrites after 40 hours of biased 156/85 HAST


Aluminum Bond Pad Corrosion

Moisture Moisture

Fe++

Ni++Lead CorrosionMicrogap

Cl-

Shortest path has highestfailure rate.

Source m Q (eV)Peck (a) 2.66 0.79Hallberg&Peck (b) 3.0 0.9

(a) IRPS, 1986; (b) IRPS, 1991.

Source: P.R. Engel, T. Corbett, and W. Baerg, “A New Failure Mechanism of Bond Pad Corrosion in Plastic-Encapsulated IC’s Under Temperature, Humidity and Bias Stress” Proc. 33rd Electronic Components Conference, 1983.

AFV H Q kTm

=

× × −Constant exp( / )

1

Pins


Moisture-Related Gold Bond Degradation

0 2 4 6 8 10 12 14 16 18 200.010.1

1

10

305070

90

99

99.999.99

HASTOFF-CENTER

HASTCENTERED

BAKECENTERED

BAKEOFF-CENTER

%

Pull Force (gm)

Effect of 80 hours of 156/85 HAST vs 156/0 Bakeand Centered vs Off-Centered Bonds on Wire Pull Test Data

Source: G. Shirley and M. Shell-DeGuzman, IRPS, 1993



0 2 4 6 8 10 12 14 16 18 200.010.1

1

10

305070

90

99

99.999.99

POLYIMIDEOFF-CENTER

POLYIMIDECENTERED

NO-POLYIMIDE CENTERED: SQUARE OFF-CENTER: TRIANGLE

%

Pull Force (gm)

Wire Pull Strength of Polyimide vs No Polyimide and Centered vs Off-Centered Bonds after 40 hours of 156/85 HAST




20 40 100 200 400 1E3 2E320

40

80

100

Hours

121/100135/85

17hr 156/85 + x 156/65156/85

F50(gm)


bam Q

=

= ×= =

112 7113 100 98 115

010

... ; .

gm (gm- hrs)

eV

-1

Fat b

a a h Q kT

F F Z

m

P P

50 2 2

0

50

11

017

=+

= × × −

= × − ×

=

( ) /

exp( /

exp( )

.

σ

σ


10μ

Logic Failure Due to Passivation Damage

Site of failing bit. SRAM after HAST stress. After polyimide removal and light buffered oxide etch.

Courtesy M. Shew, Intel


Etch-decorated cross-section of passivation. Note growth seams.

2 μ


2 μ



Vthreshold

Row

Column

Vthreshold

ColumnRow

Source: C. Hong, Intel

SRAM VOLTAGE THRESHOLD MAP FOR CELL PULLUP TRANSISTOR(Baseline threshold is 0.89 V. Passivation is 0.6 μ nitride, no polyimide.)

After 120 h 156/85. 4 failed bits with Vt > 2.5 V

2 bits recover after further 2 hr bake at 150 C



30 100 1E3 1E40.5

1

10

30

50

70

90

%

Hours

85/85, standby140/85, standby140/85, no bias156/85, standby156/85, active

156/85, no biasModel: 85/85 standbyModel: 140/85 standbyModel: 140/85 no biasModel: 156/85 standbyModel: 156/85 activeModel: 156/85 no bias

Source: G. Shirley and C. Hong, Intel

AF a bV H Q kT

a b m Q

m= × + × × −

= = = =

Constant

eV

( ) exp( / )

. . . .0 24 014 4 64 0 79

SRAM HAST and 85/85 Bit Failures (No Polyimide)


Logic Failure Due to Passivation Damage99.9

99

90

50

10

0.1

% Fail

1

40 100 400 1K 2K 4K 10KTime in HAST

140/85130/85121/100120/8585/85

10

• Bit Failures in 256K EPROMsafter Temperature-Humidity(no Bias) Stress at VariousConditions.

• Bimodal distribution due topassivation damage on earlyfailures.

• 85/85 Data shows broaderdistribution due tocontamination.

Source: Danielson, et al. IRPS, 1989


Logic Failure Due to Passivation Damage• Principles of passivation design: Hermeticity and

Mechanical Protection

• PECVD Silicon Nitride is effectively impermeable except for defects.

• Scratches or growth defects allow moisture to penetrate.

• Moisture reaching circuit causes logic failure

• Corrosion rarely seen - today, defect effects dominate

• Strong bias effects are typical for logic circuits

• EPROMs have "built-in" bias


THB Models from Steady-State Experiments

• Fundamental environmental parameters are T, H and V, at the site (at the die, “j”) of the failure mechanism. So

• A convenient special case of this formula is “Peck’s Model”:

• Find a, b, m, Q from experiments with steady-state stress and negligible power dissipation.

AF f T H Vj j= ( , , )

AF a b V H Q kTjm

j= + × × × −( ) exp( / )


Moisture Transport in Plastic

• Vapor Pressure and Calculation of Relative Humidity

• Diffusion and Absorption of Moisture in Molding Compound

• Needed for calculation of accelerations in non-steady-state moisture stress.

• Needed for calculation of “popcorn” internal package pressure.


Vapor Pressure and Relative Humidity

or

What is Psat?

Where

λ = 2262.6 joule/gm (latent heat of vaporization)

M = 18.015 gm/mole, R = 8.32 joules/(mole K), k = 8.617x10-5 eV/K

HT

T=

Actual water vapor pressure at temperature Saturated water vapor pressure at temperature

P H P TH O sat2= × ( )

P T PM

RTP

QkT

Qk M

RP

Psat eV( ) exp exp .= −⎛⎝⎜

⎞⎠⎟ = −

⎛⎝⎜

⎞⎠⎟ = =0 0 0 42

λ λ



200 160 120 100 80 60 40 20 0.01

.02

.04

.1

.2

.4

1

2

4

10

Temperature in deg C (Arrhenius Scale)

Pressure

Water Vapor

Liquid Water

Coexistence of liquid and vaporQ = 0.42 eV

(Atm)



An accurate formula for Psat (in Pascals) is

which is accurate to better than 0.15% in the range 5 C< T < 240 C.

P T a x xT

a aa a

sat nn

n( ) exp ,

(. .. .

= × ×⎛⎝⎜

⎞⎠⎟ =

+ °

= = − ×

= − × = ×

=∑1000

1273

16 033225 35151386 102 9085058 10 50972361 10

0

3

0 13

25

36

C)

, ,,


Vapor Pressure and Relative Humidity• Example: Relative humidity at “hot” die in steady

state.Partial pressure of water vapor is the same everywhere:

So RH at die is given by:

Where the ratio, h is defined as:

and can be plotted...

P PH O H O2 2die ambient( ) ( )=

H P T T H P T( ) ( ) ( ) ( )die ambientsat ambient ja sat ambient× + = ×Δ

H h H( ) )die (ambient= ×

hP T

P T T=

+sat ambient

sat ambient ja

( )( )Δ



0 20 40 60 80 100 120 140 160 180 2000.00

0.20

0.40

0.60

0.80

1.00 02

4

6

8

1015

20

3040

R

T(ambient)

Curves labelled with Tja

0.784

Example: At 20/85 and Tja = 4 C, the die is at 24/(0.784x85) = 24/67.


Effect of Steady-State Power Dissipation• Superimpose log(H) vs 1/T contour plots

ofPeck model for THB acceleration factor.Partial pressure of water vapor, Psat.

• Contours are straight lines:Peck model: Iso-acceleration contours with slopeproportional to Q/m.Psat: Isobars with slope proportional to Qp

= 0.42 eV.Reference: C. G. Shirley, “THB Reliability Models and Life Prediction for Intermittently-Powered Non-Hermetic Components”, IRPS 1994


Effect of Steady-State Power DissipationIso-acceleration contours for example mechanism

(m = 4.6, Q = 0.8 eV) superimposed on water vapor pressure isobars.

Increasing steady-statedissipation (X to Y).Follows isobar.

Typical Climate

Relative slopeQ/m < 0.42 eV: DecelerationQ/m > 0.42 eV: Acceleration.

180 140 100 80 60 40 20 030

40

100

1 0.01

10

100

1K100K

0.01atm0.1 atm1 atm5 atm 4 23

X

Y

RH (%)at Die

Hj

Tj at Die (deg C)


Moisture Absorption/Diffusion inMolding Compound

A

L

Zero flux or "die" surface

ACTUAL

MODEL

2L

Surface exposed to ambient.

Surface exposed to ambient.



Diffusion Coefficient:

Henry’s Law:

Saturation Coefficient:

Source: Kitano, et al IRPS 1988

D DQkT

D Qdd= −

⎛⎝⎜

⎞⎠⎟ = × =−

0 054 7 10 050exp . / sec . m eV2

M PS HP Ssat sat= =

S SQkT

S Qss=

⎛⎝⎜

⎞⎠⎟ = × =0 0

42 76 10 0 40exp . . mole / m Pa eV3

M HP SQ Q

kTQ Qsat

s ps p=

−⎡

⎣⎢

⎤

⎦⎥ − = −0 0 0 02exp

( ). eV



0.00 0.20 0.40 0.60 0.80 1.000.00

0.20

0.40

0.60

0.80

1.00

Fourier Number = Dt/L^2

Concentration at Die Surface (C)

Total Weight Gain (M)(C-Cinit)/(Ceq-Cinit)

(M-Minit)/(Meq-Minit)

or

0.8481


Step-Function Stress

T (deg C)

Package MoistureTime Constant

t

LD

QkT

d

mc

( )

. exp

sat =

⎛

⎝⎜

⎞

⎠⎟0 8481

2

0

Typical Moisture Time Constants (Hours)

220 180 140 100 60 40 20 1

2

4

10

20

100

200

400

1K

TSOP (12 mils)

PQFP (37 mils)

DIP, PLCC (50 mils)

Normal Operating Range

TSOP

L


0

500 20 40 60

380 460

540 0

500 20 40 60

280 360

440 520

T(ambient) = 100 CH(ambient) = 85%t(sat) = 28 hours

T(ambient) = 60 CH(ambient) = 85%t(sat) = 153 hours

Cj

Moles/m3 Moles/m3

Hours Hours

mils mils

Cyclical StressOne-Dimensional Diffusion Equation Solutions

8 hours on, 16 hours off cycling for PDIP

Moisture concentration at the die is constant if Period << t(sat)

Tja = 20C


Cyclical Stress“Fourier-Durations”A B A B

tA tB tA tB

TA,mc

TB,mc

τ τAA mc A

BB mc BD T t

LD T t

L=

×=

×( ) ( ), ,2 2

MoldingCpd.Temp.

Package MoistureConc.

Moisture ConcentrationNext to Die Cj

Moisture Concentration atPackage Surface CA,c and CB,c

Conc. at die is Fourier-duration-weighted sum of

surface concs.:

CC C

jA A c B B c

A B=

++

τ ττ τ

, ,


Quasi-Periodic Stress• Result also applies to quasi-periodic stress, and

and arbitrary geometry:

• So calculate the relative humidity at the die in each part of the cycle and thence find the average acceleration factor...

Moisture Saturation Time Constant

Package SurfaceMoisture Conc., Cc

Package MoistureConc. at Die, Cj

Temperature ofMolding Compound

Tmc

“A”

“B”


Time-On Factors

r = proportion of time in A-cycle. TA,a HA,a TB,a HA,a are ambient conditions.

AF TOF AF TOF AFA B( ( ) ( )Average) Steady - State A Steady - State B= × + ×

TOF rr WXY r

r W r

mA = ×

+ −+ −

⎧⎨⎩

⎫⎬⎭

( )( )

11

TOF r W X Y r rW r r

mB = − ×

+ −+ −

⎧⎨⎩

⎫⎬⎭

− − −

−( ) ( )( )

1 11

1 1 1

1

WD TD T

XS TS T

YH P TH P T

B mc

A mc

B mc

A mc

B a sat B a

A a sat A a= = =

( )( )

( )( )

( )( )

,

,

,

,

, ,

, ,

There is no dependence on package geometry or cycling frequency.Except the condition that t(sat) >> Cycle Period

AmbientCycling Factor

Molding CompoundTemperature Cycling Factor


ExampleA-cycle: Bias off, no acceleration.

B-cycle: Bias on, various power dissipations.Model: a = 0, Q = 0.79 eV, m = 4.64, Qs = 0.4 eV, Qd = 0.5 eV

“On some of the time” can be much more accelerated than “On all of the time.”Correction to “steady-state” increases with decreasing temperature.

Tja = 20 CTja = 20 CTambient = 60 C Tambient = 25 C

r rFraction of time on.

Time-On Factor

0.0 0.2 0.4 0.6 0.8 1.0 0246810 12 14

0.0 0.2 0.4 0.6 0.8 1.0 0246810 12 14


Internal Moisture Models: Conclusions• log(H) vs 1/T plot shows how steady-state power

dissipation affects THB acceleration. Q/m </> 0.42 eV for de/ac-celeration with increasing Tj.

• For quasi-periodic “use”, steady-state acceleration is modified by a “time-on-factor” (TOF).

• TOF corrections for power cycled quasi-periodic “use” conditions, can be much larger than predicted by “proportional time-on”.

• Many applications involve “rapid” power and ambient cycling of non-hermetic encapsulated components. TOF corrections must be used for accurate life prediction calculations.

• Good News! There’s a simple formula for TOF valid for nearly all “use” conditions, and package geometries.


Thermomechanical Mechanisms

• Die cracking in ceramic packages• Cracking in plastic packages

Temperature CycleMoisture Transport“Popcorn effect” in plastic Surface Mount Devices

• Bond damage (wire and TAB)• Thin Film Cracking (TFC) in plastic• Thin Film Delamination (TFD) in plastic


Material Properties Influencing Temperature Cycling-Induced Failure

Mechanisms

Material Thermal Coeffic’tof Expansion

(ppm/°C)

Young'sModulus(GPa)

ThermalConductivity

(W/m °C)

CopperAlloy 42SiliconMolding Compound

Alumina

1753

21

6.5

11914513118

25

151570.6

25

398

PC Board 15-17 11 25


Die Cracking in Ceramic Package

Die crack initiated at edge void after temperature cycle

Die crack in ceramic photo here



Edge Void Center Void

40

20

0

-20

-40

-60

0 20 40 60Distance from die edge (mils)

TENSILE

COMPRESSIVE

Edge VoidCenter Void

Longitudinal Stress 0.5 mils inside SiliconSx

Au-Si Eutectic

Alumina

SiTensile stress in silicon as a function of distance from die edge and center voids. (PSI per deg C, Sx).

Source: S. S. Chiang and R. A. Shukla, “Failure Mechanism of Die Cracking Due to Imperfect Die Attachment,” Electronic Components Conference, 1984.



• Root cause of die cracking is EDGE void• FEA predicts large tensile stress near edge void• Voids result when die backside fails to wet• Flash Time well correlated to backside wetting• Factors affecting wettability

Oxygen concentration in Cr layerRoughness of back side of dieDegree of backside oxidationAssembly process


Die Cracking in Plastic Package

Backside damage induced die crack


Die Cracking in Plastic Package(Temperature Cycle)

• Stresses of a thermo-elastic nature are inevitable.• Result of thermal mismatch.• Stresses controlled by:

Material selection.Die attach adhesive thickness (BLT).Voids in die attach.Thickness of mold compound above and below and below die surface.


Die Cracking in Plastic Package(Temperature Cycle)

• Silicon damage increases local stress concentration

Wafer grindWafer sawEjector pin damage

• Not an issue with current materials.

• Seen after temperature cycle/shock.


Cracking in Plastic Packages Due to Temperature Cycle

ShearStress

NormalStress

Crack

Die EdgeWith crack

Without crack

With crack

Without crack

Void & cracksBond and TFC damage


Cracking in Plastic Package

Package crack starts at die edge


Delamination and Cracking Around Leadframe


Cracking in Plastic Packages(Temperature Cycle)

• Generic issue for epoxy/novolac and other thermosetsNot a large issue in through-hole mountingStress concentrations important

VoidsLocal stress multiple of nominal stressMultiplier depends on radius of curvatureTimoshenko shows 3X for circular hole in tension

Burrs• Surface Mount process aggravates cracking


Cracking in Plastic Packages• Temperature cycling or “Popcorn” effect causes cracks

and delaminations to propagate.• After cracking:

Cracks and delaminations redistribute stresses in package.

Shear stresses increase - especially at die corners.

Normal stresses become locally tensile at die corners.

Bond and wire damage occurs because of increased shear and tensile normal stresses.

Understanding molding compound crack propagation/delamination is key to understanding T/C and popcorn acceleration models.


Acceleration of Temperature-Cycle Induced Package Cracking

• Obeys Coffin-Manson formula with ΔT = maximum difference from neutral stress temperature.

• For T/C, the low temperature has the main effect.

m: Depends on fracture properties of material/interface.

AF TT

m

T T T

T T use T

T

accelerated

use

accelerated min neutral

use min neutral

neutral

=⎛⎝⎜

⎞⎠⎟

= −

= −

= ≈ °

ΔΔ

Δ

Δ

( )

( )

accelerated

Zero stress temperature ( 170 C)



• Crack propagation properties depend on formulation -“low stress” molding compounds.

Encapsulant B

Encapsulant A

-55 C to 150 C

50%

100%

Cum Fail

Cycles200 400 600 800

Source: A. Nishimura, et. al. “Life Estimation for IC Packages Under Temperature Cycling Based on Fracture Mechanics,” IEEE Trans. CHMT, Vol. 10, p637 (1987).



T/C of 600 mil Alloy 42 DIPsEncapsulant B

-55 C to 110 C

-15 C to 150 C50%

100%

50 100 150Cycles

CumFail

50 100 150Cycles

50%

100%

CumFail

Encapsulant B

-55C to 110C

-55C to 50C

-55C to 150C

Effect of Minimum Temperature(Constant Temperature Amplitude)

Effect of Temperature Amplitude(Constant Minimum Temperature)




Tensile Test of Notched Samples

• Measure crack growth rate for sinusoidal load:

• Plot crack growth rate da/dN versus ΔK on log-log plot to determine Coffin-Manson exponent, m:

Notch

CrackLoadLoad a

m ≈ 20



0.5 1 2 3Stress Intensity Factor Amplitude

da/dNCrack Growth Rate

mm/cycle

1E-1

1E-2

1E-3

1E-4

1E-5

1E-6

Encapsulant A

150C

25C

-55C

Slope of lines on log-log plot

ΔK MPa m( )


m ≈ 20



• The rate of crack propagation is given by

• In plastic packages under temperature cycling, the stress concentration factor is given by

• Where α is the thermal coefficient of expansion of the material in question.

dadN

K m= × Constant ( )Δ

ΔK T T= × − × − Constant molding compound silicon min neutral( ) ( )α α


Cracking of Plastic Surface-Mount Devices (SMDs) - “Popcorn Effect”

Moisture Absorbtion

Moisture Vaporization

a t

Delamination VoidPressure in Void = P

Plastic Stress Fracture

Collapsed Voids

Bond Damage

During Storage

During Solder

Pressure Dome

Package Crack

Plastic package cracking due to “popcorn” effect during solder reflow


Cracking of Plastic Surface-Mount Devices - “Popcorn Effect”

Plastic package cracking due to “popcorn” effect during solder reflow


Cracking in Plastic Surface-Mount Packages - “Popcorn Effect”

A7 A9

A8

Pulse-echo acoustic image throughback of 68PLCC that developed

popcorn cracks during solder reflow

Acoustic B-scan

SEM of cross section

B-Scanline

Source: T.M.Moore, R.G. McKenna and S.J. Kelsall,in “Characterization of Integrated Circuit Packaging Materials”, Butterwoth-Heinemann, 79-96, 1993.


Cracking in Plastic Surface-Mount Devices

Acoustic time-of-flightimage indicatingpackage crack

Real-time x-ray image showingdeformation in wires where

they intersect the crack

Source: T.M.Moore, R.G. McKenna and S.J. Kelsall,in “Characterization of Integrated Circuit Packaging Materials”, Butterwoth-Heinemann, 79-96, 1993.

132 lead PQFP which was damagedduring solder reflow.

Pulse-echo acousticimage through top

(delamination in black)


Cracking/Delamination of Plastic SMDs - “Popcorn Effect”

• Factors influencing cracking & delamination:

Peak temperature reached during solderingMoisture content (percent weight) of molding compoundDimensions of die paddleThickness of molding compound under paddleAdhesion of molding compound to die and/or lead frameMold compound formulation


• A crack propagates to the surface when maximum bending stress σmax exceeds a fracture stress characteristic of the molding compound

• σcrit depends on molding cpd. formulation, and on temperature (see next slide).

• Maximum bending stress occurs at center of long edge of die and is given by: Source: I. Fukuzawa, et. al.

“Moisture Resistance Degradation of Plastic LSIs by Reflow Solder Process,” IRPS, 1988


σ σmax ( )> crit reflowT

σ max = × × ⎛⎝⎜

⎞⎠⎟

×62

K at

P


Source: Kitano, et al. IRPS, 1988

σcrit is proportional to molding compound strength


50 100 150 200 2500

20

40

60

80

100

Temperature (deg C)

Molding CompoundStrength (MPa)


• K is a geometrical factor (K = 0.05 for square pad).

• P is the internal pressure. Depends on

Moisture content of molding compound (depends in turn on RH and temp. of previous soak ambient).

Peak temperature during reflow.



Calculation of Internal “Popcorn” Pressure

μρ

ρμ

μ

( , )( )

( ) ( )( ) ( )

( )( , )( )

x tt

P t R T tH P T S T

t x

P tt

S T

sat

≡≡

= × × == × × ≡

> =

=

Concentration Profile in Molding Cpd. Moisture Concentration in Cavity

Cavity Pressure Initial Moisture Conc. In Mold. Cpd.

For the boundary condition at is:

cav

0

cav

1

0 0 0

1

0 00

Cavity Molding Compound AmbientImpermeable

Surface

BeforeShock (T0)

AfterShock (T1)Time = t

x = -l x = w

μ ( , )x t

ρ ( )t


Ref. H. S. Carslaw and J.C. Jaeger, “Conduction of Heat in Solids,”Oxford 2nd ed. (1986) pp128-129.

μ εμ

γ γ εγ γ

γ γ γ εγ γ

( , ) exp( )sin[ ( )]( )sin

( )exp( )sin[ ( )]( )

f T ST S

c fc c

SS

c fc c

n n

n nn

n n n

n nn

0

1 1

0 0

2

2 21

1

0

2 2 2

2 21

1 1 2 1

1 1 2 1

= + −⎡

⎣⎢

⎤

⎦⎥ ×

× × − −+ +

+ −⎡

⎣⎢

⎤

⎦⎥ × −

× + − −+ +

⎧⎨⎩

⎫⎬⎭

=

∞

=

∞

∑

∑

wx

wtDf

c

SRTc

n

≡≡

=

=

ε

γγγ

Number);(Fourier and

tan of roots are and

where

21

11

l



Mole/m^350 150 250 350

Water Concentration ProfileCavity = 0.05 mm, Precond = 25/85, Tsolder = 215 C

1

0.1

10

100

1000

Time(sec)

0 (Mold cpd/cavity interface)-0.05 0.15 0.35 0.55 (mm)

Cavity Water VaporConcentration

Package Thickness = 0.60 mm



Example:• Unit preconditioned in 85/85 for a long time, then

subjected to 215 C solder shock.• Saturation coefficient has activation energy of 0.4

eV. (eg. Kitano et. al.)• Steam table pressure at 85 C is 0.57 atm.

P H P T S TS Tw tcav or satl→ →∞ →⎯ →⎯⎯⎯⎯⎯⎯ × ×0 0 0 0

0

1; ( ) ( ) ( )

( )

Pcav -5

eV8.62 10 eV/ K

Atmospheres

= × ×× ° +

−+

⎛⎝⎜

⎞⎠⎟

⎧⎨⎩

⎫⎬⎭

=

085 0570 40 1

273 851

273 215153

. . exp.

.



0 10 20 30 40 50 60 70 800

100

200

300

400

Plastic Thickness, t (mils)

Pad Size, a(mils)

a/t = 4.5

Package Cracking

No Package Cracking

Cracking sensitivity of PLCC packages after saturation in 85/85followed by vapor-phase reflow soldering at 215 oC



Die surface delamination in plastic package after moisture saturation followed by vapor-phase reflow soldering at 215 oC



Die paddle delamination, showing broken bond, in plastic package after moisture saturation followed by vapor-phase reflow soldering at 215 oC



• For pre-soak at 85/85, 215 C peak temperature, and specific molding compound, a/t = 4.5 for crack propagating to surface.

• σcrit for other damage (wires, bonds) will be less than for cracks propagating all the way to the surface of the package.

But the same model can be used.



• Dimensional ratios are importantFukuzawa's paper (IRPS 1985)Jeopardy if (flagsize/epoxy thickness)>5, for 168 hour 85/85 presoak and 215C solder shock.Pad depression and/or heat spreader exacerbate jeopardyBoth decrease epoxy thickness from flag to exterior

• Recent data indicate thin package with larger paddle is less sensitive (Van Doorselaer, IRPS 1993)



• Ways to reduce/eliminate delamination:Through holes Blind holes with intersecting patterns/depth profilesPolyimide wafer coat promotes adhesionLeadframe plating (Ni or ??) promotes adhesionChemical improvement of surface adhesion?



Other Thermomechanically-Induced Mechanisms

• We have seen that package cracks and delaminations are induced by

Temperature CyclingPopcorn Mechanism

• Package components “get in the way” ofpackage cracks, causing:

Wire DamageBond FailureThin-Film Cracking

• Let’s look at the previous package cross-sections on a scale of 10s of microns...


Effect of Package Cracking and Delamination on Wires, Bonds, and

Passivation Films

Au

Substrate DamageSilicon

Shear

Normal (tensile)

Crack

Wire Shear

Thin-Film Cracking


Bond Damage: Wires andBall Bonds

• Cracks can intersect wires,TAB leads.• Bonds can be sheared at the bond/pad

interface• Shear and tensile normal stress can break

wires at their necks.• Substrate cracks induced during bonding can

propagate and cause “cratering” or “chip-out”.


Wires sheared by wire crack

Bond Damage: Wire Shear

(Open)


Ball bonds in plastic package after temperature cycle

Bond Damage

Sheared Bond Unfailed Bond

Die Corner20 μ


Necking Damage

Bond Damage


Necking fracture

Bond Damage


Delamination induced down bond fail after temperature cycle

Bond Damage


Cratering damage on bond pads

Bond Damage


Bond shear at die corners after temperature cycle

Bond Damage

Die


Bond Damage and Delamination

A7 A9

A8

Pulse-echo acoustic image of mold compound/ die interface in four devices. Delamination is shown in black. White boxes added to show locations of low bond wire pull strength results.

44 PLCC devices that failed after solderreflow and 1000 cycles (-40 to 125C)

Intermetallic fracture at bond due toshear displacement.

Source: T.M.Moore, R.G. McKennaand S.J. Kelsall, IRPS 1991, 160-166.


Cu Lead

Silicon

Substrate Crack

Ti barrier Au bump

Al pad

Au bump

Etch

Barrier crack and Au/Al intermetallic

Crater

Cu Lead

TAB cratering and diffusion barrier damage revealed by wet etch.

Bond Damage (TAB)


TAB bonds Au/Al intermetallic formed at cracks in Ti barrier

Bond Damage (TAB)


Crater under TAB bonds

Bond Damage (TAB)


Factors Affecting Bond Cratering

• Package mechanicsAmplitude/cycles of T/C

“Popcorn” severity

Reflow temperature

Moisture content of plastic

Package geometry


• Pad metallization

Cratering not seen in pure Al.

During bonding Si precipitates in Al-1% Si create nucleation sites for substrate cracks.

Ti barrier under Al-1%Si is a fix since it prevents precipitation of Si nodules at metal/dielectric interface.



• Substrate dielectric filmsCratering more prevalent with softer filmsRank order for incidence of cratering:

PSG - 11% PPSG - 7% PPSG 0% PField OxideNitride

Less Cratering



• Bond Cratering is insidious because it is not usually detectable by electrical measurements.

• Wire pull or bond shear measurements are necessary to detect zero-strength bonds.

• Even zero-strength bonds have resistances of 10s of ohms (vs 1 or 2 ohms for good bonds).

• A ZERO-STRENGTH BOND IS A FAILED BOND -even if the device is electrically good.

• Why? Because devices with zero strength bonds may fail intermittently.



• Trace-Via Cracking Opens resulting from trace to via interface cracking on PPGA packages with multi-level organic substrateSeen after Temperature cycle

• Chip Cap Solder AttachCracking in solder joint after temperature cycleReduced capacitance resulting from cracking in the solder joint

Thermomechanical Mechanisms in Organic Packages


T V C r a c k

M e t a l T r a c e

P l a t e dP i nB a r r e l

Pin

Trace-Via Cracks after 1000 TC “B”



Chip capacitor solder joint cracking after temperature cycle



Trace-Via Cracks• Cu interface joining substrate traces and pin

vias fail.Total trace thickness not sufficient. Thickness increased to 30 μ.

Chip Cap Attach• Capacitor fails at solder attachment

Causes traced to low solder fillet height.Solder volume increase to insure 50% solder fillet height.



Thin-Film Cracking (TFC) in Plastic Packages

Au

Substrate DamageSilicon

Shear

Normal (tensile)

Crack

Wire Shear

Thin-Film Cracking


Die Surface

Replica in Plastic

Plastic conforms to die surface.



A B

Cracks

Die Corner

Channel

Aluminum

Polysilicon

SiO2PSG

PassivationCrack Crack BA

Shear stress applied to passivation

Aluminum

Polysilicon

Die center



Thin film cracking after temperature cycle



1 micron

Passivation delamination crack propagates into substrate...Source: K. Hayes, Intel



• Factors Affecting TFC

T/C Amplitude and number of cycles.

Die Size

Metal Buss Width in Die Corners

Passivation Thickness

Compliant overcoat - eg. polyimide



Source: C. F. Dunn and J. W. McPherson, “Temperature-Cycling Acceleration Factors for Aluminum Metallization Failure in VLSI Applications,” IRPS, 1990.

Main effect on acceleration is Tmin

95

80

60

40

20

105

21

Cum %Fail

10 100 1000Cycles

-65 C to 150C

-40 C to 85 C

0 C to 125 C125 C Amplitude

Same amplitude

Best Fit: Tneutral = 170 C,m = 11

Factors Affecting TFC:T/C Amplitude and Number of Cycles



No Contacts

17 μ contacts

3 μ contacts

21 μ 7 μ 105 μ

Buss Widths

Source: Shirley & Blish, “Thin Film Cracking and Wire Ball Shear...,” IRPS 1987.


Factors Affecting TFC: Buss Width Effect


70

50

30

10521

.1

% Fail

10 100 1000Cycles

105 micron bus, no slots or contacts

Busses with slots and/or contacts

Narrow buss, or contacts, stabilizes buss, reduces incidence of TFC.Leads to buss width design rules, and buss slotting in die corners.


Factors Affecting TFC: Buss Width Effect


100

80

60

40

20

00.5 0.6 0.7 0.8 1.00.9 1.1Total Passivation Thickness in microns

%Failing

• Fraction of PDIP-packaged SRAM failing.

• Post 1K cycle of T/C C.

• No Polyimide die coat.

• Thicker passivation is more robust.

Source: A. Cassens, Intel


Factors Affecting TFC: Passivation Thickness


• SRAM in PDIP• Temperature Cycle Condition C• Polyimide Overcoat

Case 200 cycles 500 cycles 1000 cycles

No Polyimide 0/450 13/450 101/437

Polyimide 0/450 0/450 0/450

Source: A. Cassens, Intel


Factors Affecting TFC: Compliant Overcoat


Theory of Thin Film Cracking• Shear stress applied to die surface is maximum at die

corners, and is determined by package mechanics. It is given by σ(passivation surf.).

• Okikawa et. al determined buss width effect, Edwards et al. extended to include passivation thickness effect:

TFC occurs when and where

K = dimensionless constantE = Young’s modulus of passivationt = Passivation thicknessL = Buss width

Sources:Okikawa, et al. ISTFA, Oct. 1983,Edwards, et al. IEEE-CHMT-12, p 618, 1987


σ ( )Passivation Surface > × × ⎛⎝⎜

⎞⎠⎟

K E tL

2


• Occurs in Steam (121/100), (not HAST).

• Plastic at die corners applies shear stress

• Films tend to "peel up" at corners.

• Moisture attack at exposed film edges."Peel-up" tendency opens crack.

• Crack propagates into die, disrupting circuit

• Fixes: Edge ring design, film composition

Thin-Film Delamination (TFD) in Plastic Packages


10 μ

Delamination at die edge after 168 hours of steam.


Source: C. HongIntel


Delamination at die edge after 168 hours of steam.


Source: C. HongIntel


Quality and Reliability Analysis

• Quality Modeling.Wirebond placement example.Data acquisition.Monte Carlo simulation.

• Reliability ModelingDefect models scale with extensive attributes (area, etc.)Intrinsic (wearout) models depend on material properties.Extracting models from failure data.AccelerationSeries vs parallel (redundant) models.


Yield/Reliability Simulation for Wire Bonding

• Measure physical process capability.Make measurements of bond location and ball size.Use a sample of about 200.Determine distribution of bond center (x,y), and ball diameter, r.

Shape (normal, etc.), Mean, Variance.Determine whether x, y, r are correlated.

• Decide on yield and reliability specification limits.• Calculate yield and latent reliability DPM.

Assume that process is in statistical control.Analytical calculation - difficult, not general.Simulate the process using fitted distribution parameters.



Ball can overlap adjacent metal (reliability jeopardy).

xy

r

Bond pad opening.

Ball bond.

Ball can overlap adjacent pad opening - dead short (yield issue)

165 μ

125 μ

155 μ



-15 -10 -5 0 5 10 15 0.01

0.1

1

10 20 30 40 50 60 70 80 90

99

99.9

99.99

X: Mean = -0.89, SD = 4.34

Y: Mean = -2.17, SD = 6.75

Cum %

Distance from Center of Pad (microns)

40 42 44 46 48 50 52 54 56 58 60 0.01

0.1

1

10 20 30 40 50 60 70 80 90

99

99.9

99.99

Ideal Process: Mean = 49.32, SD = 2.25

Actual: Mean = 49.73, SD = 3.17

Cum %

Ball Radius (microns)

-20 -15 -10 -5 0 5 10 15 20 -20

-15

-10

-5

0

5

10

15

20

X-Position (microns)

Y-Position (microns)

(x,y) Distributionsr Distribution

• x, y, and r distributions are normal and uncorrelated.

• The parameters of the process in “statistical control” are

x Mean x SD y Mean y SD r Mean r SD0 4.34 0 6.75 49.3 2.25

Outliers



r

x

y

d

d

d/2

• Individual bonds are points clustering around the target.

• Bonds inside pyramid pass the criterion.

• Bonds outside the pyramid fail the criterion.

• Integrate an elipsoidal probability function centered on the target over the volume intersected by the pyramid to get DPM. Difficult to do in general. OR..

• Use random number generator to simulate millions of bonds using distribution parameters determined from 200-unit experiment. This is easy!



Total Pad Overlap DeadBonds Opening Metal Short

-----------------------------------------------Criterion 0 125 155 165Counts 1000000 70232 68 3

X-Mean X SD Y-Mean Y-SD Dia.-Mean Dia-SD----------------------------------------------

0 4.34 0 6.75 98.64 4.5

procedure(n);/* BONDSIM - n is the number of iterations */

{bnd_tbl = "@bndplace1@bond_param";bnd_results = "@bndplace1@bond_results";xmean = bnd_tbl [1, 1];xsd = bnd_tbl [1, 2];ymean = bnd_tbl [1, 3];ysd = bnd_tbl [1, 4];dmean = bnd_tbl [1, 5];dsd = bnd_tbl [1, 6];do m = 1 to n;

{xcen = xmean + normdev() * xsd;ycen = ymean + normdev() * ysd;rad = 0.5 * (dmean + normdev() * dsd);ball_right = xcen + rad;ball_left = xcen - rad;ball_top = ycen + rad;ball_bott = ycen - rad;do p = 1 to lastcol(bnd_results );

{lright = ball_right > 0.5 * bnd_results [1, p];lleft = ball_left < - 0.5 * bnd_results [1, p];ltop = ball_top > 0.5 * bnd_results [1, p];lbott = ball_bott < - 0.5 * bnd_results [1, p];lfail = lright OR lleft OR ltop OR lbott;if lfail then

bnd_results [2, p] = bnd_results [2, p] + 1;}

}}

Number of Bonds to Simulate

Distribution Parameters

“Numerical Recipes” by W. H. Press, B. P. Flannery, S. A. Teukolsky, W. T. Vetterling, Cambridge UP (1986), p203.

Simulate Normal Deviate (mean = 0, SD = 1).

Results

“Reliability”“Yield”


Reliability Statistics

• Several mathematical functions are used to describe the evolution of a population.

• Cumulative distribution function F(t):

Probability that a unit from original population fails by time t

• Survival function S(t) = 1 - F(t):

Probability that a unit from original population survives to time t.


Reliability Statistics

0.1 0.2 0.4 1 2 4 10 200.00

0.10

0.20

0.30

0.40

0.50

0.60

0.70

0.80

0.901.00

F(t)S(t)

t/t50

ProbabilitySigma = 1Lognormal Distribution

Cumulative Distribution Function and Survival Function


Defect Mechanismsvs Intrinsic Mechanisms

Defect Mechanisms• Affects Infant Mortality• Decreasing Failure Rate• Scales with Area, etc.

Intrinsic (Wearout) Mechanisms• Affects Long-Term Reliability• Increasing Failure Rate• Fails “all at once” - small sigma in log time.

FailureRate

Time


Scaling of Defect-Related Mechanisms• Defect counts per device scales with extensive

properties of the product.Die Area, Lead count, Perimeter of dielectric edge in package, etc.Areal defect density, Defects per lead, Defects per length of perimeter in package, etc.

Leadframe

Power Plane Ground Plane

Lead count(Defects per lead)

Insulator edge(Defects per cm)

Die Area(Defects per unit area)


Reliability Statistics• Multiple failure mechanisms (series)

If the earliest occurrence of a mechanism is fatal, then the device is logically a chain:

DefectMechanism

1

DefectMechanism

2

DefectMechanism

3

IntrinsicMechanism

1

IntrinsicMechanism

2

IntrinsicMechanism

3

Etc.

S S STotal Mechanism 1 Mechanism 2= × ×....


Reliability Statistics• Multiple failure mechanisms (parallel)

If failure only occurs when all elements fail the device has redundant elements

Mech 1

Mech 2

Mech 3

Mech 4

...

F F FTotal Mechanism 1 Mechanism 2= × ×....


Determination of Weibull Distribution• Order failures in order of time to fail, rank = i.• Calculate cumulative proportion failing (N = total

sample)

• Calculate Weibit Wi for each Fi

• Calculate yi = ln(ti) (Natural logarithm!)• Plot yi vs Wi• Fit line and find intercept and slope

F i N

F i Ni

i

=

= − +

/

( . ) / ( . )

(simplest)

(desirable)0 3 0 4

W Fi i= − −ln( ln(1 )) α is often very large, so quote ln(α) for

convenience.

ln( ) ln( )t Wi i= + ×αβ1


PPGA Example• PPGA packages with 8 chip capacitors per DUT

were subjected to temp cycle B and temperature cycle C.

• The package fails when at least one capacitor fails.

100 200 400 1E3 2E3 1000 DPM

1

10

20 30

50 70

90 TCC TCB LogAlpha= 7.28 Beta= 2.61LogAlpha= 8.09 Beta= 2.59

Weibull with two-sided 90.0% confidence limits

CAPS 24-JUL-95 18:55 Page 1

F t c

F t c

F t c

( ) exp

( ) expexp( . )

( ) expexp( . )

.

.

= − −⎛⎝⎜

⎞⎠⎟

⎡

⎣⎢⎢

⎤

⎦⎥⎥

= − −⎛⎝⎜

⎞⎠⎟

⎡

⎣⎢⎢

⎤

⎦⎥⎥

= − −⎛⎝⎜

⎞⎠⎟

⎡

⎣⎢⎢

⎤

⎦⎥⎥

1

17 28

18 09

2 61

2 59

α

β

(T / C C)

(T / C B)Cycles, c

Cum % Fail

Note: β = 2.6 >> 1, so this is a WEAROUT mechanism.


PPGA Example, Cont’d• What is the acceleration between T/C B and T/C C?

F t c

F t c

( ) expexp( . )

( ) expexp( . )

.

.

= − −⎛⎝⎜

⎞⎠⎟

⎡

⎣⎢⎢

⎤

⎦⎥⎥

= − −⎛⎝⎜

⎞⎠⎟

⎡

⎣⎢⎢

⎤

⎦⎥⎥

17 28

18 09

2 61

2 59

(T / C C)

(T / C B)

Acceleration undefined unlessshape parameters are the same.They are the same in this case.

Acceleration = = − = =exp( . )exp( . )

exp( . . ) exp(. ) .8 097 28

8 09 7 28 81 2 25


PPGA Example, Cont’d• The PPGA package failed when one or more of the

8 capacitors failed.

• What is the survival function of a single capacitor in T/C C?

S t S t c

c c

Capacitor PPGA( ) [ ( )] expexp( . )

expexp ln

..

expexp( . )

.

.

.

= = −⎛⎝⎜

⎞⎠⎟

⎡

⎣⎢⎢

⎤

⎦⎥⎥

= −+⎛

⎝⎜⎞⎠⎟

⎛

⎝

⎜⎜⎜⎜

⎞

⎠

⎟⎟⎟⎟

= −⎛⎝⎜

⎞⎠⎟

18

2 6118

2 61

2 61

7 28

82 61

7 28 8 08

Stays Weibull!


100 200 400 1E3 2E3 1000 DPM

1

10

30

50 70

90

TCC PPGA, Series Cap.Single Cap.Redundant Caps.

Weibull with two-sided 90.0% confidence limitsCycles

Cum %Failing

PPGA Example, Cont’d• If this capacitor is used in a device with 8 caps that

only fails if all caps fail, what is S(t)?

S t S tDevice Capacitor( ) [ ( )]= − −1 1 8

Cap

Cap

Cap

Cap

Cap

Cap

Cap

Cap

8 in parallel*(redundant)

8 in series*

SingleCapacitor

* reliability, not electrical, sense!


Summary• Quality

Models of manufacturing quality can be established with a small number of measurements.Once the distribution of the key parameter is established simulation can be used to estimate the defectivity associated with various design rule choices.

Note: A large number of pass/fail measurements on many test structures numbers of structures can be avoided.

• ReliabilityAnalysis of typical wearout data was shown.

c. glenn shirley and jack t. mccullenweb.cecs.pdx.edu/~cgshirl/glenns publications/32 1996...c....

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