bjt transistor modeling · common-emitter (ce) fixed-bias configuration the input (v i) is applied...

22
1 BJT Transistor Modeling Transistor Modeling A model is an equivalent circuit that represents the AC characteristics of the transistor. It uses circuit elements that approximate the behavior of the transistor. There are 2 models commonly used in small signal AC analysis of a transistor: • hybrid equivalent model

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Page 1: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

1

BJT Transistor Modeling

Transistor Modeling

A model is an equivalent circuit that represents the AC characteristics of the transistor.It uses circuit elements that approximate the behavior of the transistor.

There are 2 models commonly used in small signal AC analysis of a transistor:

• hybrid equivalent model

Page 2: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

2

Important Parameters

Zi, Zo, Av, Ai are important parameters for the analysis of the AC characteristics of a transistor circuit.

Input Impedance, Zi

To determine Ii: insert a “sensing resistor”

then calculate Ii:

i

ii I

VZ =

sense

isi R

VVI −=

Page 3: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

3

Output Impedance, Zo

To determine Io: insert a “sensing resistor”

then calculate Io:

o

oo I

VZ =

sense

oo R

VVI −=

Voltage Gain, Av

For an amplifier with no load:

Note: the no-load voltage gain (AVNL) is always greaterthan the loaded voltage gain (AV).

i

ov V

VA =

it)(opencircu Ri

oVNL

LVVA

Ω∞=

=

Page 4: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

4

Current Gain, Ai

The current gain (Ai) also be calculated using the voltage gain (Av):

i

oi I

IA =

L

ivi R

ZAA −=

Phase Relationship

The phase relationship between input and output depends on the amplifier configuration circuit.

Common – Emitter : 180 degrees

Common - Base : 0 degrees

Common – Collector: 0 degrees

Page 5: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

5

Hybrid Equivalent Model

The hybrid parameters: hie, hre, hfe, hoe are developed and used to model the transistor. These parameters can be found in a specification sheet for a transistor.

• hi = input resistance

• hr = reverse transfer voltage ratio (Vi/Vo)

• hf = forward transfer current ratio (Io/Ii)

• ho = output conductance

General h-Parameters for any Transistor Configuration

hi = input resistancehr = reverse transfer voltage ratio (Vi/Vo)hf = forward transfer current ratio (Io/Ii)ho = output conductance

Page 6: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

6

Simplified General h-Parameter Model

The above model can be simplified based on these approximations:

hr ≅ 0 therefore hrVo = 0 and ho ≅ ∞

Common-Emitter h-Parameters

acfe

EQ

fe

BQie

βhI

mV25hImV25h

=

≅=

Page 7: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

7

Common-Base h-Parameters

1hImV25h

acfb

EQib

−≅−=

=

α

BJT Small-Signal Analysis

Page 8: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

8

Common-Emitter (CE) Fixed-Bias Configuration

The input (Vi) is applied to the base and the output (Vo) is from the collector.

The Common-Emitter is characterized as having high input impedance and low output impedance with a high voltage and current gain.

Removing DC effects of VCC and Capacitors

Hybrid Equivalent Circuit

Page 9: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

9

Hybrid Equivalent Circuit

Determine hfe, hie, and hoe:

hfe and hoe: look in the specification sheet for the transistor or test the transistor using a curve tracer.

hie: calculate hie using DC analysis: EQ

feBQ

ie I25mVh

I25mVh ≅=

Impedance Calculations

Input Impedance:

Output Impedance:

ieBi h||RZ =

ie10hR iei B

hZ ≥≅

oeCo h

1||RZ =

R101/h Co CoeRZ ≥≅

Page 10: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

10

Gain Calculations

Voltage Gain (Av):

Current Gain (Ai):

Current Gain from Voltage Gain:

ie

oeCfe

i

ov h

)1/h||(RhvvA −==

Coe 10R 1/hie

Cfev

hRhA

−=

)h)(RR(1/h)(1/hRh

iiA

ieBCoe

oeBfe

i

oi ++

==

ieh10 R ,10R 1/hfeiBCoe

hA≥≥

C

ivi R

ZAA −=

Phase Relationship

The phase relationship between input and output is 180 degrees. The negative sign used in the voltage gain formulas indicates the inversion.

Page 11: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

11

CE – Voltage-Divider Bias Configuration

You still need to determine hfe, hie, and hoe.

Impedance Calculations

Input Impedance:

Output Impedance:

21

2121 RR

RRR||RR+

==′iei h||RZ ′=

oeCo h

1||RZ =

Coe 10R 1/h Co RZ ≥≅

Page 12: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

12

Gain Calculations

Voltage Gain (Av):

Current Gain (Ai):

Current Gain from Voltage Gain:

ie

oeCfe

i

ov h

1/h||RhvvA −==

Coe 10R 1/hie

Cfev

hRhA

−≅

( ))hR)(R(1/h

1/h RhiiA

ieCoe

oefe

i

oi +′+

′==

Coe 10R 1/hie

fei

hRRhA

≥+′

′≅

ie10h R ,10R 1/hfeiCoe

hA≥′≥

C

ivi R

ZAA −=

Phase Relationship

A CE amplifier configuration will always have a phase relationship between input and output is 180 degrees. This is independent of the DC bias.

Page 13: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

13

CE Emitter-Bias Configuration

Unbypassed RE

Again you need to determine hfe, hie.

Impedance Calculations

Input Impedance:

Output Impedance:

Efeieb 1)Rh(hZ ++=

1 h ,h 1)R(hEfeb

feieEfeRhZ

>>>>+≅

bBi Z||RZ =

Co RZ =

Page 14: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

14

Voltage Gain (Av):

Current Gain (Ai):

Current Gain from Voltage Gain:

Gain Calculations

b

Cfe

i

ov Z

RhvvA −==

Efeb Rh ZE

Cv

RRA

−≅

bB

Bfe

i

oi ZR

RhiiA

+==

C

ivi R

ZAA −=

Phase Relationship

A CE amplifier configuration will always have a phase relationship between input and output is 180 degrees. This is independent of the DC bias.

Page 15: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

15

Emitter-Follower Configuration

You may recognize this as the Common-Collector configuration. Indeed they are the same circuit.

Note the input is on the base and the output is from the emitter.

Hybrid Equivalent Model

You still need to determine hfe and hie.

Page 16: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

16

Impedance Calculations

Input Impedance: bBi Z||RZ = Efeieb 1)Rh(hZ ++=

1 h ,h 1)R(hEfeb

feieEfeRhZ

>>>>+≅

Impedance Calculations (cont’d)

Output Impedance:1h

h||RZfe

ieEo +

=

1 h , h 1)R(hfe

ieo

feieEfe

hhZ

>>>>+

Page 17: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

17

Gain Calculations

Voltage Gain (Av):

Current Gain (Ai):

Current Gain from Voltage Gain:

)1h/(hRR

vvA

feieE

E

i

ov ++

== 1AieEfe h 1)R(hv >>+

bB

Bfe

i

oi ZR

RhiiA

+−≅

E

ivi R

ZAA −=

Phase Relationship

A CC amplifier or Emitter Follower configuration has no phase shift between input and output.

Page 18: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

18

Common-Base (CB) Configuration

The input (Vi) is applied to the emitter and the output (Vo) is from the collector.

The Common-Base is characterized as having low input impedance and high output impedance with a current gain less than 1 and a very high voltage gain.

Hybrid Equivalent Model

You will need to determine hfb and hib.

EQfe

ieib I

mV251h

hh =+

= 1αh acfb −≅−=

Page 19: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

19

Impedance Calculations

Input Impedance:

Output Impedance:

ibEi h||RZ =

Co RZ =

Gain Calculations

Voltage Gain (Av):

Current Gain (Ai):

ib

C

ib

Cfb

i

ov h

RhRh

vvA ≅==

1hiiA fb

i

oi −≅==

Page 20: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

20

Phase Relationship

A CB amplifier configuration has no phase shift between input and output.

CE Collector Feedback Configuration

This is a variation of the CE Fixed-Bias configuration.

Page 21: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

21

Hybrid Equivalent Model

You will need to determine hfe and hie.

Impedance Calculations

Input Impedance:

Output Impedance:

F

Cfe

iei

RRh1

hZ+

=

FCo R||RZ ≅

Page 22: BJT Transistor Modeling · Common-Emitter (CE) Fixed-Bias Configuration The input (V i) is applied to the base and the output (V o) is from the collector. The Common-Emitter is characterized

22

Gain Calculations

Voltage Gain (Av):

Current Gain (Ai):

ie

Cfe

i

ov h

RhVVA −==

CfeF

Ffe

i

oi RhR

RhIIA

+==

C

F

i

oi R

RIIA ≅=

Example

According to the figure above– Perform DC analysis and find the Q-point.– Evaluate the voltage gain Avs and the current gain Ai.– Sketch vo on the AC+DC load line graph when

• vs = 100 sin(wt) mV.• vs = 900 sin(wt) mV.

hfe = hFE = 200ICO = 0 AVBE = 0.7 VVCEsat = 0 V

ICQ = 0.39 mA

VCBQ = 6.8 V