Common Emitter

At point G

V

V V V

Vk

mA

mA

100A

A k V

V V V

RB B B

V

V

IVR

II

V I R

V V V

CE

RC

CRC

C

BC

F

IN RB f

== − =

= = =

= = =

= = =

= + = + =

0 4

12 0 4 116

1161

116

116116

116 20 2 3

2 3 0 7 3 0

.

. .

..

.

( ) ( ) .

. . .

βµ

µ Ω

Gain in Constant Current Region

I I

IV V

R

V V I R

V V RV V

R

dVdV

RR

C F B

BIN F

B

OUT CC C C

OUT CC CF IN F

B

OUT

IN

C

BF

=

=−

= −

= −−

= −

β

β

β

( )

( )

FET Inverter (Common Source - CS)

At Point C

V

V V V

VmA

mA

1mA / VV

V V

V

2

V

V

iVR

i k V V

Vik

V

DS

RTH

DRTH

TH

D GS TR

GSD

TR

=

= − =

= = =

= −

= +

= +

= +

=

5 5

7 5 5 5 2 0

2 0500

4

42

2 2

4

2

.

. . .

.

( )

Output Gain in Constant Current Region

I k V V

V V R I

V R k V V

dVdV

R k V V

D IN TR

OUT TH TH D

TH TH IN TR

OUT

INTH IN TR

= −

= −

= − −

= − −

( )

( )

( )

2

2

2

Emitter Follower

• Input and output loops share load elementVx = VIN − VOUT

Vx

↑ ↓ “Feedback”VOUT

Emitter Follower

IV V

R

V V V

V I R I I R I R

IV V V

R

IV I R V

R

R I R I V V

BX F

B

X IN OUT

OUT E E B C E F B E

BIN OUT F

B

BIN F B E F

B

B F B E B IN F

=−

= −

= = + = +

=− −

=− + −

+ + = −

( ) ( )

( )

[ ( ) ]

1

1

1

β

β

β

Assuming Constant Current Operation

IV V

R R

VV V R

R RV V

V V

R R

V V V

I I I

I I

I

I I

BIN F

B F E

OUTIN F F E

B F EIN F

CE SAT

B F E

OUT IN F

LOAD B C

B F B

F B

B IN

=−

+ +

=− +

+ +>

><< +

≅ −

= +

= +

= +

≅

( )

( ) ( )( )

( )

( )

1

11

1

1

β

ββ

β

β

β

Current Gain of Emitter Follower

[ ]

II

RVI

VV V

R R

RV

V VR R

LOAD

INF

ININ

B

IN

IN F

B F E

ININ

IN FB F E

= +

= = −+ +

=−

+ +

( )

( )

( )

1

1

1

β

β

β

"Current Gain"

FET Follower

• VOUT = IS RS = ID RS

• VGS = VIN - VOUT = VIN - ID RS

• VGS changes with ID (feedback) can use iterative graphical approach tosolve

V

V

k

V

R

DD

IN

TR

S

==

===

15

8

0 5

2

1

V

V

mA / V

V

k

2.

Ω

Common Base (CB) (Tracking Configuration)

I I I I

I

II

I I I

V V I R

V R I

IN E B C

F B

BIN

F

C F BF

FIN

OUT CC C L

CCF

FL IN

= = += +

=+

= =+

= −

= −+

( )

( )

( )

( )

1

1

1

1

β

β

β ββ

ββ

Common Base Transfer Function

Cascode Configuration

Biasing• Allows non-linear elements to be treated as linear elements (under

certain conditions)

• Different techniques for “Discrete” and “Integrated” designs

• Avoid non-linearities of V-I characteristics by choosing a portion ofthe curve over which the device will operate

For BJT of Fig 7.7

V V k k

V

with Bias levels

kmA

V mA)(1k V

Nonlinear Regions Begin at

V (Cutoff)

V mA (Saturation)

V V R R

V

V

I IV V

R

V V I R

V V I

V V IV V

R

CC BB C B

F F

A

C F B FBB F

B

CE CC C C

CE CC C

CE SAT CCE SAT

C

= = = == =

= ⇒

= =−

=−

=

= − = − =

= = =

= ≅ =−

=

10 5 7 1 100

100 0 7

0

1005 7 0 7100

5

10 5 5

10 0

0 2 9 84

.

.

( ) ( . . )

( )

. .

Ω Ω

Ω

Ω

β

β β

Minimum V

V

V V

V

Maximum

mAmA

mA)(100 k) V + 0.7V

V

V

V V

V

V

V

II

V V V

RI

V I R V V

V

V

A

A MIN BB

A MIN

A MIN

A

B MAXC SAT

A MAX BB F

BB MAX

A MAX B MAX B RB F

A MAX

A MAX

= −+ ≥

≥ −

≥ −

= = =

+ −≤

≤ − +

≤ −

≤

5

0 7

0 7 5 7

5 0

9 8100

0 098

0 098 5 7

4 8

.

. .

.

..

( . .

.

( )

β

Fixed Voltages and Current Biasing

• A simple way of eliminating a separate VBB biasing source is toreplace it with one of the power supply buses

• Bias values are adjusted by selecting proper resistors in the input loop

V R

V

V V I R

I

II

IV V

R

RV V

I

CC C F

C

C CC C C

C

BC

F

BCC F

B

BCC F

B

= = =

=

= −

=

= =

=−

=−

=−

=

10 1 100

5

5

0 05

10 0 70 05

186

V k

Find R that will result in bias value V

mA

mA

V VV

k

B

Ω

Ω

β

β.

..

VR

R RVGS

B

A BDD=

+= =

0 52 0

16 4..

MM

V VΩΩ

Assume transistor in constant current region

( )I k V V

V V I R

V V V

D GS TR

DS DD D D

DS GS TR

= − = −

=

= −= −=

> − ⇒

( )

( )

( )

2 21 2

4

16 4

8

mA / V 4V V

mA

V mA)(2 k

V

i.e. Constant Current

Note: No current through gate of transistor

2

Ω

Parameter Independent Biasing

• Previous biasing techniques are sensitive to deviceparameters such as βF, k and VTR which are in turnsensitive to temperature and fabrication variances.

• One configuration called feedback biasing is virtuallyindependent of device parameters

V V I R I I R

I I I

V V I R I I R

BB BB E

CC C E

1 1 2 1

3 1 2

2 2 2 1

= − − +

= +

= − − +

( )

( )

• Input loop and output loop share the voltage drop(I2 + I1)RE. This feedback mechanism isresponsible for stabilizing bias levels againstdevice parameters.

• Difficult to use graphical analysis to analyze circuit

Example: Given V, k 0.5 mA / V ,

M M k

k

(A) Find I , (B) Find I if k is changed to

1 mA / V

2

D D

2

V

R R R

R

TR

A B D

E

= == = ==

2

1 2 1

5

Ω Ω ΩΩ

, , ,

Solution:

MM M

V V

Assume FET operates in the constant current region

(must confirm later).

VR

R RV

I k V V

I k V I R V

BBB

A BDD

D GS TR

D BB D E TR

=+

=+

=

= −= − −

21 2

12 8

2

2

ΩΩ Ω

( )

( )

( )

I R Ik

R V V V V

I I

I I

I I

D E D E BB TR BB TR

D D

D

D D

2 2 2

2 2

12 0

51

0 52 5 8 2

8 2

62 36 0

0 93 155

− + −

+ − =

− + −

+ −

− + =

= =

( ) ( )

( ).

( )(

(

. .

kmA / V

k V V)

V V) = 0

25

Applying quadratic formula

A mA

2

2

D2

Ω Ω

First value gives V 3.36 V, second value gives

0.24 V (not valid cutoff)

V mA k k V

Note: Therefore constant current region

If mA / V then V, mA

100 % change in k results in only a 7.5% change in I

GS

GS

2

D

== =

= − += − + =

> −

= = =∴

V

V V I R R

V V V

k V I

DS CC D D E

DS GS TR

GS D

( )

. ( ) .

. .

12 0 93 1 5 6 42

1 0 3 1 0

Ω Ω

BJT Feedback Bias

Problem:

Find the vlaue of IC if βF varies from 50 to 200.VF = 0.7 V

V VR

R R

R R R

BB CC

BB

=+

=+

=

= =

2

1 2

1 2

1220

10 204

6 67

Vk

k kV

k

ΩΩ Ω

Ω.

β

β

β

F C

F C

I

I

= =−

+=

= =−

+=

5050 4 0 7

51 12 86

200200 4 0 7

201 1318

:( .

( ).

:( .

( ).

V V)6.67 k k

mA

V V)6.67 k k

mA

Changes by a factor of 4

I Changes by 11 %C

Ω Ω

Ω Ω

Same problem without RE

V R

V I R V

IV V

R

BB BB

BB B BB F

BBB F

BB

= =

− =

=−

=−

=

4 6 67

4 0 76 67

0 49

V k

V Vk

mA

.

..

.

Ω

Ω

β β

β β

β

F C B

F C B

I I

I I

= = = =

= = = =

50 50 0 49 24 5

200 200 0 49 98

: ( . .

: ( .

mA) mA

mA) mA

Changes by a factor of 4

I Changes by a factor of 4

Note: Current gain without R is greater

(i.e. Sacrifice some gain for stability)

C

E

Biasing with Bipolar Supplies

• The use of bipolar supplies can improve bias designs– Facilitates DC - coupled input signals

– Allows outputs to be set to a bias level of zero

– In some cases can reduce the number of resistors in the bias circuit

• A bipolar supply bus is formed by positive and negative DC voltagesources each connected to a common ground

• For a periodic AC waveform with no DCcomponent the transistor input looks like a DCground

Applying KVL

V I R VF E E EE+ + = 0

For large βF

I IV V

R

V V I R V V VRR

V V

E CEE F

E

C CC C C CC EE FC

E

E F

≅ =− −

= − = + +

= −

( )

( )