behavioral design
DESCRIPTION
Behavioral Design. Topics in Behavioral Design. Based on Material in [Rosenblum94][Budgen94] [Ghezzi91] [Harel88]. Behavioral Design Topics. State Transition Diagrams Petri Nets Higraphs and Statecharts. State Transition Diagrams. State Transition Diagrams (STD). - PowerPoint PPT PresentationTRANSCRIPT
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Software Design Software Design (Behavioral)(Behavioral) © SERG
Behavioral Design
Topics in Behavioral Design
Based on Material in [Rosenblum94][Budgen94] [Ghezzi91] [Harel88]
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Software Design Software Design (Behavioral)(Behavioral) © SERG
Behavioral Design Topics
• State Transition Diagrams
• Petri Nets
• Higraphs and Statecharts
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State Transition Diagrams
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State Transition Diagrams (STD)
• Systems exist in a finite set of possible states. External events are triggers that lead to transitions between the states.
• Since most systems have many states, a partial model of the system may be a good compromise.
• STDs are the cornerstone of more powerful diagrams for specifying system behavior, such as Petri Nets and State Charts.
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Software Design Software Design (Behavioral)(Behavioral) © SERG
Partial Unix vi STDo
LineCommand
ZZ
TextInsertion
Mode
CommandMode
/:
returnESC
il
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Software Design Software Design (Behavioral)(Behavioral) © SERG
Formal Definition of an STD
states final ofset theis
:
functionn transitioa is
statestart theis
alphabetinput an is
states ofset a is
: where), , , , ,( =
0
0
QF
Q q
Q
FqQSTD
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Combination Safe STD
Safe Locked 1/3 UnlockedSafe
Unlocked2/3 Unlocked
1L 2L3R
Sound Alarm
any other dialmovement
any other dialmovement any other dial
movement
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IDE STDCompiling
events
eventseventsno events hiccup
Running
Start
resume
pause
stop
stopfinishedsuccess
Compilederror
stop
run
Executing
Pausing
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Petri Nets
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A Simple Petri Net
P1 P2t1 t2
t3 P3 P4
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A Marked Petri NetP1 P2t1 t2
t3 P3 P4
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A Marked Petri Net After Firing t1
P1 P2t1 t2
t3 P3 P4
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Definition of a Petri Net
• PNet = (P, T, A, M0)– P is a finite set of places (labeled circles), where a
place holds tokens .
– T is a finite set of transitions (bars), where a transition represents an activity.
– A is a finite set of directed arcs, where an arc connects a place and a transition.
– M0 is the initial marking of PNet, where a marking is an arrangement of tokens in places representing state.
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Petri Net Execution Model
• Input Place: Place P is an input place for transition T if there is an arc from P to T.
• Output Place: Place P is an output place for transition T if there is an arc from T to P.
• Enabled Transition: A transition is enabled if there is at least one token at each of its input places.
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Petri Net Execution Model (Cont’d)
• Firing a Transition: An enabled transition is non deterministically selected and fired by removing one token from each of its input places and depositing one token at each of its output places.
• Firing Sequence: A firing sequence <t0,t1, …, tn> such that t0 is enabled and fired in M0, t1 is enabled and fired in M1, ...
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Petri Net Firing
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A Petri Net Describing an ATM
MachineReady
Valid Card
CorrectPin
CardAccepted
ValidRequest
SufficientFunds
SufficientATM Cash
Card in Slot
Notes inDispenser
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A Marked Petri Net SemaphoreIN1 IN2
CR1 CR2SEM
OUT1 OUT2
IN = Input of ProcessOUT = Output of
ProcessCR = Critical RegionSEM = Semaphore
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Enabled Transitions
IN1 IN2
CR1 CR2SEM
OUT1 OUT2
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After Non-Deterministic FiringIN1 IN2
CR1 CR2SEM
OUT1 OUT2
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Enabled Transition
IN1 IN2
CR1 CR2SEM
OUT1 OUT2
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After Firing
IN1 IN2
CR1 CR2SEM
OUT1 OUT2
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Petri Net Static Analysis
• Invariants are properties of a Petri net that hold (are true) in all markings.
• For example, the sum of all tokens in CR1, CR2, and SEM are equal to 1 in all reachable markings. That is, |CR1| + |CR2| + |SEM| = 1
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Deadlock and Starvation• A Petri Net with a given marking is in
deadlock iff no transition is enabled in that marking.
• A Petri Net with a given marking is in starvation iff one or more transitions have been permanently disabled.
• A Petri Net is live if every transition can eventually be fired.
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A Deadlocked Petri Net
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A Petri Net that can Enter a Deadlocked State
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A Deadlocked Petri Net
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Modification into a Live Petri Net
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A Petri Net that can go into Starvation
t1 t2
t3 t4
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Starving Transitions t2 and t4
t1 t2
t3 t4
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Shortcoming of Basic Petri Nets
• The Simplicity of building blocks leads to complexity in nets.
• For example, a semaphore of N processes requires 2N transitions and 3N+1 places.
• Would like:– Enable and fire as computations.– Tokens as data, not just control.– Ability to reduce high-level Petri nets to basic
Petri nets for analysis.
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Higher-Level Net Semaphore19
71
transitionpredicate
true
3
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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Enabled Transition19
71
transitionpredicate
true
3
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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After Firing19
71
transitionpredicate
true
2
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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Software Design Software Design (Behavioral)(Behavioral) © SERG
Enabled Transitions19
71
transitionpredicate
true
2
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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After Firing
19
71
transitionpredicate
true
1
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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Software Design Software Design (Behavioral)(Behavioral) © SERG
Enabled Transition
19
71
transitionpredicate
true
1
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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After Firing
19
71
transitionpredicate
true
2
tokenvalue
s > 0
arcexpressions+1
p
p
p
s-1
s
s
p
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A Software Change Process
19
7
33
811
New MRs
(MR)
true
true
true
TomMaria
TonyOlga
Approved MRs
Assigned MRs Completed MRs
(MR)
(MR, Developer)
(MR, Developer)
(MR, Developer)
(Developer)
(Developer)
(MR, Developer)
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After Firing (New Assigned MR)
19 33
811
New MRs
(MR)
true
true
true
7,Tom
Maria
TonyOlga
Approved MRs
Assigned MRs Completed MRs
(MR)
(MR, Developer)
(MR, Developer)
(MR, Developer)
(Developer)
(Developer)
(MR, Developer)
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After Firing (New Assigned MR)
19 33
11
New MRs
(MR)
true
true
true
7,Tom
Maria
Tony
8,Olga
Approved MRs
Assigned MRs Completed MRs
(MR)
(MR, Developer)
(MR, Developer)
(MR, Developer)
(Developer)
(Developer)
(MR, Developer)
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After Firing (New Completed MR)
19 33
11
New MRs
(MR)
true
true
true
7,Tom
Maria
Tony
8,Olga
Approved MRs
Assigned MRs Completed MRs
(MR)
(MR, Developer)
(MR, Developer)
(MR, Developer)
(Developer)
(Developer)
(MR, Developer)
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After Firing (New Assigned MR)
19 33
New MRs
(MR)
true
true
true
7,Tom
Maria
11,Tony 8,Olga
Approved MRs
Assigned MRs Completed MRs
(MR)
(MR, Developer)
(MR, Developer)
(MR, Developer)
(Developer)
(Developer)
(MR, Developer)
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After Firing (New Approved MR)
19 33
New MRs
(MR)
true
true
true
7,Tom
Maria
11,Tony
Olga
Approved MRs
Assigned MRs Completed MRs
(MR)
(MR, Developer)
(MR, Developer)
(MR, Developer)
(Developer)
(Developer)
(MR, Developer)
8
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Higraphs and Statecharts
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Higraphs
• Higraphs are based on:– Euler graphs
– hypergraphs
– Venn diagramsGraph Hypergraph
Q R
P
Q^R
P^Q^R
P^Q P^R
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E
Higraphs Supports Cartesian Products.
B A
O
P
T
S
R
D
J H
I
G
F
L
MN
K Q
C
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Formal Definition of a Higraph
B B E E
... =
B
B
B
E),H = (B,
BB BB
BB
B
edges ofset theis
)222(
2 :
function ngpartitioni theis
2 : function blob-sub theis
(blobs) elements ofset finite a is
where,,
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Specialized Higraphs: State Charts
• State Charts are a higraph-based extension of standard state-transition diagrams, where blobs represent states and arrows represent transitions.
• State Charts = state diagrams + depth + orthogonality + broadcast communication
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Depth of State Charts
• e, f, g, h: events that trigger the transitions•g(c): is the transition by event g when condition c is true.•Being in state D means being in one of states A or C.•The f arrow leaving D applies to both A and C.•A is the default state.•C is the default state when in D.
g(c)
A
B
C
f
f
e
h
A
C
fB
e
h
D
g(c)
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F
Orthogonality of State Charts
Y
B
C
H
E
G
I
A D
e f[in{G}]
ne
g h
k
e m
p
C,G
B,E
C,F
C,E
B,G
B,F
H I
k h
e
n
k
p
m or p
e f
ep
g
g
eh
em o
r p
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Broadcasting of State Charts
YA
H
D
B
C
E
G
F
k
e nf/g g
e
I Jn/f
m/e
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in flight
State Chart Describing ATC
cruising
stacked
landingapproach
on ground
touch down
take off
taxiing
parked
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CPU Main Memory
State Chart Describing a Computer
Computer
FetchingInstruction
ExecutionInstruction
Waitingfor Request
MemoryWrite Cycle
MemoryRead Cycle
getAddrputAddr
instr.cmpl.
instr.avail. Put
Addr. GetAddr.
DataWritten
DataRead
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Display State of Digital Watch
displays update
hour min
datesec
c
cc
ctime
date
alarmstopwatch
c
bd
d
a
a
a
up-alarm c
c c
hour sec
min
b c
2-min[not in(stopwatch)]
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Stopwatch State of Digital Watch
time
a
disp run
zero
reg
lap off
on
d[in(off)]
b b
d[in(on
)]d bb
stopwatch
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High-Level Description of Digital Watch
dead
alivemain power
displays
beepbeep-rt t-hits-tm
[in(enable)]
weak strong
bt-weak
on off
b
b-up
enable disable
alarm-stated[in(alarm)]
d[in(alarm)]
light
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State Chart of Digital Watch
alarm-state
dead
alive
hour min
date
sec
c
cc
ctime
date
alarm
c
bd
d
a
a
up-alarm c
c chour sec
min
b cdisp run
zero
reg
lap off
on
d b b
d d bb
stopwatch
beepbeep-rtt-hits-tm[in(enable)]
update
displays
main2-min
[not in(stopwatch)]
bat-inbat-rn
weak strong
power
bt-weak
on off
b
b-up
light
disableenable
d[in(alarm)]
d[in(alarm)]
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References
• [Rosenblum94] D. Rosenblum, A. L. Wolf, Formal Software Engineering, Tutorial SIGSOFT’94 FSE, New Orleans, Dec., 1994.
• [Budgen94] D. Budgen, Software Design, Addison-Wesley, 1994.
• [Ghezzi91] C. Ghezzi, M. Jazayeri, D. Mandrioli, Fundamentals of Software Engineering, Prentice-Hall, 1991.
• [Harel88] D. Harel, On Visual Formalisms, CACM, Vol. 31, No. 5, 1988.