BASIC COMPUTING CONCEPTSPart 3

Dr. Abdel-Rahman Al-QawasmiINSIDE THE MACHINE. 2007 by

Jon Stokes

The DLW-1’s Basic Architecture and Arithmetic Instruction Format

• The DLW-1 microprocessor consists of an ALU attached to four registers, named A, B, C, and D for convenience.

• The DLW-1 is attached to a bank of main memory that’s laid out as a line of 256 memory cells, numbered #0 to #255.

The DLW-1’s Arithmetic Instruction Format

• The instruction field specifies the type of operation being performed (for example, an addition, a subtraction, a multiplication, and so on).

• The two source fields tell the computer which registers hold the two numbers being operated on, or the operands.

• Finally, the destination field tells the computer which register to place the result in.

An Example DLW-1 Program

An Example DLW-1 Program

Memory Accesses: Register vs. Immediate

• Real computers have billions of possible locations in which data can be stored, so programmers need a more flexible way to access memory, a way that doesn’t require each memory access to specify numerically an exact memory address.

• Modern computers allow the contents of a register to be used as a memory address, a move that provides the programmer with the desired flexibility.

Register as a memory address

Since the content of D is the number 12, we can tell the computer to look in D for the memory cell address by substituting the register name (this time marked with a # sign for use as an address), for the actual memory cell number in line 1’s load instruction. Thus, the first lines of Programs 1-1 and 1-2 are functionally equivalent.

Register as a memory address

Capabilities are designed to make programmers’ lives easier, because when used with the register-relative addressing technique described next they make managing code and data traffic between the processor and massive amounts of main memory much less complex.

Register-Relative AddressingIn real-world programs, loads and stores most often use register-relative addressing, which is a way of specifying memory addresses relative to a register that contains a fixed base address.

A data segment is a block of contiguous memory cells that a program stores all of its data

An offset is the distance in bytes of the desired memory location from the data segment’s base address.

Register-Relative Addressing

In the case of the load, the processor takes the number in D, which is the base address of the data segment, adds 108 to it, and uses the result as the load’s destination memory address.

By using register-relative addressing instead of absolute addressing (in which memory addresses are given as immediate values), a programmer can write programs without knowing the exact location of data in memory

Because both memory addresses and regular integer numbers are stored in the same registers, these registers are called general-purpose registers (GPRs). On the DLW-1, A, B, C, and D are all GPRs.