assembly microprocessors session 2

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Assembly Microprocessors session 2 ing. Ernst E. Mak MSc

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Assembly Microprocessors session 2. ing. Ernst E. Mak MSc. Contents:. Binary numbers, Addition, Subtraction, Two’s complement Starting Deeds, Board, Dipswitches, Editor, Debugger programming structure: Assembly directive: ORG memory designator Labels Statements Operands - PowerPoint PPT Presentation

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Page 1: Assembly Microprocessors session 2

Assembly Microprocessorssession 2

ing. Ernst E. Mak MSc

Page 2: Assembly Microprocessors session 2

Contents:

• Binary numbers, Addition, Subtraction, Two’s complement• Starting Deeds, Board, Dipswitches, Editor, Debugger• programming structure:• Assembly directive: ORG memory designator• Labels• Statements• Operands• Comments• Deeds Help function• Registers, Flags, Memory, Decimal and

Hexadecimal

Page 3: Assembly Microprocessors session 2

X-ary Numbers

• X = base number of the number system

• consist of symbols 0.......(X-1)

• QUESTION: Why not 0.....X ????

Adjacent digits (from right to left) represent increasing powers of the X-ary system

Page 4: Assembly Microprocessors session 2

MODEL : hodometer

1

23

456

78

90

12

345

67

8 9 01 2

34

56

78

9

0

Page 5: Assembly Microprocessors session 2

HODOMETER (2)

• What was the X?• How many symbols per disc ?• Maximum number?

• Now imagine a BINARY disc into the hodometer

write down the first 20 numbers• ? how many discs did you need?

Page 6: Assembly Microprocessors session 2

1

0

1

0 1

0

MODEL : hodometer

Page 7: Assembly Microprocessors session 2

Addition

1 1 10 0 0 00

0 0 10 0 1 01

1 1 00 0 1 11

+

Page 8: Assembly Microprocessors session 2

Negative Numbers

0 1 11 0 1 0053 =

1 1 11 0 1 00-53 =

Using the 8-th bit as a SIGN bit

0 1 11 0 1 0053 =

1 0 00 1 0 11-53 =

Inverting the bits

Page 9: Assembly Microprocessors session 2

Two’s Complement

0 0 10 1 1 00

1 1 01 0 0 11

13

1

1 1 11 0 0 11

inv

+1

Two’s Complement

Page 10: Assembly Microprocessors session 2

Two’s Complement (2)

0 1 11 1 1 0061

1 1 11 0 0 11Two’s Complement 13

0 1 01 0 0 001+

48

Page 11: Assembly Microprocessors session 2

Flags

• Carry

• Overflow

• Zero

• Negative

• ..

• …

• ...

Page 12: Assembly Microprocessors session 2

Generic Instructions

• Input/output data• Load a value (register) into a register• Arithmetic• jumping / subroutine• control• Bitwise operators : Boolean, Register shifts • interrupt handling• stacking

Page 13: Assembly Microprocessors session 2

ASSEMBLY-LAY-OUT

{LABEL:} [tab] OPCODE [tab] {OPERANDS} [tab] {; remark-line}

examples:

start: JP 100 ; go to program start

loop: JR NC,-10 ; Loop back if not carry

AND A,32 ; reset 6th bit in accumulator

HALT ; stop execution

; this is a remark line without operation

Page 14: Assembly Microprocessors session 2

MNEMONIC

• “short-hand”

• examples:

• add a,10 ;add 10 into the a register• jp 155 ;jump to a location• inc H ;increase the h register by

one

Page 15: Assembly Microprocessors session 2

ASSEMBLER DIRECTIVES

• ORG xxx

• lable DW 122

• lable2 DB 10

• organize next code starting at memory location xxxx

• define a value 122 into a word type of variable called ‘lable’

• define a value 10 into a byute type variable called ‘lable2’

Page 16: Assembly Microprocessors session 2

ASSEMBLER CYCLE text file

start: ORG 100

begin: jp 130

add a,3

loop: nop

nop

inc bc

....

.....

ASSEMBLER

MEMORY

11010010;10011000;00011101;11101010;11101110;11110110;10100111;01000011;11110000;01100000;10101011;10111000;01111101;11000011;10110111;00010101;01111111;01000010;01000000;11000101;11011110;10110111;01000000;11011101;10011000;10110110;

MICRO PROCESSOR

LINKER

LINK ROUTINEmodules

input output

DEBUGGERTEXT

EDITOR

Page 17: Assembly Microprocessors session 2

Z80 Processor Register Layout

Main registers. Alternative registers.

S

Z

-

H

-

P/V

N

C

Sign

Zero

-

Half-Carry

-

Parity/overfl.

Negate

Carry

Flags 8 bit

Adress Registers

Accumulator Registers

Interupt

register

Memory

Refresh

Alternative Registers

W’B’

H’D’

Z’C’

L’E’

WB

HD

A F’FA’

ZC

LE

I

R

I XI Y

S PP C