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DEPARTMENT OF ECE ANALOG ELECTRONICS LAB
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ANURAG COLLEGE OFENGINEERING
(Approved by AICTE, New Delhi & Affiliated to JNTU-HYD)
AUSHAPUR (V), GHATKESAR (M), R.R.DIST, T.S.501301
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING
EC408ES: ANALOG ELECTRONICS LAB
B.Tech. II Year II Sem. L T P C
0 0 3 2
Note: Minimum 12 experiments should be conducted: Experiments are to be simulated using Multisim or P-spice or Equivalent
Simulation and then testing to be done in hardware.
LIST OF EXPERIMENTS: 1. Common Emitter Amplifier 2. Common Base Amplifier 3. Common Source amplifier 4. Two Stage RC Coupled Amplifier 5. Current Shunt Feedback Amplifier 6. Voltage Series Feedback Amplifier 7. Cascode Amplifier 8. Wien Bridge Oscillator using Transistors 9. RC Phase Shift Oscillator using Transistors 10. Class A Power Amplifier (Transformer less) 11. Class B Complementary Symmetry Amplifier 12. Hartley Oscillator 13. Colpitt’s Oscillator 14. Single Tuned Voltage Amplifier
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INDEX
S.NO. EXPERIMENT NAME PAGE
NO. 1 ELECTRONIC CIRCUIT ANALYSIS USING PSPICE 3
1.A COMMON EMITTER AMPLIFIER (SW) 22
1.B COMMON EMITTER AMPLIFIER (HW) 27
2.A COMMON BASE AMPLIFIER (SW) 29
2.B COMMON BASE AMPLIFIER (HW) 33
3.A COMMON SOURCE AMPLIFIER (SW) 35
3.B COMMON SOURCE AMPLIFIER (HW) 38
4.A TWO STAGE RC COUPLED AMPLIFIER (SW) 41
4.B TWO STAGE RC COUPLED AMPLIFIER (HW) 45
5.A CURRENT SHUNT FEEDBACK AMPLIFIER(SW) 47
5.B CURRENT SHUNT FEEDBACK AMPLIFIER(HW) 51
6.A VOLTAGE SERIES FEEDBACK AMPLIFIER(SW) 53
6.B VOLTAGE SERIES FEEDBACK AMPLIFIER 57
7.A CASCODE AMPLIFIER(SW) 59
7.B CASCODE AMPLIFIER(HW) 62
8.A RC PHASE SHIFT OSCILLATOR USING TRANSISTORS(SW) 64
8.B RC PHASE SHIFT OSCILLATOR USING TRANSISTORS(HW) 67
9.A SINGLE TUNED VOLTAGE AMPLIFIER(SW) 69
9.B SINGLE TUNED VOLTAGE AMPLIFIER(HW) 72
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TUTORIAL 1
ELECTRONIC CIRCUIT ANALYSIS USING PSPICE
1.1 AIM
1. To learn the basic features of PSpice.
2. To use PSpice for the following:
i) Analysis by using Schematic Editor.
ii) Analysis by using Circuit File Editor.
1.2 INTRODUCTION SPICE (Simulation Program with Integrated Circuit Emphasis) is a
computer simulation and modeling program used by engineers to
mathematically predict the behavior of electronic circuits. PSpice is a member of
the SPICE family of circuit simulators. In the following exercises you will use
PSpice ( OrCAD 16.0 Demo version) to solve some circuits and to determine the
quantities of interest.
SPICE can do several types of circuit analysis. They are
Non linear DC analysis: calculates DC transfer curve
Non linear transient analysis: calculates voltages and currents as a
function of time when a signal is applied
Linear AC analysis: calculates the output as afunction of frequency.
Noise analysis
Sensitivity analysis
Distortion analysis
Fourier analysis: calculates and plots the frequency spectrum.
Monte Carlo Analysis.
Pspice has analog and digital libraries of standard components. All analyses can
be done at different temperatures. The default temperature is 300K. The circuit
can contain the following components: Independent and dependent voltage and
current sources, Resistors, Capacitors, Inductors, Mutual Inductors,
Tramsmission lines, Operational amplifiers, Diodes, Bipolar transistors, MOS
transistors, JFETS, MESFETS, Digital gates.
1.2.1 File Types Used and Created by PSpice
The basic input file for PSpice is a text (ASCII) file that has the file type "CIR". The
output file always generated by PSpice is a text (ASCII) file that has the file type
"OUT. The output results in *.OUT file if you are running a DC analysis. If you are
running a transient analysis or a frequency sweep analysis, there will be too
much data for the *.OUT file. In these cases, we add a command called .PROBE to
the *.CIR file that tells PSpice to save the numerical data in a *.DAT file.
A companion file to the *.DAT file is the *.PRB file which holds initializing
information for the PROBE program. Another file called *.INC (include) files,
these enable us to store frequently used subcircuits that have not yet been added
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to a library. Then we access these *.INC files with a single command line in the
*.CIR file. Other files used with PSpice are *.LIB files where the details of complex
parts are saved
When we begin using the schematic capture program that is bundled with
PSpice, we will encounter some additional file types. These are the *.SCH (the
schematic data, itself), *.ALS (alias files) and *.NET (network connection files).
1.3 ANALYSIS BY USING CIRCUIT FILE EDITOR
1.3.3 Some Facts and Rules about PSpice
PSpice is not case sensitive.
All element names must be unique.
The first line in the data file is used as a title. It is printed at the top of
each page of output. PSpice will ignore this line as circuit data. Do not
place any actual circuit information in the first line.
There must be a node designated "0." (Zero) This is the reference node
against which all voltages are calculated.
Each node must have at least two elements attached to it.
The last line in any data file must be ".END"
All lines that are not blank (except for the title line) must have a character
in column 1, the leftmost position on the line.
o Use "*" (an asterisk) in column 1 in order to create a comment line.
o Use "+" (plus sign) in column 1 in order to continue the previous
line (for better readability of very long lines).
o Use "." (period) in column 1 followed by the rest of the "dot
command" to pass special instructions to the program.
o Use the designated letter for a part in column 1 followed by the
rest of the name for that part (no spaces in the part name).
Use "whitespace" (spaces or tabs) to separate data fields on a line.
Use ";" (semicolon) to terminate data on a line if you wish to add
commentary information on that same line.
1.3.2 How to Specify the Circuit Topology and Analysis
A PSpice input file,called source file, consists of three parts.
1. DATA STATEMENTS: description of the components and the
interconnections.
2. CONTROL STATEMENTS: tells spice what type of analysis to perform on
the circuit.
3. OUTPUT STATEMENT: specifies what outputs are to be printed or plotted.
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The order of statements:
TITLE STATEMENT
ELEMENT STATEMENTS
.
.
COMMAND (CONTROL) STATEMENT
OUTPUT STATEMENTS
.END
1.3.3 Node Designations in PSpice
In the SPICE program, users were expected to designate nodes by number or
ordinary text. E.g. "Pbus," . The only restriction is you can't embed spaces in a
node name. Use the underscore ("_") character to simulate spaces.
1.3.4 Large and Small Numbers in PSpice
PSpice is a computer program used mostly by engineers and
scientists. Accordingly, it was created with the ability to recognize the typical
metric units for numbers.
Number Prefix Common Name
1012 - "T" or "t" tera
109 - "G" or "g" giga
106 - "MEG" or "meg" mega
103 - "K" or "k" kilo
10-3 - "M" or "m" milli
10-6 - "U" or "u" micro
10-9 - "N" or "n" nano
10-12 - "P" or "p" pico
10-15 - "F" or "f" femto
An alternative to this type of notation, which is in fact, the default for PSpice
output data, is "textual scientific notation." This notation is written by typing an
"E" followed by a signed or unsigned integer indicating the power of ten. Some
examples of this notation are shown below:
656,000 = 6.56E5
-0.0000135 = -1.35E-5
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1.3.5 Data Statements to Specify the Circuit Components and
Topology
Ideal Independent DC and AC Sources
Voltage source: *name +node -node type value
Current source: *name +node –node type value
AC voltage or current source: *name +node –node type value phase(deg)
The *name of a voltage and current source must start with V and I respectively.
+node is the positive terminal node
-node is the negative terminal node
type is DC
value gives the value of the source
phase(deg) phase angle in degrees
Examples:
Va 4 2 DC 16.0V; "V" after "16.0" is optional
vs qe qc dc 24m; "QE" is +node & "qc" is -node
VWX 23 14 18k; "dc" not really needed
vwx 14 23 DC -1.8E4; same as above
Vdep 15 27 DC 0V ; V-source used as ammeter
Icap 11 0 DC 35m; 35mA flows from node 11 to 0
ix 79 24 1.7; "DC" not needed
I12 43 29 DC 1.5E-4;
I12 29 43 dc -150uA; same as above
Vac 4 1 AC 120V 30
Vba 2 5 AC 240 ; phase angle 0 degrees
Ix 3 6 AC 10.0A -45 ; phase angle -45 degrees
Isv 12 9 AC 25mA ; 25 milliamps @ 0 degrees
Vac 1 2 SIN(0 230 50);sinewave with zero dc amplitude 230V and 50Hz
frequency.
Resistors
*name +node -node value
The *name of a resistor must start with R.
+node is the positive terminal node
-node is the negative terminal node
Value gives the value of the source
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Examples:
Rabc 31 0 14k ; reported current from 31 to 0
Rabc 0 31 14k ; reported current changes sign
rshnt 12 15 99m ; 0.099 ohm resistor
Rbig 19 41 10MEG ; 10 meg-ohm resistor
Capacitors and Inductors
Capacitor: *name +node -node value <IC>
Inductor: *name +node -node value <IC>
The *name of a capacitor and Inductor source must start with C and L
respectively.
+node is the positive terminal node
-node is the negative terminal node
Value gives the value of the capacitor or inductor
<IC> (Initial Condition) initial voltage and initial current of C and L respectively.
Example:
Cfb 4 5 50u IC=20
Lag 1 2 50m IC=2.5
Semiconductor Devices
A semiconductor device is specified by two command lines: an element and
model statement. The syntax for the model statement is:
.MODEL MODName type (parameter values)
MODName is the name of the model for the device
type refers to type of device [ D:diode, NPN: npn bipolar transistor, PNP: pnp
bipolar transistor, NMOS: nmos transistor, PMOS: pmos transistor, NJF: N-
channel JFET model, PJF: P-channel JFET model]
parameter values specify the device characterstics.
DIODE
Element line: Dname +node –node MODName
Model Statement: .MODEL MODName D<parameter values>
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Example:
D1 2 1 DIODE
.MODEL DIODE D(IS=4.7E-12,N=1)
BIPOLAR TRANSISTORS
Element line: Qname Collectornode Basenode Emitternode BJT_modelName
Model Statement: .MODEL BJT_modelName NPN<parameter values>
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Example:
Q1 3 2 1 NPN
.MODEL NPN NPN(BF=200 CJC=20pf CJE=20pf
MOSFETS
Element line: Mname Drainnode Gatenode Sourcenode bulknode ModelName L=
W=
Model Statement: .MODEL ModelName NMOS<parameter values>
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Example:
M1 10 20 0 0 NFET
.MODEL NFET NMOS (LEVEL=0 VTO=2 KP=0.1)
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JFETS
Element line: Jname Drainnode Gatenode Sourcenode ModelName
Model Statement: .MODEL ModelName NJF/PJF<parameter values>
1.3.6 Command or Control Statements to Specify the Type of
Analysis
.OP Statement: This statement instructs Spice to compute the DC
operating point:
Voltages at the nodes
Current in each voltage source
Operating point of each element
Syntax:
.OP
.DC Statement: This is a method of varying a parameter over a range of
values so that we get a batch of cases solved all at once. A DC sweep is
made by changing the values of a source. The syntax for DC sweep is
.DC Sweep_Variable Starting_Value Stopping_Value Increment
Example:
.DC Vs 20.0 40.0 1.0
.AC Statement: .AC command was designed to make a sweep of many
frequencies for a given circuit. This is called a frequency response . Three
types of ranges are possible for the frequency sweep: LIN, DEC and OCT.
.AC type #points start stop
.AC LIN 1 60Hz 60Hz; <== single frequency.
.AC LIN 11 100 200; <== a linear range frequency sweep using
*frequencies of 100Hz, 110Hz, 120Hz, 130Hz, 140Hz, 150Hz, 160Hz,
170Hz, *180Hz, 190Hz and 200Hz.
.AC DEC 20 1Hz 10kHz; <== a logarithmic range(base 10) sweep
using 20 points *per decade over a range of four decades.
.AC OCT 20 1Hz 800Hz; ; <== a logarithmic range(base 2) sweep
using *20 points per octave over a range of ten octaves.
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.TF Statement: This statement instructs Spice to compute small signal
characteristics.
The ratio of output to input variable(gain and transfer gain)
The resistance with respect to input source.
The resistance with output source
.TF outvar inscr
Outvar: output variable
Inscr: input source
Example:
.TF V(3,0) vin
.SENS Statement: This instructs PSpice to calculate the DC small signal
sensitivities of each specified output variable with respect to every circuit
parameter.
.SENS VARIABLE
Example: .SENS V(3,0)
.TRAN Statement: This statement specifies the time interval over which
the transient analyses take place, and the time increments. The format is
as follows:
.TRAN TSTEP TSTOP <TSTART <TMAX>> <UIC>
TSTEP is the printing increment.
TSTOP is the final time.
TSTART is the starting time (If omitted, TSTART is assumed to be zero)
TMAX is the maximum step size.
UIC stands for Use Initial Conditions and instructs PSpice not to do the
quiescent operating point before beginning the transient analysis. If UIC is
specified. PSPICE will use the initial conditions specified in the element
statements.
.IC Statement: This statement provides an alternate way to specify initial
conditions of nodes.
.IC Vnode1=value Vnode=value
.PROBE Statement: PSpice will create a file named ".DAT" holding the
data as well as the usual ".OUT" file with basic information about the
circuit.
PROBE V(5,23) I(Rx) I(L4)
The above statement tells PSpice to save only the voltage drop between
nodes 5 and 23, the current through resistor, Rx, and the current through
inductor, L4, all in binary format. No other data will be saved.
1.3.7 Output Statements
These statements will instruct PSpice what output to generate. If you do not
specify an output statement. PSpice will always calculate the DC operating
points. The two types of outputs are the print and plot. A print is a plot of data
points and a plot is a graphical representation. The .PRINT TYPE OV OV OV …. .PLOT TYPE OV OV OV ….
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in which TYPE specifies the type of analysis to be printed or plotted and can be :
DC
TRAN
AC
The output variables are OV1, OV2 and can be voltage or currents in voltage
sources. Node voltages and device currents can be specified as magnitude(M),
phase(P), real(R) or imaginary(I) parts by adding the suffix to V or I as follows:
M: magnitude
DB: magnitude in dB(decibels)
P: phase
R: real part
I: imaginary part
Examples:
.PRINT DC I(Ra) ; prints the currents from + to - of Ra
.PRINT DC I(Rb) I(Rc) ; prints the currents through Rb and Rc
.PRINT DC V(1) V(2) V(3) ; prints the node voltages
.PRINT DC V(1,2) ; prints the voltage across Ra
.PRINT DC V(3,2) ; prints the voltage across Is
.PRINT DC V(1,2) I(Ra) ; voltage and current for Ra
.PRINT DC V(2,0) I(Rb) ; V(2,0) same as V(2)
.PRINT AC VM(30,9) VP(30,9); magnitude & angle of voltage
.PRINT AC IR(Rx) II(Rx); real & imag. parts Rx current
.PLOT AC VM(17) VP(17) VR(17) VI(17); the whole works on node 17
1.3.8 RUNNING SPICE AND VIEWING OUTPUT
1. On the computer's Desktop screen, click on Start, move the cursor
to Programs > Orcad 16.0 >PSpice AD demo
2. The Orcad PSpice A/D demo should open. Click on File > New
>Text file
3. The New Pspice A/D demo-[Text1] opens.
4. Type the netlist and once completed, click on file > save. The save as window opens, browse for the folder you want to save and save the file with name of file .CIR extension. Click save and close the window.
5. Next click file > close. Then file > Open Simulation. A window open simulation pop up. Browse for file saved in step [ name of file.CIR ]. Double click on the .CIR file you want to simulate. 6. Click Simulation > Run name of file. A window Analysis type pop
up select any analysis [AC/DC/Transient].
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7. Name of file- Pspice A/D Demo- [name of file (active ] window will appear. Then click > trace> add trace. Add traces window pop
ups write the trace expression and view output plot.
8. The files to be observed are
Click view > output file ; The printed output will be
available
Click view > dock output window and simulation status window Check both the windows . In output window you can observe analysis time, watch variables, no. of devices. In
simulation status window you observe any errors which
you edit in view > circuit file make the changes in netlist.
1.4 ANALYSIS BY USING SCHEMATIC FILE EDITOR
INTRODUCTION
This tutorial will introduce Orcad PSPICE. It will take you through the steps of
entering a schematic diagram, specifying the type of analysis, running the
simulation, and viewing the output file. The Orcad PSPICE software allows the
user to input their circuits using a schematic capture program (called "Capture" or Capture CIS . The software creates a SPICE input file from this diagram and performs the analysis. In this course, we will utilize the Capture program.
Starting a New PSPICE File
To learn the fundamental steps of running a PSPICE simulation we will begin
with the simple resistive circuit shown in figure 1.
1. On the computer's Desktop screen, click on Start, move the cursor to all
Programs > Orcad 16.0 demo >Orcad Capture CIS demo
2. The Orcad Capture window should open. Click on File > New > Project..
3. The New Project dialog box should open.
4. Type the name of your circuit in the "Name" box, and indicate the path to
the directory in which you want to store your file under "Location".
5. Click on the radio button next to: Analog or Mixed A/D, then click OK.
6. The Create PSPICE Project dialog box will appear. Select "Create a blank
project", and click OK.
7. A schematic entry window will appear. The screen should now look
similar to that in Figure
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Figure 2. Schematic Entry Window
Figure 3. Place Part Dialog Box
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Placing the Parts 1. Select Place > Part. The place part dialog box will open as shown in figure
3 (again, it may have a different appearance). In the lower left-hand
corner a list of the libraries that have been loaded will appear. Your list
may be different that the one shown in the figure. If this is the first time
you are running PSPICE on a particular computer all of the libraries may
not appear. At a minimum you should install the libraries: analog, eval,
source, and special. To add a Library, click on the Add Library Icon (a
small square above the library list in version 16.2). The libraries listed
above can be found in the following directory:
../tools/capture/library/pspice/demo (or something similar)
Add each of the four libraries listed above.
2. In the Place Part dialog box, click on the "Analog" library, then click on
the "R" in the Part List. A drawing of a resistor should appear in the lower
right corner. Press Enter/Return.
3. Move your mouse pointer over the schematic window. A resistor should
be following the pointer. Drag the resistor to the desired location and
click once to place it.
4. Drag to the next location to place the second resistor and click to place it.
5. Since we want the third resistor to be vertical, right-click the mouse
button and select "Rotate" from the popup menu. Then click to place the
third resistor (see figure 4).
Figure 4. Resistor Placement
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6. Once all of the resistors have been placed, right-click the mouse button
and select "End Mode" from the pop-up menu. This will cause the resistor
to disappear. Alternatively, you may enter ESC . 7. Next, we need to add the DC voltage source. Select the "Source" library
from the Place Part window and the part "VDC." Place this on the
schematic as you did with the resistors.
8. Every circuit that is simulated on PSPICE must have a ground node
indicated. This is done by entering the ground symbol. To place the
ground, select Place>Ground (or click on the ground symbol on the
toolbar). Select the "Source" library and the ground part labeled "0". It is
very important that you use this particular ground or your
simulation will not run. The first time you use this ground you may need
to add the Source library from the Place Ground window. Place the
ground as shown in figure 5.
Figure 5. Circuit Element Placement
Wiring the schematic 1. Select the Place Wire button from the toolbar.
2. Drag the cross-hair pointer to the positive end of the VDC source. Click
on it.
3. Move the cross-hair pointer to the left terminal marker of the first
resistor. Click on it.
4. Repeat the procedure until all components are connected.
5. Click the right mouse button. Select End Wire and click on it. Your
schematic should now appear as the one in figure 6.
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Figure 6. Wired Circuit
Setting the component values 1. All of the resistor values default to KΩ. To change a resistor value,
double click on the resistor value. The Display Properties box appears.
2. In the Value box, type in the desired resistance. Make sure to use the
appropriate suffix as listed in the PSPICE introduction. Click on OK.
3. Repeat for all resistors.
4. Using the same procedure change the value of the dc voltage source to
10V. The circuit should now appear as the one in figure 7.
Figure 7. Circuit with Component Values
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Specifying the type of analysis 1. In this simple DC circuit there are no time varying voltages or currents.
Thus, we only need to find the values of the dc voltages and currents
throughout the circuit. This is referred to as a DC Bias analysis.
2. Choose the menu option: PSPICE a New Simulation Profile. A dialog
box will open. Type in the name of the simulation as "DC Bias". Click
Create.
3. The Simulations Settings dialog box opens. Under Analysis Type, select
Bias Point and click OK.
4. Save your circuit.
Running the Simulation 1. Select the menu option: PSPICE >Run. The simulation will run and the
simulation window will open as shown in figure 8.
2. In the lower left corner of the window is an output text section that
displays the progress of the simulation and any errors that were
encountered.
3. In this example, we will view the results of the simulation as a SPICE
output file. Select the menu option: View >Output File. A text file will
appear in the upper window. Figure 9 shows the output and describes
each section. Note that the default output includes the voltage at each
node and the current flowing through each voltage source. For example,
the initial circuit listing in the output shows us that the 3K resistor is
connected between nodes N00132 and N00159. The output indicates that
the voltages at those two nodes are 8 and 5 volts respectively. Thus, this
resistor has 3 volts across it.
Figure 8. Simulation Window
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**** 03/29/01 13:17:18 ************** PSpice Lite (Mar 2000) ***************** ** Profile: "SCHEMATIC1-dc bias" [ C:\Program Files\OrcadLite\project1-SCHEMATIC1-dc
bias.sim ]
**** CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "project1-SCHEMATIC1-dc bias.sim.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY
SUBSEQUENT
SIMULATIONS
*Libraries:
* Local Libraries :
* From [PSPICE NETLIST] section of C:\Program Files\OrcadLite\PSpice\PSpice.ini file:
.lib "nom.lib"
*Analysis directives:
.PROBE V(*) I(*) W(*) D(*) NOISE(*)
.INC ".\project1-SCHEMATIC1.net"
**** INCLUDING project1-SCHEMATIC1.net ****
* source PROJECT1
R_R1 N00102 N00132 2K
R_R2 N00132 N00159 3K
R_R3 0 N00159 5K
V_V1 N00102 0 10V
**** RESUMING "project1-SCHEMATIC1-dc bias.sim.cir" ****
.END
**** 03/29/01 13:17:18 ************** PSpice Lite (Mar 2000) *****************
** Profile: "SCHEMATIC1-dc bias" [ C:\Program Files\OrcadLite\project1-SCHEMATIC1-dc
bias.sim ]
**** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C
******************************************************************************
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
(N00102) 10.0000 (N00132) 8.0000 (N00159) 5.0000
VOLTAGE SOURCE CURRENTS
NAME CURRENT
V_V1 -1.000E-03
TOTAL POWER DISSIPATION 1.00E-02 WATTS
JOB CONCLUDED
TOTAL JOB TIME .13
Figure 9. PSPICE Output File
4. Return to the window with your schematic. Select PSPICE > Bias Points>
Enable Bias>Voltage Display (if it is not already selected). The dc bias
voltages will now be displayed directly on your diagram eliminating the
need to view the output file at all. See figure 10. Experiment with
displaying the current and power values.
Current Sources
A DC independent current source can be found in the parts list as IDC. This is
similar to the voltage source used above except the current is held at a
specified value.
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Figure 10. Schematic with Bias Voltage Display
Displaying Currents and Power In addition to displaying voltages, current and power values found in the bias
point analysis can also be displayed. Enter the schematic shown in Figure 11.
Perform the DC bias point analysis. Select PSPICE> Bias Points >Enable Bias
Power Display . Confirm that the power values displayed are correct.
Figure 11. DC Analysis Problem
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EXPERIMENT 1.A
COMMON EMITTER AMPLIFIER (SOFTWARE)
AIM
1. To simulate the Common Emitter amplifier in Pspice and study the
transient and frequency response. 2. To determine the phase relationship between the input and output
voltages by performing the transient analysis. 3. To determine the maximum absolute gain, maximum gain in dB, 3dB gain,
lower and upper cutoff frequencies and bandwidth of CE amplifier by
performing the AC analysis.
SOFTWARE TOOL
1. LAN connected computer systems with WINDOWS XP
2. PC loaded with Orcade 16.0 PSpice software.
THEORY
The Common-Emitter (CE) is the most frequently used configuration in practical
amplifier circuits, since it provides good voltage, current, and power gain. The
input to the CE is applied to the base-emitter circuit and the output is taken from
the collector-emitter circuit, making the emitter the terminal "common" to both
input and output. The CE is set apart from the other configurations, because it is
the only configuration that provides a phase reversal between input and output
signals.
When positive half of the signal is applied, the voltage between base and emitter
(Vbe) is increased because it is already positive with respect to ground. So
forward bias is increased i.e., the base current is increased. Due to transistor
action, the collector current IC is increased β times. When this current flows through RC, the drop IC RC increases considerably. As a consequence of this, the
voltage between collector and emitter (Vce) decreases. In this way, amplified
voltage appears across RC. Therefore the positive going input signal appears as a
negative going output signal i.e., there is a phase shift of 180° between the input
and output.
The gain from the base to the collector can be approximated by the collector
resistance over the emitter resistance (RC’/RE).where RC’ is the AC resistance seen by the collector, RC|| RL, and RE’ is the AC resistance seen by the emitter, RE.
The emitter resistance controls the DC bias. The gain can be increased by
choosing a smaller RE.
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
1. SCHEMATIC i) Select the components from the symbol library and place it on
the schematic window.
ii) The selected symbol is displayed on the screen in red. Move the symbol to the desired location using the mouse.
iii) You can change the view of most symbols by performing the following operations: rotate, mirror and flip.
iv) Wires and junctions are used to wire together parts and indicate electrical connections.
v) To draw a wire, select the Wire menu command, Move the cursor to the wire starting position and click the left mouse button or press Enter. Now you can move the other end of wire to the desired location.
vi) The junction symbol (a large dot) indicates an electrical connection between wires or between a wire and a part pin.
vii) Most parts (components) require that you specify the following set of attributes: reference name, value or model name, and optional parameters.
viii) You can also change the attributes by double-clicking on a part on the schematic.
ix) Once circuit construction is completed; the analysis is to be
performed.
x) To simulate a circuit, select the Analysis|Run Simulation menu command from the Schematic.
xi) If there are any errors during the simulation, the simulator writes any applicable error messages to the simulation output file.
xii) Three different modes of circuit analysis: DC, AC (frequency response) and transient.
xiii) Before simulation, we have to do the analysis setup.
xiv) Once analysis setup is over, then perform Run Simulation.
xv) From the analysis note down the readings, plot the graph, do
the calculations.
2. CIRCUIT FILE
i) The SPICE circuit file (default filename extension ".CIR") is the input file for the simulator program.
ii) This is a text file, which contains the circuit netlist, simulation command and device model statements.
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iii) Write the circuit file for the given schematic assuming the node numbers. Save the circuit file.
iv) To simulate the circuit file, select the Analysis|Run Simulation menu command from the circuit file menu.
v) If there are any errors during the simulation, the simulator writes any applicable error messages to the simulation output file.
vi) Three different modes of circuit analysis: DC, AC (frequency response) and transient.
vii) Before simulation, we have to do the analysis setup.
viii) Once analysis setup is over, then perform Run Simulation.
ix) From the analysis note down the readings, plot the graph, do
the calculations.
EXPECTED GRAPHS
1. TRANSIENT RESPONSE
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2. FREQUENCE RESPONSE
RESULT
1. From the transient analysis the phase relationship between input and output
voltage signals is ___________ degrees.
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 1.B
COMMON EMITTER AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of a BJT amplifier in common emitter
configuration.
2. Calculate gain. 3. Calculate bandwidth
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. BJT BC107(npn) 1
5. Resistors KΩ 2 KΩ 2 . KΩ, KΩ 1
6. Capacitors 10µF 2
100 µF 1
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for common emitter
amplifier on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of common emitter BJT amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, f2—f1 = _________Hz. VIVA VOCE
1. Why the CE amplifier provides a phase reversal?
2. In the dc equivalent circuit of an amplifier, how are capacitors treated?
3. What is the effect of bypass capacitor on frequency response?
4. Define lower and upper cutoff frequencies for an amplifier.
5. State the reason for fall in gain at low and high frequencies.
6. What is meant by unity gain frequency?
7. Define Bel and Decibel.
8. What do we represent gain in decibels?
9. Why do you plot the frequency response curve on a semi-log paper?
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EXPERIMENT 2.A
COMMON BASE AMPLIFIER (SOFTWARE)
AIM
1. To simulate the Common Base amplifier in Pspice and study the transient
and frequency response.
2. To determine the phase relationship between the input and output
voltages by performing the transient analysis.
3. To determine the maximum absolute gain, maximum gain in dB, 3dB gain,
lower and upper cutoff frequencies and bandwidth of CB amplifier by
performing the AC analysis.
SOFTWARE TOOL
1. LAN connected computer systems with WINDOWS XP
2. PC loaded with Orcade 16.0 PSpice software.
THEORY
The common base transistor amplifier finds applications where low input
impedance is required. The common base format is probably most commonly
used for RF applications, where its input impedance can be used for matching to
the low source impedances often found in this arena.
For both NPN and PNP circuits, it can be seen that for the common base amplifier
circuit, the input is applied to the emitter, and the output is taken from the
collector. The common terminal for both circuits is the base. The common base
amplifier configuration is not used as widely as transistor amplifier
configurations. However it does find uses with amplifiers that require low input
impedance levels. One application is for moving-coil microphones preamplifiers -
these microphones have very low impedance levels. Another application is
within VHF and UHF RF amplifiers where the low input impedance allows
accurate matching to the feeder impedance which is typically Ω or Ω. It is worth noting that the current gain of a common-base amplifier is always less
than unity. However the voltage gain may be more, but it is a function of input
and output resistances (and also the internal resistance of the emitter-base
junction). As a result, the voltage gain of a common-base amplifier can be very
high.
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT RESPONSE
2. FREQUENCE RESPONSE
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RESULT
1. From the transient analysis the phase relationship between input and output
voltage signals is ___________ degrees.
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 2.B
COMMON BASE AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of a BJT amplifier in common base
configuration.
2. Calculate gain. 3. Calculate bandwidth
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. BJT BC107NPN) 1
5. Resistors 10KΩ 2 KΩ, . KΩ, KΩ 1
6. Capacitors 10µF 2
100 µF 1
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for common base amplifier
on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 20mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
OBSERVATION TABLE Vin= 20mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of common base BJT amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, f2—f1 = _________Hz. VIVA VOCE
1. What is the typical value of the current gain of a common-base
configuration?
2. What is the range of the input impedance of a common-base
configuration?
3. In a common-base amplifier, the input signal is applied between which
terminals?
4. What is the controlling current in a common-base configuration?
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EXPERIMENT 3.A
COMMON SOURCE AMPLIFIER (SOFTWARE)
AIM
1. To simulate the Common Source amplifier in Pspice and study the
transient and frequency response.
2. To determine the phase relationship between the input and output
voltages by performing the transient analysis.
3. To determine the maximum absolute gain, maximum gain in dB,
3dB gain, lower and upper cutoff frequencies and bandwidth of CS
amplifier by performing the AC analysis.
SOFTWARE TOOL
1. LAN connected computer systems with WINDOWS XP
2. PC loaded with Orcade 16.0 PSpice software.
THEORY
In Common Source Amplifier Circuit Source terminal is common to both the
input and output terminals. In this Circuit input is applied between Gate and
Source and the output is taken from Drain and the source. JFET amplifiers
provide an excellent voltage gain with the added advantage of high input
impedance and other characteristics JFETs are often preferred over BJTs for
certain types of applications. The CS amplifier of JFET is analogous to CE
amplifier of BJT.
The FET has some advantages and some disadvantages relative to the bipolar
transistor. Field-effect transistors are preferred for weak-signal work, for
example in wireless, communications and broadcast receivers. They are also
preferred in circuits and systems requiring high impedance. The FET is not, in
general, used for high-power amplification, such as is required in large wireless
communications and broadcast transmitters.
Field-effect transistors are fabricated onto silicon integrated circuit (IC) chips. A
single IC can contain many thousands of FETs, along with other components such
as resistors, capacitors, and diodes.
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT RESPONSE
2. FREQUENCE RESPONSE
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RESULT
1. From the transient analysis the phase relationship between input and output
voltage signals is ___________ degrees.
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 3.B
COMMON SOURCE AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of a JFET amplifier in common source
configuration.
2. Calculate gain. 3. Calculate bandwidth
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. JFET BFW10/11(N CHANNEL) 1
5. Resistors KΩ, . KΩ, . KΩ, KΩ 1
6. Capacitors 10µF 2
100 µF 1
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for common source
amplifier on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note
the corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of common source JFET amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, f2—f1 = _________Hz.
VIVA VOCE
1. What is Miller effect on common source amplifier?
2. What is the purpose of source resistor and gate resistor?
3. What is swamping resistor?
4. What is the purpose of swamping resistor in common source amplifier?
5. FET is a liner or non-linear device. And justify your answer
6. What is square law and give an example for a square law device?
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EXPERIMENT 4.A
TWO STAGE RC COUPLED AMPLIFIER (SOFTWARE)
AIM
1. To simulate the two stage RC coupled amplifier in Pspice and study the
transient and frequency response.
2. To determine the phase relationship between the input and output
voltages by performing the transient analysis.
3. To determine the maximum absolute gain, maximum gain in dB, 3dB gain,
lower and upper cutoff frequencies and bandwidth the two stage RC coupled
amplifier by performing the AC analysis.
SOFTWARE TOOL 1. LAN connected computer system with WINDOWS XP
2. PC loaded with Orcade 16.0 Pspice software
THEORY
An amplifier is the basic building block of most electronic systems. Just as one
brick does not make a house, a single-stage amplifier is not sufficient to build a
practical electronic system. The gain of the single stage is not sufficient for
practical applications. The voltage level of a signal can be raised to the desired
level if we use more than one stage. When a number of amplifier stages are used
in succession (one after the other) it is called a multistage amplifier or a cascade
amplifier. Much higher gains can be obtained from the multi-stage amplifiers.
In a multi-stage amplifier, the output of one stage makes the input of the next
stage. We must use a suitable coupling network between two stages so that a
minimum loss of voltage occurs when the signal passes through this network to
the next stage. Also, the dc voltage at the output of one stage should not be
permitted to go to the input of the next. If it does, the biasing conditions of the
next stage are disturbed.
Figure shows how to couple two stages of amplifiers using RC coupling scheme.
This is the most widely used method. In this scheme, the signal developed across
the collector resistor RC of the first stage is coupled to the base of the second
stage through the capacitor CC. The coupling capacitor blocks the dc voltage of
the first stage from reaching the base of the second stage. In this way, the dc
biasing of the next stage is not interfered with. For this reason, the capacitor CC is
also called a blocking capacitor. As the number of stages increases, the gain
increases and the bandwidth decreases. RC coupling scheme finds applications in
almost all audio small-signal amplifiers used in record players, tape recorders,
public-address systems, radio receivers, television receivers, etc.
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT ANALYSIS
2. FREQUENCY RESPONSE
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RESULT
1. From the transient analysis, it is observed that,___________________________
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
3. From the AC response, it is observed that, ________________________
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EXPERIMENT 4.B
TWO STAGE RC COUPLED AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of a two stage RC coupled amplifier.
2. Calculate gain. 3. Calculate bandwidth
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. BJT BC107(NPN) 2
5. Resistors KΩ 5 . KΩ, KΩ, KΩ 2 KΩ 1
6. Capacitors 10µF 3
100 µF 2
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for two stage RC coupled
amplifier on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of two stage RC amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, fH--fL = _________Hz. VIVA VOCE
1. Why do you need more than one stage of amplifiers in practical circuits?
2. What is the effect of cascading on gain and bandwidth?
3. What happens to the 3dB frequencies if the number of stages of amplifiers
increases?
4. Why we use a logarithmic scale to denote voltage or power gains, instead
of using the simpler linear scale?
5. What is loading effect in multistage amplifiers?
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EXPERIMENT 5.A
CURRENT SHUNT FEEDBACK AMPLIFIER (SOFTWARE)
AIM
1. To simulate the Current shunt feedback amplifier in Pspice and study the
transient and frequency response.
2. To determine the phase relationship between the input and output
voltages by performing the transient analysis.
3. To determine the maximum absolute gain, maximum gain in dB, 3dB gain,
lower and upper cutoff frequencies and bandwidth of the current shunt
feedback amplifier by performing the AC analysis.
SOFTWARE TOOL 1. LAN connected computer system with WINDOWS XP
2. PC loaded with Orcade 16.0 Pspice software
THEORY
Feedback plays a very important role in electronic circuits and the basic
parameters, such as input impedance, output impedance, current and voltage
gain and bandwidth, may be altered considerably by the use of feedback for a
given amplifier. A portion of the output signal is taken from the output of the
amplifier and is combined with the normal input signal and thereby the feedback
is accomplished.
There are two types of feedback. They are i) Positive feedback and ii) Negative
feedback. Negative feedback helps to increase the bandwidth, decrease gain,
distortion, and noise, modify input and output resistances as desired. A current
shunt feedback amplifier circuit is illustrated in the figure. It is called a series-
derived, shunt-fed feedback. The shunt connection at the input reduces the input
resistance and the series connection at the output increases the output
resistance. This is a true current amplifier.
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT ANALYSIS
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2. FREQUENCY RESPONSE
RESULT
1. From the transient analysis, it is observed that,___________________________
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 5.B
CURRENT SHUNT FEEDBACK AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of Current shunt feedback amplifier.
2. Calculate gain. 3. Calculate bandwidth.
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. BJT BC107(NPN) 2
5. Resistors KΩ 5 . KΩ, KΩ, KΩ 2 . KΩ , KΩ 1
6. Capacitors 10µF 4
100 µF 2
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for Current shunt feedback
amplifier on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of current shunt feedback amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, fH--fL = _________Hz. VIVA VOCE
1. State the merits and demerits of negative feedback in amplifiers.
2. If the bypass capacitor CE in an RC coupled amplifier becomes accidentally
open circuited, what happens to the gain of the amplifier? Explain.
3. When will a negative feedback amplifier circuit be unstable?
4. What is the parameter which does not change with feedback?
5. What type of feedback has been used in an emitter follower circuit?
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EXPERIMENT 6.A
VOLTAGE SERIES FEEDBACK AMPLIFIER (SOFTWARE)
AIM
1. To simulate the Voltage series feedback amplifier in Pspice and study the
transient and frequency response.
2. To determine the phase relationship between the input and output
voltages by performing the transient analysis.
3. To determine the maximum absolute gain, maximum gain in dB, 3dB gain,
lower and upper cutoff frequencies and bandwidth of the Voltage series
feedback amplifier by performing the AC analysis.
SOFTWARE TOOL 1. LAN connected computer system with WINDOWS XP
2. PC loaded with Orcade 16.0 Pspice software
THEORY
When any increase in the output signal results into the input in such a way as to
cause the decrease in the output signal, the amplifier is said to have negative
feedback. The advantages of providing negative feedback are that the transfer
gain of the amplifier with feedback can be stabilized against variations in the
hybrid parameters of the transistor or the parameters of the other active devices
used in the circuit. The most advantage of the negative feedback is that by proper
use of this, there is significant improvement in the frequency response and in the
linearity of the operation of the amplifier. This disadvantage of the negative
feedback is that the voltage gain is decreased.
The other name of voltage series feedback amplifier is shunt derived series fed
feedback amplifier. The fraction of output voltage is applied in series with input
voltage through feedback circuit. Feedback circuit shunt the output but in series
with input. So the output impedance is decreased while input impedance is
increased. The input & output impedance of an ideal voltage series feedback
amplifier is infinite & zero respectively. The resistor RE is used to provide
necessary biasing for the amplifier with voltage series feedback gain of the
amplifier decreases
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT ANALYSIS
2. FREQUENCY RESPONSE
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RESULT
1. From the transient analysis, it is observed that,___________________________
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 6.B
VOLTAGE SERIES FEEDBACK AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of Voltage series feedback amplifier.
2. Calculate gain. 3. Calculate bandwidth.
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. BJT BC107(NPN) 2
5. Resistors KΩ , . KΩ, KΩ, KΩ 1
6. Capacitors 10µF 2
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for Voltage series feedback
amplifier on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
PRECAUTIONS 1. Avoid loose connections give proper input voltage
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of voltage series feedback amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, fH--fL = _________Hz. VIVA VOCE
1. What is the effect of negative feedback on voltage gain?
2. What is the value of negative feedback fraction?
3. When voltage feedback (negative) is applied to an amplifier, what
happens to its input impedance?
4. When current feedback (negative) is applied to an amplifier, what
happens to its input impedance? 5. What is the effect of negative voltage feedback on bandwidth?
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EXPERIMENT 7.A
CASCODE AMPLIFIER (SOFTWARE)
AIM 1. To simulate the Cascode amplifier in Pspice and study the transient and
frequency response.
2. To determine the phase relationship between the input and output voltages by
performing the transient analysis.
3. To determine the maximum gain, 3dB gain, lower and upper cutoff frequencies
and bandwidth of cascode amplifier by performing the AC analysis.
SOFTWARE TOOL 1. LAN connected computer system with WINDOWS XP
2. PC loaded with Orcade 16.0 Pspice software
THEORY Cascode amplifier is a two stage circuit consisting of a transconductance amplifier followed by a buffer amplifier. The word cascode was originated from the phrase cascade to cathode . This circuit have a lot of advantages over the single stage amplifier
like, better input output isolation, better gain, improved bandwidth, higher input
impedance, higher output impedance, better stability, higher slew rate etc. The reason
behind the increase in bandwidth is the reduction of Miller effect. Cascode amplifier
is generally constructed using FET ( field effect transistor) or BJT ( bipolar junction
transistor). One stage will be usually wired in common source/common emitter mode
and the other stage will be wired in common base/ common emitter mode.
CIRCUIT DIAGRAM
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CIRCUIT FILE
PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT ANALYSIS
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2. FREQUENCY RESPONSE
RESULT 1. From the transient analysis, it is observed that,___________________________
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 7.B
CASCODE AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of a cascode amplifier using JFET.
2. Calculate gain. 3. Calculate bandwidth
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC
Power Supply
30 V 1
2. Function
Generator
0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. JFET BFW10/11(N CHANNEL) 2
5. Resistors KΩ, KΩ, KΩ, , . KΩ, KΩ 1 KΩ 2
6. Capacitors 10µF 3
100 µF 1
7. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for cascode amplifier on
breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
PRECAUTIONS 1. Avoid loose connections give proper input voltage
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of cascode amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, fH--fL = _________Hz.
VIVA VOCE 1. Why is cascode amplifier called as wide band amplifier?
2. What are the characteristics of cascode amplifier?
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EXPERIMENT 8.A
RC PHASE SHIFT OSCILLATOR USING TRANSISTORS
(SOFTWARE)
AIM 1. To simulate the RC phase shift oscillator using transistors in Pspice.
2. To evaluate the frequency of oscillations of oscillator and compare with
that of the theoretical value.
SOFTWARE TOOL
1. LAN connected computer system with WINDOWS XP
2. PC loaded with Orcade 16.0 Pspice software
THEORY
Any circuit which is used to generate an ac voltage without an ac input signal is
called an oscillator. Positive feedback is used in oscillators. Based on the type of
components used, the oscillators are classified in to two types. They are LC
oscillators and RC oscillators. In the RC phase shift oscillator the required phase
shift of 180° in the feedback loop from output to input is obtained by using R and
C components. Figure shows the circuit of RC phase shift oscillator using
cascaded connection of high pass filter. Here, a common emitter amplifier is
followed by three sections of RC phase shift network, the output of the last section being returned to the input.The phase shift, φ, given by each RC section is φ=tan-1 /ωRC .If R is made zero φ will become °. But making R= is impracticable because if R is zero, then the voltage across it will become zero. Therefore, in practice the value of R is adjusted such that φ becomes °.
If the values of R and C are so chosen that, for the given frequency fr, the
phase shift of each RC section is 60°. Thus such a RC ladder network produces a
total phase shift of 180° between its input and output voltages for the given
frequency. Therefore, at the specific frequency fr, the total phase shift from the
base of the transistor around the circuit and back to the base will be exactly 360°
or 0°, the thereby satisfying Barkhausen condition for oscillation. The frequency
of oscillation is given by 𝑓𝑟 = 𝜋𝑅𝐶√6
At this frequency, it is found that the feedback factor of the network is |β|
= 1/29. In order that |Aβ| shall not be less than unity, it is required that the
amplifier gain |A| must be more than 29 for oscillator operation.
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CIRCUIT DIAGRAM
CIRCUIT FILE
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PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
TRANSIENT ANALYSIS
RESULT
The theoretical and practical calculation of the frequency of oscillation of
RC phase shift oscillator is calculated as follows:
Theoritical calculations Practical Calculations R=10K C=0.01 u 𝑓𝑟 = πRC√ + k
Where k=RC/R= fr=___________________Hz
T=______________mS f=1/T=________________Hz
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EXPERIMENT 8.B
RC PHASE SHIFT OSCILLATOR USING TRANSISTORS
(HARDWARE) AIM
To measure the frequency of oscillation of RC phase shift oscillator and compare
with that of the theoretical value.
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC
Power Supply
30 V 1
2. CRO 0-20MHz 1
3. BJT BC107(NPN) 1
4. Resistors KΩ, KΩ, . KΩ 1 KΩ 4
5. Capacitors 0.1µF 3
0.047µF 1
10 µF 1
6. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for RC phase shift oscillator
on breadboard.
2. Connect the output of the circuit to the Channel 1 of the CRO using BNC
Probe.
3. Note down the amplitude and time period of the output waveform.
4. Calculate the theoretical frequency of oscillations by using the
formula f = / πRC√6
5. Calculate the practical frequency of oscillations.
EXPECTED WAVEFORM
OBSERVATION TABLE Theoritical calculations Practical Calculations
R=10K C=0.01 u 𝑓𝑟 = πRC√ + k
Where k=RC/R= fr=___________________Hz
T=______________mS f=1/T=________________Hz
RESULT 1. Time period T of the ac signal available at the output = _____________s. 2. The frequency of oscillations, f= ________________________Hz
VIVA VOCE 1. What is Barkhausen criterion?
2. What is the maximum phase shift provided by the single RC network?
3. What is the condition of phase shift oscillator to produce sustained
oscillations?
4. Where does the starting voltage for an oscillator?
5. Why are RC oscillators preferred for the generation of low frequencies?
6. If the percentage feedback for sustained oscillations in an oscillator is 5%,
what is the required gain of amplifier?
7. Find the percentage feedback to produce sustained oscillators if amplifier
gain is 60.
8. An RC phase shift oscillator circuit has 3 identical RC networks with R= Ω, C= µF. Find the frequency of oscillation.
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EXPERIMENT 9.A
SINGLE TUNED VOLTAGE AMPLIFIER (SOFTWARE)
AIM
1. To simulate the Single tuned voltage amplifier in Pspice and study the
transient and frequency response. 2. To determine the phase relationship between the input and output
voltages by performing the transient analysis. 3. To determine the maximum absolute gain, maximum gain in dB, 3dB gain,
lower and upper cutoff frequencies and bandwidth of Single tuned voltage
amplifier by performing the AC analysis.
SOFTWARE TOOL
1. LAN connected computer systems with WINDOWS XP
2. PC loaded with Orcade 16.0 PSpice software.
THEORY
A tuned amplifier is an electronic amplifier which includes bandpass filtering
components within the amplifier circuitry. They are widely used in all kinds of
wireless applications. The signal to be amplified is applied between the terminals
base and emitter. The tank circuit is tuned (i.e L or C may be varied) in such a
way that the resonant frequency becomes equal to the frequency of the input
signal. At resonance the tuned circuit offers very high impedance and thus, the
given input signal is amplified by the amplifier and appears with large value
across it and other frequencies will be rejected. So the tuned circuit selects the
derived frequency and rejects all other frequencies.
CIRCUIT DIAGRAM
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CIRCUIT FILE
PROCEDURE
Procedure is same as that of Experiment 1.A
EXPECTED GRAPHS
1. TRANSIENT RESPONSE
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2. FREQUENCE RESPONSE
RESULT
1. From the transient analysis the phase relationship between input and output
voltage signals is ___________ degrees.
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
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EXPERIMENT 9.B
SINGLE TUNED VOLTAGE AMPLIFIER (HARDWARE)
AIM
1. Plot the frequency response of a Single tuned voltage amplifier
2. Calculate gain. 3. Calculate bandwidth
HARDWARE REQUIRED
S.No. Component Range/Rating Quantity
1. Regulated DC Power
Supply
12 V 1
2. Function Generator 0.1Hz-1MHz 1
3. CRO 0-20MHz 1
4. BJT BC107(npn) 1
5. Resistors KΩ, KΩ, . KΩ, KΩ 1
6. Capacitors 10µF 2
100 µF,1nF 1
7. Inductors 1|mH 1
8. Connecting Wires 22/24 AWG 4
CIRCUIT DIAGRAM
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PROCEDURE
1. Connect the circuit diagram as shown in figure for Single tuned voltage
amplifier on breadboard.
2. Adjust input signal amplitude in the function generator and observe an
amplified voltage at the output without distortion.
3. By keeping input signal voltage, say at 50mV, vary the input signal
frequency from 0 to 1MHz in steps as shown in tabular column and note the
corresponding output voltages.
4. Find the voltage gain, 𝐴𝑉 = 20log 𝑉𝑉𝑖
5. Plot AV VS frequency on a semi-log sheet.
OBSERVATION TABLE Vin= 50mV
Frequency (Hz) Output Voltage(Vo) Gain Av=Vo/Vi Gain(dB)=20log10(Vo/Vi)
10 20
900K 1M
EXPECTED GRAPH
RESULT
1. Frequency response of single tuned voltage amplifier amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth, f2—f1 = _________Hz.
VIVA VOCE
1. What is a tuned amplifier
2. Define Q-factor
3. What is selectivity?
4. Is tuned amplifier a narrow band or wide band amplifier
5. Give the applications for tuned amplifier?