An Ultra Low Power System Architecture for Sensor Network

Applications

Mark Hempstead, Nikhil Tripathi, Patrick Mauro, Prof. Gu-Yeon Wei, Prof. David Brooks

Division of Engineering and Applied SciencesHarvard University

Cambridge, MA

2

Overview• Wireless sensor networks (WSN) are

constrained by energy consumption• Goal: Average power consumption <100 µW

enables energy scavenging methods

• Our architectural approach:• Holistic approach

• Event-driven architecture

• Modular hardware accelerators

• Fine-grain power management

• In the implementation phase

3

Outline• What are sensor networks?

• Project motivation and design constraints

• Event-driven architecture

• Performance and power estimates

• Conclusion and future work

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Sample Application Space• Monitoring Apps

• Structural/Earthquake/Weather/Habitat monitoring

• Building/Border/Battlefield detection

• Road/traffic monitoring

• Medical Apps• Long-term health monitoring

• Untethered Pulseox Sensors

• Business Applications• Supply Chain Management

• Expired/Damaged Goods Tracking

• Automatic Checkout Systems

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Example App: Great Duck Island• Great Duck Island (GDI), Maine - (UC Berkeley)

• Gather temp, humidity, IR readings from Leach's Storm Petrel burrows and weather station motes

• Determine occupancy of nests to understand migration patterns• Total of 150 nodes deployed in 2003, over 650,000 observations

taken• Performance Requirements are Low

• Samples taken and transmitted once every 5 min• Power consumption limited lifetime of deployment

R. Szewczyk et al. An Analysis of a Large Scale Habitat Monitoring Application. ACM Conference on Embedded Networked Sensor Systems (SenSys), 2004.

Single Hop Network

Multi-Hop Network

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Example Sensor Network Node

Small Form Factor

Battery Operated

Wireless Communicationand Adhoc Networking

Interface to Various Sensors

Programmable CPU

Low PowerLow ThroughputTinyOS for Event Driven

Mica2 Mote – Designed by UC Berkeley, Manufactured by Crossbow

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Energy is the primary limitation

CPU Mode Current @3V Radio Mode Current @3V

Active 8.0 mA Receive 7.0 mA

Idle 3.2 mA Transmit Min Power 3.7 mA

Standby 216 µA Transmit Max Power 21.5 mA

Power-save 110 µA Sensor Board 0.7 mA

• Mica2 Power Consumption Measured by component

• Not the complete picture, how is power consumed in an application?

V. Shnayder, M. Hempstead, B. Chen, G. Werner-Allen, M. Welsh. Simulating the Power Consumption of Large-Scale Sensor Network Applications. (SenSys'04).

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Application-level Power Analysis

CPU35%

Radio59%

SensorBoard6%

Total energy consumption per component of “Surge”, a multi-hop routing application, run for 60 sec on the Mica2 mote.

Can be decreased at application and protocol levels however this requires more CPU computation

Due to General Purpose architecture of CPU

Requires software overhead to run TinyOS

Design Goal: Average Power consumption of < 100 µW to enable energy scavenging methods. Where should design energy be focused to decrease energy consumption?

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Regular Application Behavior

TimerInterrupt

Collect SensorData

PrepareMessage

Send RadioMessage

Sense and Transmit

MessageArrives

DecodeMessage

Search RoutingTable

Resend RadioMessage

Receive and ForwardAbstract View Example - GDI

Every 5 min

Burrow Occupancy - infrared - humidity

- Pack data in packet- Calculate checksum

- wait for acknowledgement

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Key goals of our architecture

Energy Efficiency

Fle

xibi

lity/

Pro

gram

mab

ility

OUR SYSTEM

General PurposeCPU Remove

Software Overhead

ASIC

Retain Programmability

• Event-driven computation

• Hardware accelerators for power-efficiency

• Exploit regular operations

• Optimize for sensor net workloads

• Modular design

• Fine-grain power management

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Abstract view of architecture

General PurposeMicrocontroller

RadioTransceiver

Sensors

EventProcessor

SlaveBlocks

SharedMemory

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Detailed view of architecture

• Regular events mapped solely to EP and slaves

• Micro Controller included for irregular events

• Slaves provide application specific HW

• All resource usage is explicit

MicroController

Event Processor

Sys

tem

Bus

Interrupt

Power Ctrl

Addr/Data

SRAM

Sensors

Radio

Message Processor

Data Filter

Timer

Addr/Data

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Event Processor• Interrupts invoke EP interrupt service routines

• 8 instructions• 4 power control/control transfer

• 4 read/write/transfer data to devices

READYInterrupt to

processLOOKUP FETCH

Lookup is complete

EXECUTE

ISR Complete

Fetch Complete

Fetch Next Instruction

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App. Example: Sense + Transmit

TimerInterrupt

Collect SensorData

PrepareMessage

Send RadioMessage

System Initialization/Reprogram

Configuration written to memory and timer

MicroController

Event Processor

Sys

tem

Bus

Interrupt

Power Ctrl

SRAM

Sensors

Radio

Message Processor

Data Filter

Timer

Addr/Data

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Example: Sense + Transmit (2)Timer

Interrupt

Collect SensorData

PrepareMessage

Send RadioMessage

Pseudo Code<timer intaddr>:SWITCHON <sensor>SWITCHON <message proc>TRANSFER <reading size> <sensor addr><message proc addr>SWITCHOFF <sensor>WRITEI <ctrl_wrd> <message proc>TERMINATE;

MicroController

Event Processor

Sys

tem

Bus

Interrupt

Power Ctrl

Addr/Data

SRAM

Sensors

Radio

Message Processor

Data Filter

Timer

Addr/Data

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Example: Sense + Transmit (3)

Pseudo Code<message proc mesg. ready intaddr>:SWITCHON <radio>TRANSFER <mesg size> <message proc> <radio>SWITCHOFF <message proc>WRITEI <ctrl_wrd> <radio>TERMINATE;

TimerInterrupt

Collect SensorData

PrepareMessage

Send RadioMessage

MicroController

Event Processor

Sys

tem

Bus

Interrupt

Power Ctrl

SRAM

Sensors

Radio

Message Processor

Data Filter

Timer

Addr/Data

Addr/Data

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Example: Sense + Transmit (4)

Pseudo Code<radio, message sent intaddr>SWITCHOFF <radio>TERMINATE;

TimerInterrupt

Collect SensorData

PrepareMessage

Send RadioMessage

MicroController

Event Processor

Sys

tem

Bus

Interrupt

Power Ctrl

SRAM

Sensors

Radio

Message Processor

Data Filter

Timer

Addr/Data

Addr/Data

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Example: Sense + Transmit (5)

System Idle

TimerInterrupt

Collect SensorData

PrepareMessage

Send RadioMessage

MicroController

Event Processor

Sys

tem

Bus

Interrupt

Power Ctrl

SRAM

Sensors

Radio

Message Processor

Data Filter

Timer

Addr/Data

Addr/Data

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Implementation• Process technology study (see paper)

• Does Moore’s Law help us?• Leakage power increasing concern• Tradeoff active power and leakage power

• Architectural enables low power circuit techniques

• Fine-grain power management – VDD gating

• Simple Circuit Implementation• Synchronous design• VDD roughly 2VT

• Performance Target: 100 kHz • Possible to use less common circuit design

styles (subthreshold, asynchronous)

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Initial Results• Developed performance model for system

architecture in SystemC (~8K lines of code)• GP microcontroller, event processor, slave

blocks, radio

• Power Model• VHDL for Event Processor + Key Blocks

• Custom design (SRAM, CAM)

• 0.25 µm Process Technology

• Workload Analysis and early comparison to other architectures included in the paper

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Performance Comparison

0

200

400

600

800

1000

1200

1400

1600

Cycles

Total sendpath without

filter

Total sendpath with

filter

Receive andprocess a

regularmessage

Timerchange

Thresholdchange

Mica-2

ED Arch

Roughly 10x cycle-reduction justifies 100KHz clock speed

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Power estimates

0.0001

0.001

0.01

0.1

1

10

100

1000

10000

100000

uW

EventProcessor

Timer MessageProcessor

Memory ThresholdFilter

System

ED Active

ED Idle

Mica2 Active

Mica2 Idle

Unknown blocks: GP microcontroller, busses, off-chip interfaces

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Conclusion/Future work• Wireless Sensor Networks provide unique

opportunities for low power, low throughput design

• Architecture meets design goals• Less than 100 µW average power consumption

• Event Processor provides event handling in HW

• HW slaves provide application specific processing for regular tasks

• Fits sensor network application characteristics

• Implementation phase of first chip• Stay Tuned!