an inrush mitigation technique of load

Upload: kiran-sunny

Post on 04-Apr-2018

228 views

Category:

Documents


0 download

TRANSCRIPT

  • 7/29/2019 an Inrush Mitigation Technique of Load

    1/7

    3371

    An Inrush Mitigation Technique of Load

    Transformers for the Series Voltage Sag

    CompensatorPo-Tai Cheng Chang-Yi Lin Yu-Hsing Chen Jhao-Ming Chen

    CENTER FOR ADVANCED POWER TECHNOLOGIES

    Department of Electrical Engineering, National Tsing Hua University

    Hsinchu, TAIWAN

    AbstractSurvey results suggest that 92% of interruption

    at industrial facilities is voltage sag related. The voltage

    sag compensator, based on a transformer-coupled series-

    connected voltage source inverter, is among the most cost-effective solution against voltage sags. Transformers are

    often installed in front of critical loads for electrical

    isolation purposes. When voltage sags happen, the

    transformers are exposed to the disfigured voltages and a

    DC offset will occur in its flux linkage. When the

    compensator restores the load voltage, the flux linkage

    will be driven to the level of magnetic saturation and

    severe inrush current occurs. The compensator is likely to

    be interrupted because of its own over-current protection,

    and eventually the compensation fails, and the critical

    loads are interrupted by the voltage sag. This paper

    proposes an inrush current mitigation technique together

    with a state feedback controller for the voltage sag

    compensator. The operation principles of the proposed

    method are specifically presented, and experiments are

    provided validate the proposed approach.

    I. INTRODUCTION

    Power quality issues have received much attentionin recent years. In many countries, high-techmanufacturers concentrate in industry parks. Therefore,

    any power quality events in the utility grid can affect alarge number of manufacturers. Records show thatvoltage sag, transients and momentary interruptionconstitute 92% of the power quality problems [1]. Thevoltage sag means that the root mean square value of

    fundamental voltage temporarily reduces to 0.1~0.9 perunit and maintains 0.5 to 30 cycle [2], [3]. Voltage sagsoften interrupt critical loads and results in substantialproductivity losses. Voltage sag compensators have

    been one of the most cost-effective voltage sag ride-through solutions. Several closed-loop controltechniques have been proposed for voltage source

    inverter-based sag compensators [4-6]. In this paper,the inrush issue of load transformers under theoperation of the sag compensator is presented. Aninrush mitigation technique is proposed andimplemented in a synchronous reference frame sag

    compensator controller. The proposed technique can be

    integrated with the conventional closed-loop control onload voltages. The new integrated control can

    successfully reduce inrush current of load transformers,

    and improve the disturbance rejection capability andthe robustness of the sag compensator system.

    Laboratory test results are presented to validate the

    proposed technique.As shown in Fig. 1, the voltage sag compensator

    consists of a three phase voltage source inverter (VSI)and a coupling transformer for serial connection [7-9].When the grid is normal, the compensator is bypassed

    by the thyristors for high operating efficiency. Whenvoltage sags occur, the voltage sag compensator injectsthe required compensation voltage through the

    coupling transformer to protect sensitive loads frombeing interrupted by sags. However, certain detectiontime (typically within 4ms) is required by the sag

    compensator controller to identify the sag event [10].And the load transformer is exposed to the deformed

    voltage from the sag occurrence to the moment whenthe compensator restores the load voltage. Albeit itsshort duration, the deformed voltage causes magneticflux linkage deviation inside the load transformer, and

    magnetic saturation may easily occur when thecompensator restores the load voltage, thus results in

    inrush current. The inrush current could trigger theover-current protection of the compensator and lead tocompensation failure. Thus this paper proposes inrushmitigation technique by correcting the flux linkage

    offsets of the load transformer. And this technique canbe seamlessly integrated with the state feedbackcontroller of the compensator.

    Fig. 1.A simplified one-line diagram of the off-line series voltagesag compensator.

    978-1-4244-1668-4/08/$25.00 2008 IEEE

  • 7/29/2019 an Inrush Mitigation Technique of Load

    2/7

    3372

    II. SYSTEM CONFIGURATION OF THE PROPORSEDCOMPENSATOR

    The series compensator is consisted by a three-phasevoltage source inverter as shown in Fig. 1. The leakage

    inductor of coupling transformerLf and capacitorCf isrecognized as the low-pass filter to suppress PWM

    ripples of the inverter output voltage vm. Figure 2illustrates the equivalent circuit of series voltage sagcompensator and its dynamic equation can be

    expressed as (1) and (2).

    Fig. 2. Per-phase equivalent circuit of the series voltage sag

    compensator

    =

    cc

    cb

    ca

    mc

    mb

    ma

    mc

    mb

    ma

    f

    v

    v

    v

    v

    v

    v

    i

    i

    i

    dt

    dL (1)

    =

    Lc

    Lb

    La

    mc

    mb

    ma

    cc

    cb

    ca

    f

    i

    i

    i

    i

    i

    i

    v

    v

    v

    dt

    dC (2)

    where [vma vmb vmc]T

    is the inverter output voltage, [imaimb imc]

    Tis the filter inductor current, [vca vcb vcc]

    Tis the

    compensation voltage, and [iLa iLb iLc]T

    is the loadcurrent. Equation (1) and (2) are transferred into thesynchronous reference frame as (3) and (4).

    +

    =

    e

    cd

    e

    cq

    fe

    md

    e

    mq

    fe

    md

    e

    mq

    e

    md

    e

    mq

    v

    v

    Lv

    v

    Li

    i

    i

    i

    dt

    d 11

    0

    0(3)

    +

    =

    e

    Ld

    e

    Lq

    fe

    md

    e

    mq

    fe

    cd

    e

    cq

    e

    cd

    e

    cq

    i

    i

    Ci

    i

    Cv

    v

    v

    v

    dt

    d 11

    0

    0(4)

    Where superscript e indicates the synchronous

    reference frame representation of this variable and isthe angular frequency of the utility grid. Equation (3)

    and (4) show the cross-coupling terms betweencompensation voltage and filter inductor current.

    III. THE PROPOSED CONTROL METHOD

    Figure 3 shows the block diagram of the proposedcontrol method. Note that the d-axis controller is not

    shown for simplicity. The block diagram consists ofthe full state feedback controller [11] and the proposedinrush current mitigation tech. Detailed explanations

    are given in the following sections.

    +

    ecqv

    e

    mqi

    +

    +

    +

    +

    +

    e

    cdfvC

    +

    +

    ++

    eLqi

    +

    +

    e

    mdfiL

    +

    *^

    e

    cdf vC

    fC

    ff CL

    +

    *e

    cqv

    *ecqv

    *ecqv

    ++

    +

    +

    e

    Lqi

    *e

    cq

    v

    e

    sqv

    +

    *e

    Lq

    *emqv

    e

    cqv

    e

    cdf vC^

    e

    mdf iL^

    *

    2e

    cdv

    +

    e*

    cqv

    s

    KK

    I

    p

    +

    e

    Lqv

    eLqv

    ++

    *e

    qv

    e

    Lq

    e

    Lq

    e

    Ld

    e

    Ldff CLs ^^

    2

    Fig. 3. Block diagram of the proposed inrush current mitigation technique with the sate feedback control.

  • 7/29/2019 an Inrush Mitigation Technique of Load

    3/7

    3373

    A. The full state feedback schemeThe state feedback scheme includes feedback control,

    feedforward control and decoupling control.

    1)Feedback controlThe feedback control is utilized to improve the

    preciseness of compensation voltage, the disturbancerejection capability and the robustness against parameter

    variations. As in Fig. 3, the capacitor voltage vecq is the

    voltage control in the outer loop and the inductor currentiemq is the inner current control. The voltage control is

    implemented by a proportional regulator with voltagecommand v

    e*cq respectively produced by the voltage sag

    scheme.

    2)Feedforward controlTo improve the dynamic response of the voltage sag

    compensator, the feedforward control is added to thevoltage control loop to compensate the load voltage

    immediately when voltage sag occurs. The feedforward

    voltage command is can be calculation by combining thecompensation voltage and the voltage drop across the

    filter inductor which is produced by the filter capacitorcurrent.

    3)Decoupling controlSince cross coupling terms derived from the

    synchronous reference frame transformation and theexternal disturbances exists in the physical model ofvoltage sag compensator, the control block utilizes the

    decoupling control to improve the accuracy and thedisturbance rejection ability. Figure 3 shows thedecoupling terms is produced by measuring the load

    current, filter capacitor voltage and the filter inductor

    current. The cross coupling terms in physical model canbe eliminated completely.

    B. Inrush Current Mitigation Technique1)Flux linkage DC offset

    The flux linkage is estimated by the measured line

    voltage. Figure 4 shows a single winding of thedelta/wye three-phase load transformer which is installed

    in downstream of voltage sag compensator. The fluxlinkage of the phase a-b winding is expressed as

    dttvt LabLab = )()( (5)

    Fig. 4. Connection diagram of the proposed system and delta/wye load

    transformer.

    0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04-1.5

    -1

    -0.5

    0

    0.5

    1

    0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

    -1

    -0.5

    0

    0.5

    1

    t[sec]

    VLab(p.u.)

    Lab(p.u.)

    Fig. 5. Transformer voltage and corresponding transient flux linkage.

    Figure 5 illustrates the line-to-line voltage across the

    transformer winding and the resulting flux linkage fromthe sag occurrence to completion of voltage

    compensation. When voltage sags occurs (t=tsag), thecontroller detects the sagged voltage and injects therequired compensation voltage at t=tdetect. The flux

    linkage during the voltage compensation process can beexpress as following:

    ++= =ect

    sag ectsag

    t

    t

    t

    t

    *

    LabLabttLabLabdt(t)v(t)dtv(t)(t)

    det

    det

    (6)

    This equation can be re-written as

    ( )

    ++

    ==

    t

    Lab

    t

    tLabLab

    t

    LabttLabLab

    (t)dtvdt(t)v(t)v

    (t)dtv(t)(t)

    ect

    sag

    sag

    sag

    0

    **

    0

    *

    det

    (7)

    Assume the pre-fault load voltage is

    )sin()( *** LabLabLab tVtv +=

    Where*

    LabV is the magnitude of load voltage, is the

    grid frequency, and

    *

    Lab is the phase angle. Thus, afterthe voltage compensation is completed, the flux linkagecan be expressed as

    )2

    sin(

    )()( **

    det

    ++=

    = LabLab

    ttLabLabt

    Vtt

    ect

    (8)

    Where

    ( ) +

    ====

    ect

    sag

    sagsagect

    t

    tLabLab

    ttLabttLabttLab

    dttvtv

    tt

    det

    det

    )()(

    )()(

    *

    *

    (9)

    ectsag tttfor det

  • 7/29/2019 an Inrush Mitigation Technique of Load

    4/7

    3374

    Equation (9) states that the sagged voltages cause the

    flux linkage DC offset Lab on the transformer windings,and its magnitude is dependent on the depth and theduration of sags. Severe voltage sag event can drive theDC offset exceeding the magnetic saturation knee and

    causes high inrush current. In practical saturation, the

    magnetic saturation knee is usually put on 1.10-1.15 p.u.of state-study flux linkage.

    2)Design the flux linkage estimatorFigure 6 depicts the model of a single transformer

    under no load, where R1 is the equivalent resistor of

    copper loss, Ll1 is the equivalent leakage inductance, Rcis the equivalent resistor of core losses, and Lm is themagnetic inductance..

    Fig. 6. Equivalent per phase circuit model of the transformer

    This dynamics of the transformer equivalent circuit inFig. 6 can be expressed as

    +

    =

    Lc

    Lb

    La

    Lc

    Lb

    La

    m

    Lc

    Lb

    La

    i

    i

    i

    R

    i

    i

    i

    dt

    dL

    v

    v

    v

    1 (10)

    Note that the leakage inductances and the core losses are

    neglected for simplifications.This equation can be re-written as

    +

    =

    Lc

    Lb

    La

    m

    Lc

    Lb

    La

    Lc

    Lb

    La

    L

    R

    dt

    d

    v

    v

    v

    1

    (11)

    Where [LaLbLc]T=Lm[iLa iLb iLc]

    T

    The dynamics of the transformer flux linkages can betransformed into the synchronous reference frame as

    +

    =

    dt

    v

    ve

    Ld

    Lq

    e

    Ld

    Lq

    e

    Ld

    Lq

    e

    Ld

    Lq

    0

    0(12)

    where the damping ratio, =R1/Lm, decides the transientof the flux linkage. Figure 7 shows the flux linkageestimator under the synchronous reference frame derivedfrom the equation (12).

    )(

    1

    +s

    )(

    1

    +s

    veLq

    veLd

    eLq

    eLd

    Fig. 7. The flux linkage estimator under the synchronous reference

    frame.

    The flux linkage estimator, as shown in Fig. 7, isapplied the proposed inrush mitigation technique. Theproposed inrush mitigation method includes feedback

    control and feedforward control.

    In the feedback control loop, the flux linkage eLqisgenerated by integrating the load voltage v

    eLq. The

    deviation of the flux linkage can be calculated by thedifference between

    e*Lq and the flux linkage

    eLq. The

    error is regulated by a proportional-integral (PI) regulator.

    To speed up the dynamics response of the inrushcurrent mitigation, the error between the estimated fluxlinkage DC offset and the flux linkage command

    (eLq.=

    e*Lq-

    eLq) is utilized as a feedforward control

    term. The command is multiplied by a proportional gain

    Kpt (=1/T) to accelerate the DC offset compensationduring the compensator start transient. The control gain

    Kpt is selected according to the tolerant of inrush currentand the time requirement of flux linkage DC offsetcompensation.

    The summation ve*q of feedback and feedforwardcommand is added to the sag compensation voltagecommand v

    e*mq to establish the overall command voltage

    of the voltage sag compensator. Thus, the proposedcontrol method leads the voltage sag compensator toperform an excellent load voltage tracking and preventthe inrush current occurs on the load-side transformer.

    IV. LABORATORY TEST RESULTS

    A prototype voltage sag compensator with inrush

    current mitigation technique is implemented inlaboratory. The one-line diagram is as given in Fig. 1.

    The system parameters of testbench and controller aregiven as follows:

    Source: 220V, 60Hz; Loads: non-linear load (R=140,L=2.0mH,

    C=3300uF);

    Voltage sag compensator: a conventional three-phase inverter switching at 10kHz, the leakageinductance of the coupling transformerLf=0.32mH, and filter capacitorCf=4.0F.

    Load transformer: 3kVA, 220V/220V (Delta/Wyeconnection)

  • 7/29/2019 an Inrush Mitigation Technique of Load

    5/7

    3375

    TABLE I

    The parameters of the control gains

    Kpv Kpi Kpt Kp KI

    0.2 3.2 167 304 200

    Figure 9 shows that asymmetrical fault is introduced

    in utility line, and the experimental results of voltage sagcompensator without the inrush current mitigation

    technique. The controller detects the voltage sag in4.0ms after the fault occurs, and injects the requiredcompensation voltage immediately to maintain loadvoltage in normal value as shown in Fig. 9(b). The

    transformer flux linkage DC offsets caused by thevoltage sag can be clearly observed in Fig. 9(c), whichresults in a significant inrush current of peak value 14Aas shown in Fig. 9(d). Figure 9(e) shows the transformerflux linkage under the synchronous reference frame

    (eLd). The voltage compensation process causes the flux

    linkage eLd oscillate and naturally decays to the normal

    state by core losses of the transformer and the powerconsumption of the load.

    Under the same asymmetrical fault, Fig. 10 showsthe experimental waveforms when the inrush currentmitigation technique is utilized in compensation process.

    Figure 10(a) and (b) illustrate proposed inrush currentmitigation technique can achieve fast voltagecompensation and without any flux linkage DC offset

    during the transient compared with Fig. 9(b) and (c).Therefore, the inrush current caused by the voltage sagcan be avoided completely compared to Fig. 9(d).Furthermore, Fig. 10(a) also shows that the inrush

    current mitigation technique generates an extra voltage tocorrect the trace of transient flux linkage when the

    compensation is initiated compared to Fig. 9(c). Themagnitude of the extra voltage is usually dependent on

    proportion gain KP. Figure 10(d) shows the trackingperformance of proposed inrush current mitigationtechnique. The P-I regulator proposed method can be

    recognized as a virtual damper. A large number of

    KP can accelerate the flux linkage eLd to track the flux

    linkage command e*

    Ld. However, it may cause a highcurrent in the start transient.

    (a) Source voltage vs (b) Load voltage vL-L (c)Flux linkage of the load transformerL-L

    (d) Load current iL (e)Flux linkage of d axis eLd

    Fig. 9. Experimental waveforms without the inrush current mitigation technique

  • 7/29/2019 an Inrush Mitigation Technique of Load

    6/7

    3376

    vLabvLbc vLca

    200V/div

    INV starts

    10ms

    4ms

    (a) Load voltage (b) Flux linkage of the load transformerL-L

    (c)Load current (d) Flux linkage of d axis eLoad,d

    Fig. 10. Experimental waveforms with the inrush current mitigation technique

    Figure 11 makes a comparison between the proportion gain

    KP and flux linkage tracking error (e*

    Ld -eLd). As the figure

    shows that the tracking error approaches steady state very

    quickly as a high Kpis selected as control gain. Moreover,the higher Kp can benefit the disturbance rejection capabilityin the range between fundamental frequency and middlefrequency. More details will be discussed in the next section.

    0.55

    Wb-T/div

    Non-compensation

    Kp =100

    Kp =300

    Kp =500

    10ms

    Fig. 11. The flux linkage tracking error between e*Ld and

    eLd under different

    control gain Kp

    V. THE DISTURBANCE REJECTION CAPABILITY

    The stationary referenced frame control design [12] causesa steady-state tracking error on the load voltage. Moreover,the control gain limitation constricts the compensator

    capability about disturbance rejection [6]. The synchronousreference frame implementation of the proposed statefeedback controller can effectively enhance the disturbance

    rejection capability compared to the stationary frame feedbackcontroller design [11]. The proposed inrush current mitigationtechnique utilizes a flux linkage closed-loop control, and thisfeature elevates even further the disturbance rejection

    characteristics of the sag compensator for the fundamentalfrequency load current.

    The disturbance rejection capability can be characterizedby the transfer function between the compensator output

    voltage and the load current. Equation (11) and (12) show thedisturbance rejection capability of the compensator under theconventional voltage-current state feedback controller and the

    proposed inrush current mitigation technique integrated withstate feedback controller respectively.

    2

    231

    sL

    KK)sK(KsCKsCL

    (s)v

    (s)i

    f

    piIvpipvfpiff

    e

    eq

    e

    Lq ++++= (11)

    3

    2341

    sL

    KsK)sK(KsCKsCL

    (s)v

    (s)i

    f

    Ippipvfpiff

    e

    eq

    e

    Lq +++++= (12)

    Note that three assumptions are made for simplicity, namely 1)cross-coupling terms in physical model has been decoupledby the controllers, 2) and the utility voltage is a voltage stiff, 3)

    the parameter of proportion gain is selected as Kp=KIvKpi.

    Figure 12 illustrates a Bode diagram of the both the transferfunctions. The figure shows that the system is very critical inshaping the Bode diagram of this disturbance rejectiontransfer function if the inrush current mitigation technique is

    integrated with controllers. This advantage benefits the powerquality of the compensator output voltage. Analysis of theexperimental results shows that the total harmonic distortion

    (THD) of load voltage without inrush current mitigation is5.49% and with inrush current mitigation is 5.16%. TheTABLE II summarizes the relationship between the error of

    fundamental component of load voltage and control gain KI.The rejection ratio of the fundamental frequency can be

    increased by selecting a high control gain KI.

  • 7/29/2019 an Inrush Mitigation Technique of Load

    7/7

    3377

    10-4

    10-3

    10-2

    10-1

    100

    101

    102

    103

    104

    105

    106

    -50

    0

    50

    100

    150

    200

    250

    300

    350

    400

    450BodeDiagram

    Frequency (rad/sec)

    Without inrush mitigation

    With inrush mitigation

    Fig. 12. Comparison between conventional voltage-current state feedback

    controller and the proposed inrush current mitigation technique integrated

    with state feedback controller in disturbance rejection capability.

    TABLE II

    KIgain Error of fundamentalcomponent of load voltage

    Without inrushcompensation

    2.53%

    KI=100 1.18%KI=300 0.91%KI=1000 0.88%

    VI. CONCLUSION

    This paper proposes an inrush current mitigation techniqueincorporating with the full sate feedback controller to preventthe inrush current during the voltage compensation process.The controller includes a voltage control, a current control

    and a flux linkage control. The proposed control method isbased on the synchronous reference frame which enablesvoltage sag compensator to achieve fast voltage injection and

    prevent the inrush current. When voltage sag occurs, thecontroller can track the transient flux linkage and calculate arequired compensation voltage in real-time for fast

    compensation and elimination of flux linkage DC offsetcaused by voltage sags. The effectiveness of the proposed theflux linkage compensation mechanism is validated bylaboratory test results. The disturbance rejectioncharacteristics of the proposed method are also examined inthe frequency domain for better understanding of the control

    gains selection and its effect. It shows that the proposed

    control method provides a high disturbance rejectioncapability for voltage sag compensator compared with

    conventional voltage-current state feedback control method.The proposed method can be easily integrated with theexisting voltage sag compensation control system without

    using any extra sensors.

    REFERENCES

    [1] D. Sabin, An assessment of distribution system power quality, Elect.

    Power Res. Inst., Palo Alto, CA, EPRI Final Rep. TR-106249-V2, vol. 2,

    Statistical Summary Report, May 1996.

    [2] C. J. Huang, S. J. Huang, F. S. Pai, Design of dynamic voltage restorer

    with disturbance-filtering enhancement, IEEE Transactions on Power

    Electronics, vol.18, pp.1202-1210, Sept. 2003.

    [3] P. K. Lim, D.S. Dorr, Understanding and resolving voltage sag related

    problems for sensitive industrial customers, IEEE Power Engineering

    Society Winter Meeting, vol.4, pp.2886-2890, 2000.

    [4] J. G. Nielsen, M. Newman, H. Nielsen, and F. Blaabjerg, Control and

    testing of a dynamic voltage restorer (DVR) at medium voltage level,

    IEEE Trans. Power Electron., vol. 19, no. 3, pp. 806813, May 2004.

    [5] M. Vilathgamuwa, A.A.D. Ranjith Perera, S.S. Choi, Performance

    improvement of the dynamic voltage restorer with closed-loop load

    voltage and current-mode control, IEEE Trans. Power Electron., Vol.

    17, on 5, pp. 824 834, September 2002.

    [6] M. J. Ryan, W. E. Brumsickle, and R. D. Lorenz, "Control topology

    options for single-phase UPS inverters," Industry Applications, IEEE

    Transactions on, vol. 33, pp. 493-501, 1997.

    [7] W. E. Brumsickle, R. S. Schneider, G. A. Luckjiff, D. M. Divan, M. F.

    McGranaghan, Dynamic sag correctors: cost-effective industrial power

    line conditioning, IEEE Transactions on Industry Applications, vol.37,

    pp. 212-217, Jan.-Feb. 2001.[8] D. M. Vilathgamuwa, A. A. D. R. Perera, S. S. Choi, Voltage sag

    compensation with energy optimized dynamic voltage restorer, IEEE

    Transactions on Power Delivery, vol.18, pp.928-936, July 2003.

    [9] Chi-Jen Huang, Shyh-Jier Huang, Fu-Sheng Pai, Design of dynamic

    voltage restorer with disturbance-filtering enhancement, IEEE

    Transactions on Power Electronics, vol.18, pp.1202-1210, Sept. 2003.

    [10] P.T. Cheng; C. -C. Huang; C. C. Pan; S. Bhattacharya, Design and

    implementation of a series voltage sag compensator under practical

    utility conditions, IEEE Trans. Ind. Applicat., Vol. 39, pp. 844-

    853, May-June 2003.

    [11] P. T. Cheng, C. L. Ni, J. M. Chen, Design of a state feedback controller

    for series voltage sag compensators, Power Conversion Conference, pp.

    398-403, April 2007.

    [12] L. Yun Wei, F. Blaabjerg, D. M. Vilathgamuwa, and A. P. C. L. Poh

    Chiang Loh, "Design and Comparison of High Performance Stationary-

    Frame Controllers for DVR Implementation," Power Electronics, IEEE

    Transactions on, vol. 22, pp. 602-612, 2007.