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DIGITAL LOGIC DESIGN(CE_403)

CHAPTER 2:

Storage Components(part_1)

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SVTH: Trương Văn TuấnGVHD: Hà Lê Hoài Trung

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Storage components

Storage components store data and perform some simple operation.

Storage components include:• Registers.• Counters.• Register files.• Queues.• Stack.

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Registers.•Registers are bit wise extensions of Flip-

Flops.•Registers store one data word.

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Registers.•Cho giản đồ xung sau, vẽ giản đồ xung

output của FF-D

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Registers with asynchronous•Asynchronous setting and resetting is

independent of clock signal.•Synchronous inputs are used to initialize

register.

set and reset

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Registers with parallel load•Parallel load register can hold data

indefinitely.•It can also load new data when load signal

is 1.

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Bài tập thanh ghi – Thanh ghi dịchThiết kế 1 thanh ghi 4 bit có 2 tín hiệu

nạp dùng để điều khiển việc nạp dữ liệu từ 2 nguồn khác nhau.

Thiết kế thanh ghi 16 bit có khả năng làm 2 chức năng sau:Nạp dữ liệu mớiHoán đổi byte trọng số thấp và byte trọng

số cao(8 bit thấp lên 8 bit cao)

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registers (shift – right)•Serial-in, parallel-out register converts

serial data stream.

Serial-in, parallel-out

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Shift registers with parallel load

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4-bit binary counter•Counters increment (decrement) their

content when enabled.

114-bit up/down binary counter

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4-bit up/down counter• This counter is sometimes called pre-settable

counter.

with parallel load

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Bài tập bộ đếmThiết kế mạch đếm nhị phân chỉ đếm lên:

Số chẵn: 0,2,4,6,8,0,…Số lẻ 1,3,5,7,1,…

Thiết kế các cổng luận lý sao cho mạch đếm đếm đến các giá trị sao:71415

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BCD counters•Up sequence: 0,1,2,3,4,5,6,7,8,9,0,…•Down sequence: 0,9,8,7,6,5,4,3,2,1,0,9,…

• Up counter loads ‘0’ when counter content is 9(1001).• Up/Down counter loads ‘0’ when counter content is 9(1001) and direction bit D=0.• Up/Down counter loads ‘9’ when counter content is 0(0000) and direction bit D=1.

15Asynchronous countersEach FF in Synchronous counters changes its

output at the same time.

Each FF in Asynchronous counters change values at different times.

Advantage of asynchronous counters is simple and low cost (less gates).

Weakness of asynchronous counters is longer delays in comparison with synchronous counters

164-bit asynchronous up counter

174-bit asynchronous up counter

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Propagation Delay in Ripple CountersRipple counters are simple-requiring the fewest

components to produce a given operationCumulative propagation delay can cause problems at

high frequencies.

The counter will perform accurately when the period of clock cycle must be longer than the total propagation delay of it.

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Propagation Delay in Ripple Counters

208-bit mixed-mode up counter

Mixed-mode counter consists of:(1) asynchronous counters connected synchronous

slices.

218-bit mixed-mode up counter

Mixed-mode counter consists of:(2) Synchronous counters connected asynchronous

slices.

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Register-fileRegister-file is used as fast temporary

storage

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Register-file withThis register-file is used for reading two operands

and writing one result in each clock cycle.

1 write port and 2 read ports

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Random Access Memory (RAM)

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RAM organizationRam memory cells can be static or dynamic.Static RAM’s do not lose data with time.Dynamic RAM’s must be refreshed.

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RAM timing

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16Kx32 RAM design with 16Kx8 RAM’s(to obtain wider bit widths)

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64Kx8 RAM design with 16Kx8 RAM’s(to obtain a larger memory)

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Bài tập thiết kế bộ nhớThiết kế bộ nhớ:

256Kx8RAM từ các RAM 256K x 1 RAM256Kx8RAM từ các RAM 64Kx 8 RAM