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MicroStar BGA PackagingReference Guide
Printed on Recycled PaperPrinted on Recycled Paper
Literature Number: SSYZ015BThird Edition – September 2000
MicroStar BGA is a trademark of Texas Instruments Incorporated.
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgment, including thosepertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
iiiMicroStar BGA Packaging Reference Guide
Introduction
The parallel pursuit of cost reduction and miniaturizationin recent years has given rise to an increasing emphasison very small integrated circuit (IC) package solutions.This is particularly evident in consumer-based end
equipment using digital signal processor (DSP) solutionssuch as wireless telephones, laptop computers, andhard-disk drives. Despite the formal definition, packageswith an area similar in size to the IC they encapsulate areloosely referred to as chip scale packages (CSPs).Figure 1 illustrates this trend.
Figure 1. Packaging Trends
Pac
kage
siz
e
QFP0.5 mm pitch
BGA (ball grid array)1.27 mm ball pitch Fine pitch requirement
QFP0.4 mm pitch
Bare chip(flip chip)
• Infra. issue (KGD)
• Soldering difficulties
• PWB/ASSY cost up
CSP (chip scale pkg.) solution
Fine pitch BGA(0.5, 0.8, 1.0 mm ball pitch)
QFP-0.5
QFP-0.4
CSP
BGA
Bare chip (bump)
Pin count
Package trend (customer requirement)
Chip scale packages are in many ways an ideal solutionto the cost reduction and miniaturization requirements.They offer enormous area reductions in comparison toquad flat packages (QFPs) and have increasing potentialto do so without adding to system-level cost. In the bestcase, CSPs compete today on a cost-per-terminal basiswith QFPs. For example, various CSPs from TexasInstruments (TI) are now available at cost parity with thinQFPs.
Texas Instruments produces a polyimide film-basedfamily of CSPs called MicroStar BGA. Like most otherCSPs, MicroStar BGAs use solder alloy balls as theinterconnect between the package substrate and theboard on which the package is soldered. The MicroStarBGA family comes in a range of solder ball pitch (0.5 mm,0.8 mm, and 1.0 mm). Currently, TI’s most popularpackages are 64- and 144-ball packages. Figure 2shows the structure of TI’s MicroStar BGA package.
Figure 2. Structure of TI’s MicroStar BGA
Cu pattern(30 µm line/40 µm space)
Flex substrate(polyimide)
(Single electrical layer)
0.5 mm DIA./0.8 mm ball pitchSn/Pb: near eutectic
Via(0.375 mm DIA.)
Wire bond
Conforms to JEDEC Outlines: MO-192 and MO-205-AEncapsulant
Chip(11 mils)
0.8 mmpitch
PWB
Diepaste
MicroStar BGA is a trademarks of Texas Instruments.
ivMicroStar BGA Packaging Reference Guide
Texas Instruments addressed several key issues inpackage assembly in order to produce a CSP that is notonly physically and mechanically stable butcost-effective for a wide variety of applications. Figure 3demonstrates how MicroStar BGAs resolve reliabilityand cost issues. An overall view of the flow used toproduce TI MicroStar BGA packages is shown inFigure 4. The process for solder ball attachment isshown in Figure 5.
Figure 3. MicroStar BGA Package AssemblyIssues
Substrate – Ceramic
selection – Glass-epoxy
– Polyimide†
Interconnection – Bump (flip chip)
– Wire bond†
Solder ball form – Solder jet
– Stud bump
– Paste print
– Pick and place†
Encapsulation – Potting
– Transfer mold†
Transducer
Moltensolder
Orifice
Printing maskSolderpaste
Vacuum
Solder wire
Capillary
†These are the processes used by TI.
Figure 4. MicroStar BGA Package Assembly Flow
Same as QFP assembly
Die attach Wire bond Encap
Non-Ag paste Short loop X’fer mode
Ball attach IR reflow Flux wash
0.30 mm DIA. Ultrasonic clean
Laser symboland singulation Test
Tray
BGA unique process
Figure 5. Solder Ball Attachment
Solder ball attach Pick and place
Squeegee
Printing mask
Solderpaste
Vacuum
Substrate Solder ball
Ball pads (via) Solder paste print Solder ball attach(12 mil DIA.)
Solder ball shear tests
SS Fail Ave. Reading125 0 668 g125 0 734 g
144GGU, 0.8-mm pitch, 0.5 mm DIA. ball TI spec. is 400 g min
The MicroStar BGA package has been fully qualified innumerous applications and is being used extensively inmobile phones, laptops, modems, handheld devices,and office environment equipment. Your local TI fieldsales office can give you more information on usingreliable and cost-effective MicroStar BGA packaging in
your application.
This guide is designed to give you technical backgroundon MicroStar BGA packages as well as how they can beused to build advanced board layouts. Any additionalhelp desired with your specific design is also availablethrough your local TI field sales office.
vMicroStar BGA Packaging Reference Guide
Contents
1 PCB Design Considerations 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Solder Land Areas 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conductor Width/Spacing 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . High-Density Routing Techniques 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Via Density 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conventional PCB Design 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Advanced Design Methods 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Reliability 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Daisy-Chained Units 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reliability Data 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reliability Calculations 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Characteristics 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Modeling 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Modeling 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Surface-Mounting MicroStar BGA Packages 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . Design for Manufacturability (DFM) 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Solder Paste 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Solder Ball Collapse 3–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reflow 3–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inspection 3–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Packing and Shipping 4–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trays 4–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tape-and-Reel Packing Method 4–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tape Format 4–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Device Insertion 4–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Packaging Method 4–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Sockets 5–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Design Challenge 5–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contacting the Ball 5–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Establishing Contact Force 5–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Conclusions and Future Work 5–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Lead-Free Solutions 6–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Moisture Sensitivity 6–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Board Land Finishes and Solder Paste 6–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . Summary 6–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 References 7–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Appendix A Frequently Asked Questions A–1. . . . . . . . . . . . . . . . . . . . . . . . . . . Package Questions A–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Assembly Questions A–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Appendix B Package Data Sheets B–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80GJK (Pitch = 0.5 mm; Size = 6 x 6 mm) B–2. . . . . . . . . . . . . . . . . . . . . 167GJJ (Pitch = 0.5 mm; Size = 8 x 8 mm) B–3. . . . . . . . . . . . . . . . . . . . . 151GHZ (Pitch = 0.5 mm; Size = 10 x 10 mm) B–4. . . . . . . . . . . . . . . . . . . 100GGM (Pitch = 0.8 mm; Size = 10 x 10 mm) B–5. . . . . . . . . . . . . . . . . . . 64GGV (Pitch = 0.8 mm; Size = 8 x 8 mm) B–6. . . . . . . . . . . . . . . . . . . . . 80GGM (Pitch = 0.8 mm; Size = 10 x 10 mm) B–7. . . . . . . . . . . . . . . . . . . 100GGF (Pitch = 0.5 mm; Size = 10 x 10 mm) B–8. . . . . . . . . . . . . . . . . . . 100GGT (Pitch = 0.8 mm; Size = 11 x 11 mm) B–9. . . . . . . . . . . . . . . . . . . 144GGU (Pitch = 0.8 mm; Size = 12 x 12 mm) B–10. . . . . . . . . . . . . . . . . 179GHH (Pitch = 0.8 mm; Size = 12 x 12 mm) B–11. . . . . . . . . . . . . . . . . . 176GGW (Pitch = 0.8 mm; Size = 15 x 15 mm) B–12. . . . . . . . . . . . . . . . . 208GGW (Pitch = 0.8 mm; Size = 15 x 15 mm) B–13. . . . . . . . . . . . . . . . .
viMicroStar BGA Packaging Reference Guide
Contents (continued)240GGW (Pitch = 0.8 mm; Size = 15 x 15 mm) B–14. . . . . . . . . . . . . . . . . 196GHC (Pitch = 1.0 mm; Size = 15 x 15 mm) B–15. . . . . . . . . . . . . . . . . 257GHK (Pitch = 0.8 mm; Size = 16 x 16 mm) B–16. . . . . . . . . . . . . . . . . 257GJG (Pitch = 0.8 mm; Size = 16 x 16 mm) B–17. . . . . . . . . . . . . . . . .
viiMicroStar BGA Packaging Reference Guide
List of FiguresFigure Page
1 Packaging Trends iii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Structure of TI’s MicroStar BGA iii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 MicroStar BGA Package Assembly Issues iv. . . . . . . . . . . . . . . . . . . . . . . . . . .
4 MicroStar BGA Package Assembly Flow iv. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Solder Ball Attachment iv. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Package Via to Board Land Area Configuration 1–2. . . . . . . . . . . . . . . . . . . . .
7 Effects of Via-to-Land Ratios 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Optimum Land Configurations 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 PCB Design Considerations (Conventional) 1–3. . . . . . . . . . . . . . . . . . . . . . . .
10 Microvia Structure 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11 “Dog Bone Via” Structure 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12 Buried Vias 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13 Daisy-Chained Pinout List 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14 General Net List 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15 PCB Layout for Daisy-Chained Unit 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16 Daisy-Chain Test Configuration 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17 Board-Level Reliability Test Boards 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 Board-Level Reliability Test Data 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19 Thermal Modeling Process 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20 Electrical Modeling Process 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21 Solder Ball Collapse 3–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22 Ideal Reflow Profile 3–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23 Shipping Tray Detail 4–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24 Packing Method for Trays 4–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25 Single Sprocket Tape Dimensions 4–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26 Reel Dimensions 4–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
27 Tape-and-Reel Packing 4–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
28 Approaches for Contacting the Solder Ball 5–2. . . . . . . . . . . . . . . . . . . . . . . . .
29 Pinch Contact for Solder Balls 5–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30 Contact Area on Solder Ball 5–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31 Witness Marks on Solder Ball 5–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
32 Effect of Burn-in on Probe Marks 5–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
33 Assembly Testing of Eutectic vs. Pb-free Solder Balls 6–3. . . . . . . . . . . . . . .
34 Standard Reflow Profile for Pb/Sn Alloy Solder 6–3. . . . . . . . . . . . . . . . . . . . .
35 Proposed Reflow Profile for Non-Pb Alloy Solders 6–4. . . . . . . . . . . . . . . . . .
36 Typical SAM Pictures After Moisture Sensitivity Testing 6–5. . . . . . . . . . . . . .
37 Broad-Level Reliability Study(Solder Paste: Sn/Pb Eutectic) 6–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
viiiMicroStar BGA Packaging Reference Guide
List of Figures (continued)Figure Page
38 Broad-Level Reliability Study(Solder Paste: Pb-free-1) 6–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
39 Broad-Level Reliability Study(Solder Paste: Pb-free-2) 6–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
40 Key Push Test Apparatus 6–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
41 Typical Key Push Test Results 6–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42 Key Push Test Performance 6–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43 TI’s Strategic Package Line-Up B–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of TablesTable Page
1 Package-Level Reliability Tests 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Package-Level Reliability Test Results 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Board-Level Reliability Summary 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Summary of Significant BLR Improvements 2–5. . . . . . . . . . . . . . . . . . . . . . . .
5 Effects of Pad Size and Board Thickness on Fatigue Life 2–5. . . . . . . . . . . .
6 Number of Units per Shipping Tray 4–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Tape Dimensions 4–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Reel Dimensions 4–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 Component Relialibility Testing and BLR for Pb-free Solder Balls 6–2. . . . . .
10 Moisture Sensitivity test results 6–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11 Solder paste compositions 6–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–1MicroStar BGA Packaging Reference Guide
1PCB Design Considerations
PCB Design Considerations
1–2MicroStar BGA Packaging Reference Guide
Solder Land Areas
Design of both the MicroStar BGA itself and the printedcircuit board (PCB) are important in achieving goodmanufacturability and optimum reliability. In particular,the diameters of the package vias and the board landsare critical. While the actual sizes of these dimensionsare important, their ratio is more critical. Figure 6illustrates the package via-to-PCB configuration andFigure 7 illustrates why this ratio is critical.
Figure 6. Package Via to Board Land AreaConfiguration
MicroStar BGA package
Land on PCB Package ball via
PCB
A
B(Not to scale)
A = Via diameter on packageB = Land diameter on PCB
Ratio A/B should equal 1.0 for optimum reliability.
Figure 7. Effects of Via-to-Land Ratios
Package
PCB
Package
Package
PCB
PCB
In the top view of Figure 7, the package via is larger thanthe PCB via, and the solder ball is prone to crackprematurely at the PCB interface. In the middle view, thePCB via is larger than the package via, which leads tocracks at the package surface. In the bottom view, wherethe ratio is almost 1:1, the stresses are equalized andneither site is more susceptible to cracking than theother.
Solder lands on the PCB are generally simple roundpads. Solder lands are either solder-mask-defined ornon-solder-mask-defined.
Figure 8. Optimum Land Configurations
YX
Solder-Mask-Defined Land
µ
µ
µ
X Y
Non-Solder-Mask-Defined Land
µ
µ
µ
Solder-mask-defined (SMD) land. With this method, thecopper pad is made larger than the desired land area,and the opening size is defined by the opening in thesolder mask material. The advantages normallyassociated with this technique include more closelycontrolled size and better copper adhesion to thelaminate. Better size control is the result of photoimagingthe stencils for masks. The chief disadvantage of thismethod is that the larger copper spot can make routingmore difficult.
Non-solder-mask-defined (NSMD) land. Here, the landarea is etched inside the solder mask area. While thesize control is dependent on copper etching and is not asaccurate as the solder mask method, the overall patternregistration is dependent on the copper artwork, which isquite accurate. The tradeoff is between accurate dotplacement and accurate dot size.
See Figure 8 for an example of optimum land diametersand configurations for a common MicroStar BGA pitch.
Conductor Width/Spacing
Many of today’s circuit board layouts are based on atmost a 100-µm conductor line width and 200-µmspacing. To route between 0.8-mm-pitch balls, given aclearance of roughly 380 µm between ball lands, onlyone signal can be routed between ball pads. The 380-µmball spacing is worst case and is calculated by assumingthe diameter of the solder ball land is 410 µm.
Figure 9 presents some design considerations based oncommonly used PCB design rules. Conventionally, thepads are connected by wide copper traces to otherdevices or to plated through holes (PTH). As a rule, themounting pads must be isolated from the PTH. Placingthe PTH interstitially to the land pads often achieves this.
PCB Design Considerations
1–3MicroStar BGA Packaging Reference Guide
Figure 9. PCB Design Considerations (Conventional)
0.8 mmpitch
1.0 mmpitch
0.350 mmDIA. pad
0.12
5 m
m li
ne 0.50 mm DIA.solder mask
opening
0.254 mmDIA. hole
NSMD pads NSMD pads
0.400 mmDIA. pad
0.12
5 m
m li
ne 0.55 mm DIA.solder mask
opening
0.254 mmDIA. hole
0.375 mm DIA.solder mask
opening
SMD pads
0.480 mmDIA. pad 0.550 mm
DIA. pad
0.12
5 m
m li
ne
0.450 mm DIA.solder mask
opening
SMD pads
(Not to scale)
0.10
0 m
m li
ne
High-Density Routing TechniquesA challenge when designing with CSP packages is thatas available space contracts, the space available forsignal fanout also decreases. By using a fewhigh-density routing techniques, the PCB designer canminimize many of these design and manufacturingchallenges. This section focuses on TI designators GGU(144-pin) and GGW (176-pin) packages. Both packageshave 0.8-mm pitch, but each is distinctly different in arraystyle. The GGW ball array has wide channels in the fourcorners, providing the inner balls with space for routingand VCC connectivity. Mechanical drawings of theseMicroStar BGA packages can be found in Appendix B.The GGU package has a solid four-row arrayconfiguration which can cause difficulties when routinginner rows on two-layer boards.
Via DensityVia density, as mentioned earlier, can be a limiting factorwhen designing high-density boards. Via density isdefined as the number of vias in a particular board area.Using smaller vias increases the routability of the boardby requiring less board space and increasing via density.The invention of the microvia, shown in Figure 10, hassolved many of the problems associated with via density.
Figure 10. Microvia Structure
Microvias are often created using a laser to penetrate thefirst few layers of dielectric. The laser can penetrate a4-mil-thick dielectric layer, creating the 4-µm microviashown in Figure 10. The layout designer can now routeto the first internal board layer. Two layers (each 4 milsthick) can be laser-drilled, creating a 200-µm microviadiameter. In this case, routing to the first two internallayers is possible.
The number of board layers increases as board chipdensity and functional pin count increase. As anexample, the TMS320VC549GGU digital signalprocessor (DSP) is in a 144-GGU package and uses32 balls for power and ground. Routing of roughly
PCB Design Considerations
1–4MicroStar BGA Packaging Reference Guide
112 signals can be accomplished on three layers. Thepower and ground planes increase the board to fivelayers. The sixth layer can be used on the bottom side toplace discrete components. Furthermore, by increasingthe board layer stack-up to eight layers, high-densityapplications are possible with only 10 to 15 mils betweenthe chips.
Conventional PCB DesignThe relatively large via density on the package periphery,mentioned earlier, is caused by limited options whenrouting the signal from the ball. To reduce or eliminate thevia density problem on the periphery of the package,designers can build the PCB vertically from the BGA padthrough the internal layers of the board, as shown inFigure 11. By working vertically and mechanical drilling250-µm vias between the pads on the board and theinternal layers, designers can create a“pick-and-choose” method. They can pick the layer andchoose the route. A “dog bone” method is used toconnect the through-hole via and the pad.
This method requires a very small mechanical drill tocreate the necessary number of 144 or 176 vias for onepackage. Although this method is the least expensive, adisadvantage is that the vias go through the board,creating a matrix of vias on the bottom side of the board.
Figure 11. “Dog Bone Via” StructureCross-sectional view Top side view
Layer 1Layer 2Layer 3Layer 4Layer 5Layer 6
Advanced Design Methods
Another option is to use a combination of blind and buriedvias. Blind vias connect either the top or bottom side ofthe board to inner layers. Buried vias usually connectonly the inner layers. Figure 12 illustrates this methodusing 4-mil laser-drilled microvias in the center of thepads and burying the dog bone on layer 2.
Since the buried via does not extend through theunderside of the board, the designer can use another setof laser-drilled blind microvias, if needed, to connect thebypass capacitors and other discrete components to thebottom side.
More information on these advanced techniques isavailable by contacting your local TI field sales office.
Figure 12. Buried Vias
Solder wicks intoblind via filling void
Micro blind viasLayer 1Layer 2
Layer 3
Layer 4
Layer 5Layer 6
10-mil through-holeburied via
4-mil laser-drilled microvia may berequired to connect discretes onbottom side of board
2–1MicroStar BGA Packaging Reference Guide
2Reliability
Reliability
2–2MicroStar BGA Packaging Reference Guide
Daisy-Chained Units
Daisy-chained units are used to gain experience in thehandling and mounting of CSPs, for board-reliabilitytesting, to check PCB electrical layouts, and to confirmthe accuracy of the mounting equipment. To facilitatethis, Texas Instruments offers daisy-chained units in allproduction MicroStar BGA packages.
Each daisy-chained pinout differs slightly depending onpackage layout. An example is shown in Figure 13.Daisy-chained packages are wired to provide acontinuous path through the package for easy testing.TI issues a net list for each package, which correlateseach ball position with a corresponding wire pad number.The daisy-chained net list is a special case of the generalnet list shown in Figure 14. Package net lists anddaisy-chained net lists for all production packages areincluded in Appendix B.
A PCB layout for a 144-GGU daisy-chained package isshown in Figure 15. When a daisy-chained package isassembled on the PCB, a complete circuit is formed,which allows continuity testing. The circuit includes thesolder balls, the metal pattern on the die, the bond wires,and the PCB traces. The entire package or only aquadrant can be interconnected and tested. A diagramof the test configuration is shown in Figure 16.
Figure 13. Daisy-Chained Pinout List
100GGT Top View
Indexmark
1110
987654321
A B C D E F G H J K L
A1 – B2 L1 – K2 L11 – K10 A11 – B10B1 – C2 L2 – K3 K11 – J10 A10 – B9C1 – D2 L3 – K4 J11 – H10 A9 – B8D1 – E2 L4 – K5 G9 – G10 B7 – A7F3 – F2 J6 – K6 F9 – F10 C7 – C6E1 – F1 L5 – L6 G11 – F11 B6 – A6G1 – G2 L7 – L8 E11 – D11 B5 – A5G3 – H1 K7 – J7 E10 – E9 C5 – D4H2 – H3 K8 – J8 D10 – C11 A4 – B4H4 – J1 L9 – H8 D9 – D8 C4 – A3J2 – J3 K9 – J9 C10 – B11 B3 – C3K1 – J4 L10 – H9 C9 – C8 A2 – D3
NC – E3, J5, H11, A8
Reliability Data
Reliability is one of the first questions designers askabout any new packaging technology. They want to knowhow well the package will survive handling and assemblyoperation, and how long it will last on the board. Theelements of package reliability and system reliability,while related, focus on different material properties andcharacteristics and are tested by different methods.
Figure 14. General Net List
100GGT Top View
11
10
98
76
54
3
2
1
A B C D E F G H J K L
Indexmark
PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL#
1 – A1 26 – L1 51 – L11 76 – A112 – B2 27 – K2 52 – K10 77 – B103 – B1 28 – L2 53 – K11 78 – A104 – C2 29 – K3 54 – J10 79 – B95 – C1 30 – L3 55 – J11 80 – A96 – D2 31 – K4 56 – H10 81 – B87 – E3 32 – J5 57 – H11 82 – A88 – D1 33 – L4 58 – G9 83 – B79 – E2 34 – K5 59 – G10 84 – A710 – F3 35 – J6 60 – F9 85 – C711 – F2 36 – K6 61 – F10 86 – C612 – E1 37 – L5 62 – G11 87 – B613 – F1 38 – L6 63 – F11 88 – A614 – G1 39 – L7 64 – E11 89 – B515 – G2 40 – L8 65 – D11 90 – A516 – G3 41 – K7 66 – E10 91 – C517 – H1 42 – J7 67 – E9 92 – D418 – H2 43 – K8 68 – D10 93 – A419 – H3 44 – J8 69 – C11 94 – B420 – H4 45 – L9 70 – D9 95 – C421 – J1 46 – H8 71 – D8 96 – A322 – J2 47 – K9 72 – C10 97 – B323 – J3 48 – J9 73 – B11 98 – C324 – K1 49 – L10 74 – C9 99 – A225 – J4 50 – H9 75 – C8 100 – D3
Figure 15. PCB Layout for Daisy-Chained Unit
Reliability
2–3MicroStar BGA Packaging Reference Guide
Figure 16. Daisy-Chain Test Configuration
Wire bonds
Solderballs
PCB
Copper traces
MicroStar BGA
Test pads
Tester
Package reliability focuses on materials of construction,thermal flows, material adherence/delamination issues,resistance to high temperatures, moisture resistanceand ball/stitch bond reliability. Thorough engineering ofthe package is performed to prevent delaminationcaused by the interaction of the substrate material andthe mold compound.
TI subjects each MicroStar BGA to rigorous qualificationtesting before the package is released to production.These tests are summarized in Table 1. All samples usedin these tests are preconditioned according to JointElectronic Device Committee (JEDEC) A113 at variouslevels. Typical data is presented in Table 2. MicroStarBGA packages have proven robust and reliable.
Board-level reliability (BLR) issues generally focus onthe complex interaction of various materials under theinfluence of heat generated by the operation of electronicdevices. Not only is there a complex thermal situationcaused by multiple heat sources, but there are cyclicalstrains due to expansion mismatches, warping andtransient conditions, non-linear material properties, andsolder fatigue behavior influenced by geometry,metallurgy, stress relaxation phenomenon, and cycleconditions. In addition to material issues, board andpackage design can influence reliability. Thermalmanagement from a system level is critical for optimum
reliability, and thermal cycling tests are generally used topredict behavior and reliability. Many of these are usedin conjunction with solder fatigue life models using amodified Coffin-Manson strain range-fatigue life plots.
Table 1. Package-Level Reliability Tests †
Test Environments Conditions Read Points
HAST 85RH/85°C 600 hrs.
1000 hrs.
Autoclave 121°C, 15 psig 96 hrs.
240 hrs.
Temp. Cycle –55/125°C–65/150°C‡
500 cycles
750 cycles
1000 cycles
Thermal Shock –65/150°C‡–55/125°C
200 cycles
500 cycles
750 cycles
1000 cycles
HTOL 125°C, Op. voltage 500 hrs.
600 hrs.
1000 hrs.
HTOL‡ 140°C, Op. voltage 500 hrs.
HTOL‡ 155°C, Op. voltage 240 hrs.
Bake‡ 150°C
170°C
600 hrs.
1000 hrs.
420 hrs.
HAST‡ 130°C 96 hrs.
† All samples used in these tests are preconditioned according to JointElectronic Device Committee (JEDEC) A113 at various levels.
‡ Optional tests. One or more of them may be added to meet customerrequirements.
Table 2. Package-Level Reliability Test Results
Package Types
Leads 64 80 144 196
Body (mm) 8 x 8 10 x 10 12 x 12 15 x 15
Device MSP ASP DSP DSP
Die (mm) 5.3 x 5.8 7.5 x 7.5 9.3 x 9.5
Level 4 2 2a 4 3
Test Environment Failures/Sample Size
Autoclave (240 hrs.) 0/70 0/78 0/77 0/77 0/77
T/C, –55/125°C (1000 cycles) 0/116 0/78 0/77 0/77 0/76
T/S, –65/150°C (500 cycles)
(750 cycles)
(1000 cycles) 0/116
0/78
0/77
0/77 0/77
HAST,85°C/85%RH
(1000 hrs.)
(1250 hrs.) 0/115 0/77
0/78
150°C Storage (600 hrs.)
(1000 hrs.)
0/43
0/78
0/77 0/77 0/77
HTOL (1000 hrs.) 0/116
Reliability
2–4MicroStar BGA Packaging Reference Guide
In addition to device/package testing, board-levelreliability testing has been extensively performed on theMicroStar BGA packages. Various types ofdaisy-chained packages were assembled to specialboards shown in Figure 17. Electrical measurements
Figure 17. Board-Level Reliability Test Boards
TI-Houston test board
TI-HIJI test board
Board Material FR-4
Structure: Two externalmetal layersTraces: 1oz cu design rule100 µm (4 mils) width,100 µm (4 mils) spacePaste: Eutectic(SENJU 63-330F-21-10.5)Paste thickness: 0.15 µmBoard thickness: 31 mils
Reflow profile: 225°Cmax, time above 200°C is50 sec, time above 150°Cis 240 secScreen opening: matchland pad diameterPrecondition: Level 3
were made in the initial state and then at intervals aftertemperature cycles were run. The overall test conditionsare shown in Figure 18. A summary of a wide range ofboard-level reliability is shown in Table 3. This dataincludes testing by TI and by end manufacturers.
Table 4 summarizes conclusions from the testing. Twoimportant conclusions are that the PCB pad size needsto match the via size, and that solder paste is needed forattachment to give optimal reliability.
Reliability CalculationsAnother important aspect of predicting how a packagewill perform in any given application is reliabilitymodeling. Thermal, electrical, and thermomechanicalmodeling, verified by experimental results, provideinsight into system behavior, shorten package
Figure 18. Board-Level Reliability Test Data
5 minRamp time: 2 min–5 minDwell time: 11 min–13 min
Test condition: Open short @25°C, 10% resistancechange or 200 ΩSample size: Greater or equal to 32Temperature cycle range: –40°C to 125°CSampling rate: Every 100 cycles, up to first failure; every50 cycles thereafter up to 1000 cycles; every 100 cyclesbetween 1000 to 1500 cycles; every 250 cycles between1500 to 2500 cycles; Test stopping point min (2500 cycles,50% failures)
Table 3. Board-Level Reliability Summary
Failures/Sample Size
Conditions (With Solder Paste) Requirements Extended Range
TI Mfg Site Body Pitch Die Temp. 500 800 1000 1100 1200 1300 1500
Package Test Site (mm) (mm) (mm) Cycle ( °C) (Cycles) (Cycles)
GGU
144 balls
TI HIJI
TI HIJI
12 x 12 0.8 8.8 x 8.8 –40/125 0/85 0/85 0/85 4/85 5/77 5/72 15/39
GGU
144 balls
TI Philippines
TI HIJI
12 x 12 0.8 8.8 x 8.8 –40/125 0/36 0/36 0/36 0/36 0/36 0/36 1/35
GGF
100 balls
TI HIJI
TI HIJI
10 x 10 0.5 6.6 x 6.6 –25/125 0/32 0/32 0/32 0/32 0/32 0/16 6/16
GHC
196 balls
TI TIPI
TI Hou
15 x 15 1.0 8.8 x 8.8 –40/125 0/62 0/62 0/62 0/62 0/62 0/62 4/62
GGU
144 balls
TI Philippines
Customer A
12 x 12 0.8 8.8 x 8.8 –40/100 0/180 0/180 0/180 0/180 – – –
GGW
176 balls
TI HIJI
Customer B
15 x 15 0.8 6.6 x 6.6 –25/125 0/35 0/35 0/35 0/35 0/35 0/35 1/35
GGM
80 balls
TI HIJI
Customer C
10 x 10 0.8 5.0 x 5.0 –40/125 0/12 0/12 0/12 – – – 0/10
Reliability
2–5MicroStar BGA Packaging Reference Guide
Table 4. Summary of Significant BLRImprovements
Condition Improved BLR ⇒
Die size Larger ⇒ Smaller
Die edge Over balls ⇒ Within ball matrix
Ball count Smaller ⇒ Larger
Ball size Smaller ⇒ Larger
PCB pad size Over/undersized ⇒ Matches package via(for NSMD ~90% of via)
Solder paste None orinsufficient
⇒ Thickness 0.15 nom.(type matches reflow)
development time, predict system lifetimes, and providean important analytical tool. In applications such asBGAs, where the interconnections are made throughsolder balls, the useful life of the package is, in mostcases, dependent on the useful life of the solder itself.This is an area that has been studied extensively, andvery accurate models for predicting both solder behaviorand interpreting accelerated life testing exist.
The current methodology employed at TexasInstruments includes both extensive model refinementand constant experimental verification. For a givenpackage, a detailed 2D Finite Element Model (FEM) isconstructed. This model will be used to carry out 2D plainstrain elastoplastic analysis to predict areas of highstress. These models also account for the thermalvariation of material properties, such as Modulus ofElasticity, Coefficient of Thermal Expansion, andPoisson’s Ratio as a function of temperature. Theseallow the FEM to calculate the thermomechanical plasticstrains in the solder joints for a given thermal loading.
The combination of Finite Element Analysis (FEA),accurate thermal property information, and advancedstatistical methods allows prediction of the number ofcycles to failure for various probability levels. Using theassumption that cyclic fatigue lifetime follows a Weibulldistribution, various probability levels can be calculated.For these calculations, the Weibull shape parameterused is β = 4, which is based on experimental datacalibration. It is also consistent with availableexperimental data found in the literature for leadlesspackages. This then results in the following equation:
Nf(x%) = Nf(50%)[ln(1–0.01x)/ln(0.5)]1/β
Using this equation, and using the plastic strain εp incombination with the S-N curves, the data below is anexample of the accuracy possible with this method:
Sample Finite Element Simulation and LifePrediction:144 GGU @ T/C: –40/125°C
Model→ εp = 0.353% on the outmost joint→ Nf(50%)= 4434 cycles
→ Nf(1%) = 1539 cycles
BLR Testing→ –40/125°C (10 min/10 min) → Nf(1%) = 1657 cycles
Modeling is most useful in exploring changes inmaterials, designs and process parameters without theneed to build experimental units. For example, modelingwas used to study the effects of changes in boardthickness and pad size. Table 5 shows the simulatedeffects of pad size and board thickness on the fatigue lifeof a 144-GGU package.
Table 5. Effects of Pad Size and Board Thickness on Fatigue Life
Example1: Effects of pad size on fatigue life
• Package: 144 GGU• Die: 8.8 x 8.8 x 0.279 mm
Pad Dia.(mils)
PadStandoff
(mm)
SolderCenter Dia.
(mm)Plastic
Strain (%)
Nf (1%)(cycles to
failure) Difference• Die: 8.8 x 8.8 x 0.279 mm• Board: FR-4 board 52 mils thick 12 0.3847 0.4908 0.4400 998 0.88x
13 0.3689 0.4951 0.4127 1134 1
14 0.3523 0.5005 0.3908 1263 1.11x
15 0.3350 0.5060 0.3741 1377 1.21x
Example 2: Effects of board thickness on fatiguelife
• Package: 144 GGU
BoardThickness
(mils)Plastic
Strain (%)
Nf (1%)(cycles to
failure) Differenceg• Die: 8.8 x 8.8 x 0.279 mm• Board: FR-4
50 0.4095 1152 1• Board: FR-4• Pad Size: 13 mils 31 0.393 1249 1.08x
Reliability
2–6MicroStar BGA Packaging Reference Guide
Package CharacteristicsTexas Instruments has extensive packagecharacterization capabilities, including an electricalmeasurements lab with TDR/LRC (Time DomainReflectometer/inductance resistance capacitance) andnetwork analysis capabilities, a thermal measurementslab with JEDEC standard test conditions up to1000 watts, and extensive electrical, thermal, andmechanical modeling capability. Modeling wasimplemented at TI starting in 1984. Stress analysis isdone with the Ansys Analysis tool, which provides fulllinear, nonlinear, 2D and 3D capabilities for solderreliability, package warpage, and stress analysis studies.An internally developed tool (PACED) is used forelectrical modeling that gives 2.5D and full 3D capabilityfor LRC models, transmission lines, lossy dielectrics,and SPICE deck outputs. The thermal modeling tool wasalso internally developed (ThermCAL) and it providesfull 3D automatic mesh generation for most packages.
Figure 19. Thermal Modeling ProcessHeat-Transfer Paths
(TQFP shown for illustration purposes)
Model’s three heat-transfer mechanisms:– Conduction– Convection– Radiation
Method:– Define solid– Mesh solid– Solve large number of simultaneous equations relating
each defined mesh point to each other
Sources of error:– Convection coefficients– Material properties– Solid definition inaccuracies
Chip
PadPackage
PWB
Conduction Convection Radiation
Complex geometries, transient analysis, and anisotropicmaterials can be modeled with it. With these capabilities,a full range of modeling from device level through systemlevel can be provided. Package modeling is used topredict package performance at the design stage, toprovide a package development tool, to aid qualificationby similarity, and is used as a failure analysis tool.
Thermal Modeling
Figure 19 outlines the thermal modeling process. Datafor each package is included in Appendix B.
Electrical Modeling
Figure 20 outlines the electrical modeling process. Datafor each package is included in Appendix B.
Figure 20. Electrical Modeling Process
Vol
tage
(V
)
1
2
3
4
5
00 2.00E-09 4.00E-09
Time (sec)
Input pin 1Output pin1
Crosstalk pin 1
Calculates inductances,capacitances, resistances,transmission line characteristics ofpackage geometries
Uses as loads for circuit simulation
Process– Select solution algroithms for
problem domain– Identify package structures to be
modeled– Generate spice deck of package
parameters– Simulate impact on driver output
waveforms– Calculate ground/power bounce
DiePin 1Pin 2
PACED and ThermCAL are trademarks of Texas Instruments Incorporated.
3–1MicroStar BGA Packaging Reference Guide
3Surface-Mounting
MicroStar BGA Packages
Surface-Mounting MicroStar BGA Packages
3–2MicroStar BGA Packaging Reference Guide
Surface-mount technology (SMT) has evolved over thepast decade from an art into a science with thedevelopment of design guidelines and rules. While theseguidelines are specific enough to incorporate manyshared conclusions, they are general enough to allowflexibility in board layouts, solder pastes, stencils,fixturing, and reflow profiles. From experience, mostassembly operations have found MicroStar BGApackages to be robust, manufacturing-friendly packagesthat fit easily within existing processes and profiles. Inaddition, they do not require special handling. However,as ball pitch becomes smaller, layout methodology andplacement accuracy become more critical. Below is areview of the more important aspects ofsurface-mounted CSPs. The suggestions provided mayaid in efficient, cost-effective production.
Design for Manufacturability (DFM)
A well-designed board that follows the basicsurface-mount technology considerations greatlyimproves the cost, cycle time, and quality of the endproduct. Board design should comprehend theSMT-automated equipment used for assembly, includingminimum and maximum dimensional limits andplacement accuracy. Many board shapes can beaccommodated, but the front of the board should have astraight and square edge to help machine sensors detectit. While odd-shaped or small boards can be assembled,they require panelization or special tooling to processin-line. The more irregular the board—non-rectangularwith no cutouts—the more expensive the assembly cost.
Fiducials (the optical alignment targets that align themodule to the automated equipment) should allowvision-assisted equipment to accommodate the shrinkand stretch of the raw board during processing. Theyalso define the coordinate system for all automatedequipment, such as printing and pick-and-place. Thefollowing guidelines may be helpful:
• Automated equipment requires a minimum of twoand preferably three fiducials.
• A wide range of fiducial shapes and sizes can beused. Among the most useful is a circle 1.6 mm indiameter with an annulus of 3.175/3.71 mm. Theouter ring is optional, but no other feature may bewithin 0.76 mm of the fiducial.
• The most useful placement for the fiducials is anL configuration, which is orthogonal to optimize thestretch/shrink algorithms. When possible, thelower left fiducial should be the design origin(coordinate 0,0).
• All components should be within 101.6 mm of afiducial to guarantee placement accuracy. For largeboards or panels, a fourth fiducial should be added.
If the edges of the boards are to be used for conveyertransfer, a cleared zone of at least 3.17 mm should beallowed. Normally, the longest edges of the board areused for this purpose, and the actual width is dependenton equipment capability. While no component lands orfiducials can be in this area, breakaway tabs may be.
Interpackage spacing is a key aspect of DFM, and thequestion of how close you can safely put components toeach other is a critical one. The following componentlayout considerations are recommendations based on TIexperience:
• There should be a minimum of 0.508 mm betweenland areas of adjacent components to reduce the riskof shorting.
• The recommended minimum spacing between SMDdiscrete component bodies is equal to the height ofthe tallest component. This allows for a 45° solderingangle in case manual work is needed.
• Polarization symbols need to be provided fordiscrete SMDs (diodes, capacitors, etc.) next to thepositive pin.
• Pin-1 indicators or features are needed to determinethe keying of SMD components.
• Space between lands (under components) on thebackside discrete components should be a minimumof 0.33 mm. No open vias may be in this space.
• The direction of backside discretes for wave soldershould be perpendicular to the direction through thewave.
• Do not put SMT components on the bottom side thatexceed 200 grams per square inch of contact areawith the board.
• If space permits, symbolize all referencedesignators within the land pattern of the respectivecomponents.
• It is preferable to have all components oriented inwell-ordered columns and rows.
• Group similar components together wheneverpossible.
• Room for testing needs to be allowed.
Solder Paste
TI recommends the use of paste when mountingMicroStar BGAs. The use of paste offers the followingadvantages:
• It acts as a flux to aid wetting of the solder ball to thePCB land.
• The adhesive properties of the paste will hold thecomponent in place during reflow.
Surface-Mounting MicroStar BGA Packages
3–3MicroStar BGA Packaging Reference Guide
• It helps compensate for minor variations in theplanarity of the solder balls.
• Paste contributes to the final volume of solder in thejoint, and thus allows this volume to be varied to givean optimum joint.
Paste selection is normally driven by overall systemassembly requirements. In general, the “no clean”compositions are preferred due to the difficulty incleaning under the mounted component. Most assemblyoperations have found that no changes in existing pastesare required by the addition of MicroStar BGA, but dueto the large variety of board designs and tolerances, it isnot possible to say this will be true for any specificapplication.
Nearly as critical as paste selection is stencil design. Aproactive approach to stencil design can pay largedividends in assembly yields and lower costs. In general,MicroStar BGA packages are special cases of BGApackages, and the general design guidelines for BGApackage assembly applies to them as well. There aresome excellent papers on BGA assembly, so only a briefoverview of issues especially important to MicroStarBGA packages will be presented here.
The typical stencil hole diameter should be the same sizeas the land area, and 125- to 150-µm-thick stencils havebeen found to give the best results. Good release and aconsistent amount of solder paste and shapes arecritical, especially as ball pitches decrease. The use ofmetal squeegee blades, or at the very least, highdurometer polyblades, is important in achieving this.Paste viscosity and consistency during screening aresome variables that require close control.
Solder Ball Collapse
In order to produce the optimum solder joint, it isimportant to understand the amount of collapse of thesolder balls, and the overall shape of the joint. These area function of:
• The diameter of the package solder ball via.
• The volume and type of paste screened onto thePCB.
• The diameter of the PCB land.
• The board assembly reflow conditions.
• The weight of the package.
The original ball height on the package for a typical0.8-mm-pitch package is 0.40 mm. After the package ismounted, this typically drops to 0.35 mm, as illustrated inFigure 21.
Figure 21. Solder Ball Collapse
0.40 ± 0.05 mm
0.35 mm typical
PCB
(Not to scale)
PCB
Land on PCB
Controlling the collapse, and thus defining the packagestandoff, is critical to obtaining the optimum jointreliability. Generally, a larger standoff gives better solderjoint fatigue strength, but this should not be achieved byreducing the board land diameter. Reducing the landdiameter will increase the standoff, but will also reducethe minimum cross-section area of the joint. This, in turn,will increase the maximum shear force at the PCB sideof the solder joint. Thus, a reduction of land diameter willnormally result in a worse fatigue life, and should beavoided unless all the consequences are wellunderstood.
ReflowSolder reflow conditions are the next critical step in themounting process. During reflow, the solvent in thesolder paste evaporates, the flux cleans the metalsurfaces, the solder particles melt, wetting of thesurfaces takes place by wicking of molten solder, thesolder balls collapse, and finally solidification of thesolder into a strong metallurgical bond completes theprocess. The desired end result is a uniform solderstructure strongly bonded to both the PCB and thepackage with small or no voids and a smooth, even filletat both ends. Conversely, when all the steps do notcarefully fit together, voids, gaps, uneven joint thickness,discontinuities, and insufficient fillet can occur. While theexact cycle used depends on the reflow system andpaste composition, there are several key points allsuccessful cycles have in common.
The first of these is a warm-up period sufficient to safelyevaporate the solvent. This can be done with a pre-heator a bake, or, more commonly, a hold in the cycle atevaporation temperatures. If there is less solvent in thepaste (such as in a high-viscosity, high-metal-contentpaste), then the hold can be shorter. However, when thehold is not long enough to get all of the solvent out or toofast to allow it to evaporate, many negative thingshappen. These range from solder-particle splatter to
Surface-Mounting MicroStar BGA Packages
3–4MicroStar BGA Packaging Reference Guide
trapped gases, which can cause voids andembrittlement. A significant number of reliabilityproblems with solder joints can be solved with thewarm-up step, so it needs careful attention.
The second key point that successful reflow cycles havein common is uniform heating across the package andthe board. Uneven solder thickness and non-uniformsolder joints may be an indicator that the profile needsadjustment. There can also be a problem when differentsized components are reflowed at the same time. Careneeds to be taken when profiling an oven to be sure thatthe indicated temperatures are representative of whatthe most difficult to reflow parts are seeing. Theseproblems are more pronounced with some reflowmethods, such as infrared (IR) reflow, than with others,such as forced hot-air convection.
Finally, successful reflow cycles strike a balance amongtemperature, timing, and length of cycle. Mistiming maylead to excessive fluxing activation, oxidation, excessivevoiding, or even damage to the package. Heating thepaste too hot too fast before it melts can also dry thepaste, which leads to poor wetting. Processdevelopment is needed to optimize reflow profiles foreach solder paste/flux combination.
The profile shown in Figure 22 is an ideal one for use ina forced-air-convection furnace, which is the most highlyrecommended type. The best results have been found ina nitrogen atmosphere.
The guidelines upon which this profile is based, alsoshown in Figure 22, are general. Modification to the idealreflow profile will be driven by the interplay ofsolder-paste particle size and flux percentage withprocess variables such as heating rates, peaktemperatures, board construction factors andatmosphere. These modifications are dependent uponspecific applications.
It should be noted that while they are more rugged thanmost CSP-type packages, many MicroStar BGApackages are still slightly moisture-sensitive at the timeof printing of this Reference Guide. The time out of a dryenvironment should be controlled according to the labelon the packing material. This will prevent moistureabsorption problems with the package such as“popcorning,” or delamination.
Figure 22. Ideal Reflow Profile
Tem
pera
ture
(°C
)
0
100
200
300
0 100 200 300
Time (sec)
Ideal Reflow Profile
Note: This is an ideal profile, and actual conditions obtainedin any specific reflow oven will vary. This profile is basedon convection or RF plus forced convection heating.
RT to 140°C: 60–90 sec140°C to 180°C: 60–120 secTime above 183°C: 60–150 secPeak temperature: 220°C ± 5°CTime within 5°C peak temperature: 10–20 secRamp-down rate: 6°C/sec maximum
Other concerns with BGA packages are those caused bya PCB bowing or twisting during reflow. As PCBs getthinner, these problems will become more significant.Potential problems from these effects will show up asopen pins, hourglass solder joints, or solderdiscontinuities. Proper support of the PCB through thefurnace, balancing the tab attachments to a panel, and,in worst cases, using a weight to stiffen the PCB can helpprevent this. In general, the small size of CSPs createfewer problems than standard BGAs. It is also true thatBGAs generally have fewer problems than leadedcomponents.
InspectionMicroStar BGA packages have been designed to beconsistent with very high-yield assembly processes.Because of their relatively light weight, MicroStar BGApackages tend to self-align during reflow. Since the pitchof the ball pattern is large compared to that of fine-pitchleaded packages, solder bridging is rarely encountered.It is recommended that a high-quality solder jointassembly process be developed using the variousinspection and analytical techniques, such ascross-sectioning. Once a quality process has beendeveloped, detailed inspection should not be necessary.Visual methods, while obviously limited, can offervaluable clues to the general stability of the process.Electrical checks can confirm interconnection. Bothtransmission X-rays and laminographic X-rays haveproven to be useful nondestructive tools, if desired.
4–1MicroStar BGA Packaging Reference Guide
4Packing and Shipping
Packing and Shipping
4–2MicroStar BGA Packaging Reference Guide
MicroStar BGAs are shipped in either of two packingmethods:
• Trays
• Tape and reel
TraysThermally resistant plastic trays are currently used toship the majority of the packages. Each family of parts
with the same package outline has its own individuallydesigned tray. The trays are designed to be used withpick-and-place machines. Figure 23 gives typical traydetails, and Table 6 shows the number of units per tray.
Figure 24 shows the packing method used to ship trays.Before the trays are sealed in the aluminum-lined plasticbag, they are baked in accordance with the requirementsfor dry-packing at the appropriate level.
Figure 23. Shipping Tray Detail
Table 6. Number of Units per Shipping Tray
BodySize(mm) Package Code Matrix
Units/Tray
Units/Box
16 x 16 GZY, GHK 6 x 15 90 450
15 x 15 GGW,GHC 6 x 15 90 450
13 x 13 GHG, GHJ, GHV 8 x 20 160 800
12 x 12 GZG, GGB 8 x 20 160 800
11 x 11 GGT 8 x 20 160 800
10 x 10 GGF, GHZ, GGM 8 x 25 200 1000
8 x 8 GGV, GJJ 9 x 25 225 1125
9 x 13 GFZ, GHB, GHN 10 x 18 180 900
Packing and Shipping
4–3MicroStar BGA Packaging Reference Guide
Figure 24. Packing Method for Trays1. Arrange the stack of trays to be packed with a tray pad on top and
bottom.
Traypad
Traystack
Traypad
2. Strap the tray stack and pads together with four straps—threecrosswise and one lengthwise. Then place the desiccants and thehumidity indicator on top.
Desiccantpacks
Humidityindicator
3. Place the lot inside the aluminum-lined bag and vacuum-seal it.Place the necessary labels on the sealed bag.
Aluminum-linedbag
Moisture-sensitivity label
ESDlabel
Bar-codelabel
4. Wrap and tape bubble pack around the bag for a snug fit in the innercarton. Place the necessary labels on the inner carton.
Bar-codelabel
ESDlabel
5. Add bubble pack around the inner carton for a snug fit in theskidboard liner.
6. Place four foam corner spacers on the folded skidboard liner beforeplacing it in the outer carton. An enhanced skidboard liner, whicheliminates the need for foam corner spacers, may be used. Sealouter carton and apply necessary labels.
Packing and Shipping
4–4MicroStar BGA Packaging Reference Guide
Tape-and-Reel Packing MethodThe embossed tape-and-reel method is generallypreferred by automatic pick-and-place machines. Thiswill be the standard way MicroStar BGA packages will beshipped. Trays will remain an option for those customerswho prefer them. The tape is made from anantistatic/conductive material. The cover tape, whichpeels back during use, is heat-sealed to the carrier tapeto keep the devices in their cavities during shipping andhandling. The tape-and-reel packaging used by TexasInstruments is in full compliance with EIAStandard 481-A, “Taping of Surface-Mount Componentsfor Automatic Placement.” The static-inhibiting materialsused in the carrier-tape manufacturing provides device
protection from static damage, while the rigid, dust-freepolystyrene reels provide mechanical protection andclean-room compatibility with dereeling equipmentcurrently available on most high-speed automatedplacement systems.
Tape Format
Typical tape format is shown in Figure 25. The variablesused in Figure 25 and Table 7 are defined as follows:W is the tape width; P is the pocket pitch; A0 is the pocketwidth; B0 is the pocket length; K0 is the pocket depth; K isthe maximum tape depth; and F is the distance betweenthe drive hole and the centerline of the pocket.
Figure 25. Single Sprocket Tape Dimensions
1.75 ± 0.1
B0
P
4.0 ± 0.10
2.00 ± 0.050.8 MIN
P
K
0.40
F
W
0 MIN K0
Covertape
Carrier tapeembossment
1.5 MINDiameter
A0
Notes: A. Tape widths are 16 and 24 mm.B. Camber per EIA Standard 481-AC. Minimum bending radius per
EIA Standard 481-AD. All linear dimensions are in millimeters.
Direction
of feed
1.5+ 0.1– 0.0
Table 7. Tape Dimensions †
Tape Width(W)
Pocket Pitch(P)
Pocket Width(A0)
Pocket Length(B0)
Pocket Depth(K0)
Max. TapeDepth (K)
Centerline toDrive Hole (F)
PackageSize
16 12 8.2 8.2 1.7 2.0 7.5 8 x 8
24 16 10.2 10.2 1.7 2.0 11.5 10 x 10
24 16 11.35 11.35 1.9 2.2 11.5 11 x 11
24 16 12.4 12.4 1.9 2.2 11.5 12 x 12
24 20 15.25 15.25 2.2 2.5 11.5 15 x 15
† All dimensions are in millimeters.
Packing and Shipping
4–5MicroStar BGA Packaging Reference Guide
Figure 26. Reel Dimensions
N is the diameter of the reel hub.
330+ 0.0– 4.0
20.2 MIN
2.5 MIN
TI bar code label1.5 MIN widthNote A: All linear dimensions are in millimeters.
T MAX
N
13.0 ± 0.2
G
Table 8. Reel Dimensions †
TapeWidth
(G)
Reel HubDiameter
(N)
Reel TotalThickness(T MAX)
Parts perReel
16 100 28 1000
24 100 28 1000
† All dimensions are in millimeters.
The reels are shown in Figure 26. In this figure, G is thewidth of the tape, N is the diameter of the hub, and T isthe total reel thickness.
After the parts are loaded into the reel, each individualreel is packed in its own “pizza” box for shipping, asshown in Figure 27.
Figure 27. Tape-and-Reel Packing
Desiccant
Humidityindicator
Reeled units
Aluminumbag
Pizza box
Bar code
ESD label
Device Insertion
Devices are inserted toward the outer periphery of thetape by placing the side with the device name face up andthe side with the balls attached face down. The pin-1indicator is placed in the top right-hand corner of thepocket, next to the sprocket holes.
Packaging Method
For reels, once the taping has been completed, the endof the leader is fixed onto the reel with tape. The productname, lot number, quantity, and date code are recordedon the reel and the cardboard box used for tape delivery.Each reel is separately packed in a cardboard box fordelivery.
Trays are packed with five loaded trays and one emptytray on top for support and to keep packages secure. Thestack is secured with stable plastic straps and sealed ina moisture-proof bag.
Customer-specific bar code labels can be added underrequest or general purchasing specification.
Moisture-sensitive packages are baked before packingand are packed within 8 hours of coming out of the oven.Both the tape-and-reel and the tray moisture-proof bagsare sealed and marked with appropriate labeling warningthat the packages inside the bags are dry-packed andgiving the level of moisture sensitivity.
Packing and Shipping
4–6MicroStar BGA Packaging Reference Guide
5–1MicroStar BGA Packaging Reference Guide
5Sockets
Sockets
5–2MicroStar BGA Packaging Reference Guide
The Design ChallengeThe fine pitch of MicroStar BGA packages makessocketing a special challenge. Mechanical, thermal, andelectrical issues must be accommodated by the socketdesigner. CSP packaging is at the cutting edge ofpackage design and it appears that it is being adoptedfaster than any other previous package technology.Standards are only now beginning to be established. TIfully supports these efforts, and all MicroStar BGAoutlines are being engineered to fit within JEDECstandards where they exist. For instance, all0.8-mm-pitch packages fit within JEDEC MO205. Whilethese standards detail the pitch and I/O placement, theydo allow wide latitude for overall body size variation. Thesize of a specific package within the TI MicroStar BGAfamily is based on the package construction, and isindependent of die size. Thus, a range of die sizes andI/Os within a family will have the same packagedimensions. Each different family has a specific I/O pitchand array. For maximum socket versatility, an adapter or“personalizer” can be customized for each application,allowing a single-socket body to be used with manypackages. This feature is especially useful in the earlydays as the technology is being developed and adoptedand the total volume required is small.
Contacting the BallA number of different approaches for contacting the sol-der ball are shown schematically in Figure 28. The pinchstyle contact has been used extensively for contactingsolder balls in conventional BGAs. A benefit of the pinchstyle is that the socket does not have to push down on thepackage to provide the necessary contact force to pene-trate the oxide film on the solder balls. The issues in utiliz-ing this approach for pitches below 1.27 mm involve:
1. Miniaturizing the contact
2. Developing injection-molding tooling for the pitch
3. Developing cost-effective manufacturing proce-dures for handling and assembling the fragile con-tact
For pitches of 0.75 mm and above, Texas Instrumentshas designed a pinch contact that satisfies all of theserequirements. Further information on the availability ofthese sockets can be obtained from your local TI FieldSales representative.
The contact is designed to grip the solder ball with apinching action. This not only provides electrical contactto the solder ball but also helps retain the package in thesocket. The contact is shown in Figure 29. The contactis stamped and formed from a 0.12-mm-thick strip ofCDA 172, the high-yield-strength beryllium copper alloy.This alloy is used for spring applications that are exposedto high stresses and temperatures because of itsexcellent stress relaxation performance and formability.
Figure 28. Approaches for Contacting the SolderBall
a) Metal pinch b) Metal “Y”
c) Rough bump on flex d) Conductive
e) Etched pocket in silicon f) Metal
Figure 29. Pinch Contact for Solder Balls
Each contact incorporates two beams that provide anoxide-piercing interface with the sides of the balls abovethe central area—the equator. Since the contact is abovethe equator, the resultant force is downward and ensurespackage retention in the socket. No contact is made on
Sockets
5–3MicroStar BGA Packaging Reference Guide
the bottom of the solder ball and the original packageplanarity specifications are unchanged. A photo-micrograph of the contact touching the solder balls isshown in Figure 30.
Figure 30. Contact Area on Solder Ball
The witness marks left on the solder ball from the contactare shown in Figure 31. This ball was contacted at roomtemperature and it is clear that there was no damage tothe bottom of the ball or any witness marks from thecontact above the equator.
The effect of burn-in on the probe marks was examinedby simulating a cycle and placing a loaded socket into anoven at 125°C for 9 hours. The result is shown inFigure 32. The penetration of the contact into the solderball due to the higher temperature is greater but is wellwithin the acceptable range. There was no visible pickupof solder on the contact tips. This experiment is beingcontinued to evaluate the impact of longer times on thewitness marks and the solder pickup. The location of thecontact pinch is clearly seen in this photograph.
Figure 31. Witness Marks on Solder Ball
Figure 32. Effect of Burn-in on Probe Marks
Establishing Contact ForceContact force is typically generated as a result of thedeflection of the contact arm. The actual force generatedis a function of the modulus of the material and thespecific geometric details of the design. The solder balldiameters for CSPs tend to be small—in the range of0.25 mm to 0.4 mm, which limits the deflection of thecontact arm to a very small distance. Typically, thisdistance is half the ball diameter. This presents achallenge to the designer who must generate therequired 15 grams of force at the contact tip, yet keep thebending stresses within the contact arms at a low enoughvalue to achieve a 20K-cycle life. The contact forcerequirements are met by incorporating a pre-load, so thateven for small displacements, the desired force isachieved and the socket can operate within acceptablestress levels.
The 15-gram target force is smaller than that associatedwith TSOP-type contact force levels, which require a30-gram minimum. However, based on the contact tipgeometry, this lower force translates to contactpressures that are high enough to achieve oxidepenetration and good electrical continuity.
Conclusions and Future WorkThe importance of continuing the development to0.5-mm pitch is clear. End users want more and moreelectronic functionality in smaller and smaller packages.Sockets for testing these fine pitches are available todaybut are specialty and are considered too expensive forbroad commercial application. Continued developmentincludes innovative approaches as well as refiningpresent methods, but at the time of the preparation of thisReference Guide, a clear-cut favorite technology had notemerged. For current progress in this and other areas of0.5-mm-pitch technology, your local TI Field Salesrepresentative can give you up-to-date information.
Sockets
5–4MicroStar BGA Packaging Reference Guide
Growth rates as high as 400% for CSPs in 1998 overthose in 1997 have been forecasted. The opportunity toparticipate in a market with this growth has provided theincentive for the socket companies to develop solutionsfor the infrastructure needed for burn-in test sockets. Theissues of contacting the small, soft solder balls on CSPshave been solved. The price disparity between CSPsockets and TSOP sockets is to be expected during the
early days of the introduction of a new technology and isdue entirely to the embryonic state of the industry and thelow volume. It is believed that once this packagingtechnology matures and volumes increase to those ofconventional burn-in sockets, then the prices for socketsfor CSPs will decrease and be more in line with othercommercial sockets.
6–1MicroStar BGA Packaging Reference Guide
6Lead-Free Solutions
Lead-Free Solutions
6–2MicroStar BGA Packaging Reference Guide
Environmental concerns are driving the need forlead-free solutions to electronic components andsystems. Texas Instruments (TI) has been a leader inworking with our customers to provide them withproducts which meet their specific needs. The firstpractical lead-free alternative was the Nickel/Palladium(Ni/Pd) finish introduced by TI in 1989. Since then, morethan 30 billion lead-free Ni/Pd components have beensupplied. Texas Instruments continues to be active in thisfield, working with other manufacturers to evaluate otherlead-free finishes to understand their manufacturabilityand reliability.
Continuing this position of leadership, TI has introduceda lead-free solder ball option for the MicroStar BGApackages. Texas Instruments is also evaluatinglead-free solder ball applications for other area arraypackages. In conjunction with this effort, TI is an activeparticipant in the industry-wide effort to evaluate
lead-free solder alloys and lead-free printing wiringboard finishes. Several of the lead-free systems beingproposed require a maximum reflow temperature higherthan that needed with the Sn/Pb systems, so packageand system reliability data must be developed. Securingthe required Board Level Reliability (BLR) under variouscustomer conditions depends on many factors: solderball composition, solder paste, PCB design, land finishand reflow conditions.
The composition TI has selected for lead-free MicroStarBGA packages is an Sn-Ag-Cu alloy. Reliability datapresented in Table 9 shows it to be a robust performer,equivalent to the Sn/Pb eutectic balls it replaces.Extensive assembly testing has shown it to be virtuallyindistinguishable from Sn/Pb eutectic ball performancein current systems and superior in high temperature,lead-free systems. Figure 33 shows a summary of thesetests.
Table 9. Component Reliability Testing and BLR for Pb-free Solder Balls
TEST VEHICLE: 64GGV:D76563GGV 257GJG:F712521GJG 257GHK:F722500AGHK
BODY SIZE: 8 mmsq 16 mmsq 16 mmsq
CHIP SIZE: 230 x 225 mil 407 x 407 mil 312 x 312 mil
TEST ITEM CRITERIA TEST RESULTS
PRECON (LEVEL3) 0/All sample 64GGV:0/330, 257GJG:0/330, 257GHK:0/84
(Condition: 125°C 24h Bake → 30°C/60% 192h Soak → IRR peak255–260x3time → Elec. test)
THB (85oC/85%, 3.6 V) 0/77/600h 257GHK:0/78/1000h,
STRG (150oC) 0/77/600h 64GGV:0/78/1000h, 257GJG:0/78/1000h
T/C (–55/+125oC) 0/77/1000cy 64GGV:0/78/1000cy, 257GJG:0/78/1000cy
T/S (–55/+125oC) 0/77/200cy 64GGV:0/78/1000cy, 257GJG:0/78/1000cy
PCT 0/77/96h 64GGV:0/78/240h, 257GJG:0/78/240h
BLR (–40/+125oC) 0/77/1000cy 64GGV:0/96/1000cy, 257GJG:0/96/1000cy
(Solder paste for PCB mount: Sn/2.5Ag/1Bi/0.5Cu)
Lead-Free Solutions
6–3MicroStar BGA Packaging Reference Guide
Figure 33. Assembly Testing of Eutectic vs. Pb-free Solder Balls
Sn/Pb Ball
Sn/Pb Ball
Sn/Pb Paste
Sn/Pb Paste
Current Goal
TransitionPeriod
Not recommended
230oC reflow
Because IRR peak temperatureis not good enough for makingconsistent solder joint
Pb-free Paste250oC reflow
Pb-free Ball
230oC reflow
Pb-free BallPb-free Paste
250oC reflow
The higher reflow temperatures required with thelead-free solders present challenges in two areas: BLRand component moisture sensitivity testing. Arepresentative standard reflow profile for Sn/Pb eutecticsolder is shown in Figure 34. The 235°C peak representsthe highest recommended peak for current package
moisture levels. The new alloys will require a peaktemperature well in excess of even the 235°C shown.While the exact temperature requirements are not wellestablished, the profile shown in Figure 35 representsthe cycle TI recommends for preconditioning and othernon-Pb evaluation studies.
Figure 34. Standard Reflow Profile for Pb/Sn Alloy Solder
Recommended Reflow ProfileIn the case of Sn/Pb eutectic solder paste
140
160
235
200
Reflow temperature is defined at package top.time
Peak Temperature235oC Max < 10 sec
1–5oC/sec
90 +/– 30 sec
30 – 60 sec
oC
Lead-Free Solutions
6–4MicroStar BGA Packaging Reference Guide
Figure 35. Example Reflow Profile for Non-Pb Alloy Solder Evaluation/Preconditioning
0.0
50.0
100.0
150.0
200.0
250.0
300.0
Texas Instruments Recommended 260 oC Reflow Profile
Reflow temperature is defined at package top.
Tem
pera
ture
(°C
)
Time (seconds)
0 20 40 60 80 100 120120 140 160 180 200 220 240 260 280 300 320 340 360 380 400
Moisture Sensitivity
A drop of 2+ levels in moisture sensitivity (as perJ-STD-20) has been indicated for several package typeswith the peak temperature of 260°C. Extensive testing ofMicroStar BGA packages has shown they are capable ofresisting the 260°C cycles without an impact on themoisture sensitivity classification. Data shown inTable 10 shows several package and die sizes. TheScanning Acoustic Microscope (SAM) picture inFigure 36 is typical of the results obtained.
Table 10. Moisture Sensitivity Test Results
Evaluation flow: 30°C/60%/192hr Soak (JEDEC level 3)+ IRR × 3 times
Pkg.Type
Pkg.Size(mm)
ChipSize(mm)
260oC Chip SurfaceDelamination
GGV64 8 × 8 5 × 5 0/24 (8 × 3 lot)
GGM100 10 × 10 7.5 × 7.5 0/24 (8 × 3 lot)
GGB128 12 × 12 9 × 9 0/24 (8 × 3 lot)
GJG257 16 × 16 10 × 10 0/24 (8 × 3 lot)
Lead-Free Solutions
6–5MicroStar BGA Packaging Reference Guide
Figure 36. Typical SAM Pictures After MoistureSensitivity Testing
SAM picture
Package: GJG257 (16×16 mm)Chip: 10 x 10 mmMSL:L3IRR peak temperature: 256.4°C
Evaluation flow: 30°C/60%/192hr Soak + IRR × 3 times
Board Land Finishes and Solder PasteAny study of BLR must take into account the manychoices available to the PCB manufacturer. There are atleast two main board land finishes and many candidatesfor the solder paste. The board finishes are generally anorganic protective layer over bare copper or an Ni plateprotected with Au flash. The organic finishes areformulated to protect the bare copper from oxidation butto burn off early enough in the reflow cycle so they do notinterfere with the soldering. The various lead-free solderpaste candidates are generally tin-based with variousmetals added as alloying compounds. TexasInstruments conducted a series of tests with two of thesenewer solder paste over both types of board finishes.Lead-free balls on the packages were used. As a control,the present near-eutectic solder balls were used. Thesolder paste compositions used are listed in Table 11.
Table 11. Solder Paste Compositions
SolderSolidusTemp
LiquidusTemp
Metal Composition (wt%)Reflow
Peak forSoldering
SolderPaste
Temp(oC)
Temp(oC) Sn Pb Ag Bi Cu
SolderingEvaluation
(oC)
Eutectic(ref.)
183 183 63 37 – – – 230
Pb-free-1 216 220 95.75 – 3.5 – 0.75 250
Pb-free-2 205 220 94.25 – 2 3 0.75 250
The results on 0.8-mm-pitch MicroStar BGA are shownin Figure 37, Figure 38, and Figure 39. Figure 37 showsthat for the current Sn/Pb solders, there is virtually nodifference in performance between the lead-bearing andthe lead-free ball compositions. However, as the new,lead-free solders are introduced, the lead-free ballsdelay the onset of failure, usually by a significant amount.Failure does tend to be on a steeper slope, and furtherwork is being done to explain this phenomenon. Ofadditional interest, in each case, the pure copper wassuperior to the gold-bearing surface. In the case of theleaded solders, this is expected due to the well-knownembrittlement of lead by gold. In the lead-free systems,not as much detailed analysis has been done and nodetailed explanation exists.
Lead-Free Solutions
6–6MicroStar BGA Packaging Reference Guide
Figure 37. Board-Level Reliability Study(Solder Paste: Sn/Pb Eutectic)
99%
90%80%70%60%50%40%30%
20%
10%
1%100 1000 10000
cycles
1%
10%
20%
30%40%50%60%70%80%90%
99%
100 1000 10000cycles
PCB land : Cu bare
PCB land : Au/Ni finish
Package: 12 × 12 mm body, 144i/o, 0.8 mm ball pitchChip: 6-mmsq daisy-chain test chip,PCB: FR-4 25 × 30 × 0.8 mmtSolder paste: Sn/Pb eutectic, Reflow temp: max 230°CTest condition: –40/ +125°C, 10/10 min
Cum
ulat
ive
Pro
babi
lity
Cum
ulat
ive
Pro
babi
lity
Pb-freesolder ball
Standardsolder ball
Standardsolder ball Pb-free
solder ball
Figure 38. Board-Level Reliability Study(Solder Paste: Pb-free-1)
99%
90%80%70%60%50%40%30%
20%
10%
1%
100 1000 10000cycles
PCB land : Cu bare
PCB land : Au/Ni finish99%
90%80%70%60%50%40%30%
20%
10%
1%
100 1000 10000cycles
Cum
ulat
ive
Pro
babi
lity
Cum
ulat
ive
Pro
babi
lity
Pb-freesolder ball
Standardsolder ball
Standardsolder ball
Pb-freesolder ball
Package: 12 × 12 mm body, 144i/o, 0.8 mm ball pitchChip: 6-mmsq daisy-chain test chip,PCB: FR-4 25 × 30 × 0.8 mmtSolder paste: Pb-free-1 (Sn/Ag/Cu), Reflow temp: max 250°CTest condition: –40/ +125°C, 10/10 min
Lead-Free Solutions
6–7MicroStar BGA Packaging Reference Guide
Figure 39. Board-Level Reliability Study(Solder Paste: Pb-free-2)
99%
90%80%70%60%50%40%30%20%
10%
1%
100 1000 10000cycles
PCB land : Cu bare
PCB land : Au/Ni finish99%
90%80%70%60%50%40%30%
20%
10%
1%
100 1000 10000
cycles
Cum
ulat
ive
Pro
babi
lity
Cum
ulat
ive
Pro
babi
lity
Package: 12 × 12 mm body, 144i/o, 0.8 mm ball pitchChip: 6-mmsq daisy-chain test chip,PCB: FR-4 25 × 30 × 0.8 mmtSolder paste: Pb-free-2 (Sn/Ag/Cu/Bi), Reflow temp: max 250°CTest condition: –40/ +125°C, 10/10 min
Pb-freesolder ball
Standardsolder ball
Pb-freesolder ball
Standardsolder ball
For many applications, such as wireless phones,electrical reliability after repeated mechanicaldisplacements is a critical parameter. This is commonlymeasured with a Key Push Test, shown in Figure 40. Anevaluation board with a daisy-chained package mountedto it is continually cycled by a load cell. The load is appliedfrom the PCB backside at a constant stain of1300 microstrain through a distance of 3.5 mm at aconstant frequency. Electrical resistivity is continuouslymonitored and when it reaches 1.2 times the initial value,the test is terminated. A typical test pattern is seen inFigure 41. While there are no specific industry-widelimits for this test, Texas Instruments has determined that20k cycles for 0.8-mm-pitch packages and 10k cyclesfor 0.5-mm-pitch packages represent acceptableguidelines. Typical results for MicroStar packages areshown in Figure 42 .
Lead-Free Solutions
6–8MicroStar BGA Packaging Reference Guide
Figure 40. Key Push Test Apparatus
Load cell
90 mmOffset push
1300 microstrain at B/D near package corner
100 cyc/min > 20 kcyc (for 0.8-mm pitch)
> 10 kcyc (for 0.5-mm pitch)
120 × 30 × 0.8 mm FR-4
Figure 41. Typical Key Push Test Results
1.40E+01
1.45E+01
1.50E+01
1.55E+01
1.60E+01
1.65E+01
1.70E+01
1.75E+01
1.80E+01
1.85E+01
1.90E+01
1.95E+01
1 223 445 667 889 1111 1333 1555 1777 1999 2221 2443 2665 2887 3109 3331 3553 3775 3997 4219 4441 4663 4885
Key push cycle
Test Termination Criteria: Resistance is 1.2X from initial.
Res
ista
nce
(Ω)
Lead-Free Solutions
6–9MicroStar BGA Packaging Reference Guide
Figure 42. Key Push Test Performance
0
10000
20000
30000
40000
50000
60000
70000
80000
90000
0 1 2 3 4 5 6 7
Average
Minimum
Maximum
Key Push Test Performance :GHZ151 (0.5mmP)
Ball Sn/Pb system Pb-free system
PCB Au/Ni
Solder paste Sn/Pb/0.4Ag Sn/2.5Ag/1Bi/0.5Cu
OSP Au/Ni OSP Au/Ni OSP
N=4
Key
Pus
h C
ycle
(cy
c)
Summary• Lead-free MicroStar BGAs showed feasible BLR
performance with Sn/Ag/Cu and Sn/Ag/Cu/Bi solder
paste. The Pb-free balls performed better withnon-Pb-containing solder paste in 0.8-mm-pitchapplications.
• Evaluation samples with daisy-chained chips arealready available.
• Individual customer requirements may need specificBLR evaluation to ensure compliance. Key factorsinclude:– PCB specification– Solder paste– Single-side mount or double-side mount?– Reflow condition– Package location on PCB– Storage condition (environment for board
mount)– Criteria of requirement (BLR, mechanical
performance)– Other
New packages are being added to the list of MicroStarBGAs available in the Pb-free version every day. Contactyour local Field Sales representative for the current listof available packages along with qualification noticesand reliability data.
Lead-Free Solutions
6–10MicroStar BGA Packaging Reference Guide
7–1MicroStar BGA Packaging Reference Guide
7References
References
7–2MicroStar BGA Packaging Reference Guide
K. Ano et al., “MicroStar BGAs,” Application Note,TI SCJ 2328, July 1998.
Gerald Capwell, “High Density Design with MicroStarBGAs,” Texas Instruments Application Note, July 1998.
James Forster, “Performance Drivers for Fine Pitch BGASockets,” Chip Scale Processing, June 1998.
Kevin Lyne, “Chip Scale Packaging From TexasInstruments: MicroStar BGA,” Texas InstrumentsApplication Note, June 1997.
Gary Morrison, Les Stark, Ron Azcarte, S. Capistrano,K. Ano, K. Murata, M. Watanabe, T. Ohuchida,Y. Takahashi, Greg Ryan, “MicroStar BGA Packaging:Critical Interconnections,” SEMICON ’98.
Les Stark and M’hamed Idnabdeljalil, “MicroStar BGAvs. FC-CSP: Finite Element Simulation of BLRPerformance: 144GGF Footprint,” Texas InstrumentsApplication Note, August 1998.
A–1MicroStar BGA Packaging Reference Guide
Appendix
AFrequently Asked Questions
Package QuestionsQ. Do the solder balls come off during shipping?
A. No, this has never been observed. The balls are100% inspected for coplanarity, diameter, and otherphysical properties prior to packing for shipment.Because solder is used during the ball-attachmentprocess, uniformly high ball-attachment strengthsare developed. Also, the ball-attachment strength ismonitored frequently in the assembly process toprevent ball loss from vibration and other shippingforces.
Q. Is package repair possible? Are tools available?
A. Yes, some limited package repair is possible, andthere are some semiautomatic M/C tools available.However, TI does not guarantee the reliability ofrepaired packages.
Q. What are the leads that appear on the packageedge for? Are they connected to the innerpattern?
A. Those leads are used for plating connections duringthe plating of Ni/Au on the copper trace during thefabrication of the substrate. Since they do haveelectrical connection with the inner pattern, they canbe used for test probing and signal analysis. Thereis no reliability risk with them.
Q. What is the composition and melting point of thesolder balls?
A. The balls are a near-Sn/Pb eutectic solder thatincludes some additives to improve thermal fatiguelife. The liquidus temperature is 178°C to 210°C.
Q. Is burn-in testing possible? How about balldamage?
A. There are commercial sockets available for1.00-mm and 0.8-mm pitch package burn-in.Sockets for 0.5-mm pitch packages are nowbecoming available. Vendors include TexasInstruments, Yamaichi, Wells and Enplas. The balldamage observed falls within specified tolerances,so the testing does not affect board mount.
Q. Is tape-and-reel shipping available?
A. Tape-and-reel is the preferred method for shippingMicroStar BGA packages. Tray shipping methodsare available upon customer request.
Q. What about actual market experience?
A. Since TI started production in May of 1996, well over70 million units have been shipped. End products areprimarily DSP Solutions such as wireless phonesand digital camcorders where MicroStar BGA cancreate significant space savings. Technologiesavailable in MicroStar BGAs include DSP, ASIC,Mixed Signal, and Linear devices.
Q. How does the packaging cost compare to QFPs?
A. CSPs are in many ways an ideal solution to costreduction and miniaturization requirements. Theyoffer enormous area reductions in comparison toQFPs and have increasing potential to do so withoutadding to system-level costs. In the best case, CSPscompete today on a cost-per-terminal basis withQFPs. For example, various CSPs from TexasInstruments are now available at cost parity with thinQFPs.
Frequently Asked Questions
A–2MicroStar BGA Packaging Reference Guide
Assembly QuestionsQ. What alignment accuracy is possible?
A. Alignment accuracy for the 0.8-mm-pitch package isdependent upon board-level pad tolerance,placement accuracy, and solder ball positiontolerance. Nominal ball position tolerances arespecified at ±80 µm. These packages areself-aligning during solder reflow, so final alignmentaccuracy may be better than placement accuracy.
Q. Can the solder joints be inspected after reflow?
A. Process yields of 5-ppm (parts per million) rejectsare typically seen, so no final in-line inspection isrequired. Some customers are achievingsatisfactory results during process set-up withlamographic X-ray techniques.
Q. How do the board assembly yields of MicroStarBGAs compare to QFPs?
A. Many customers are initially concerned aboutassembly yields. However, once they had MicroStarBGAs in production, most of them report improvedprocess yields compared to QFPs. This is due to theelimination of bent and misoriented leads, the widerterminal pitch than with 0.5-mm-pitch QFPs, and theability of these packages to self-align during reflow.The collapsing solder balls also mean that thecoplanarity is improved over leaded components.
Q. Are there specific recommendations for SMTprocessing?
A. Texas Instruments recommends alignment with thesolder balls for the CSP package, although it ispossible to use the package outline for alignment.Most customers have found they do not need tochange their reflow profile.
Q. Can the boards be repaired?
A. Yes, there are rework and repair tools and profilesavailable. We strongly recommend that removedpackages be discarded.
Q. Is TI developing a lead-free version of MicroStarBGAs?
A. Yes, Texas Instruments is working towardeliminating lead in the solder balls to comply withlead-free environmental policies. The lead-freesolder is in final evaluation. Only the solder willchange, not the package structure or the mechanicaldimensions. The solder system under developmentis based on Sn-Ag metallurgy. Check with your localTI Field Sales representative for sample availability.
Q. What size land diameter for these packagesshould I design on my board?
A. Land size is the key to board-level reliability, andTexas Instruments strongly recommends followingthe design rules included in this bulletin.
B–1MicroStar BGA Packaging Reference Guide
Appendix
BPackage Data Sheets
Figure 43 shows TI’s strategic package lineup, followedby the package data sheets for the package familiesoffered as standard products by Texas Instruments. Asnew packages are added, they will be placed on the
strategic package lineup. Contact your TI field salesoffice for information on the most current offerings.Samples are available for all packages shown inFigure 43.
Figure 43. TI’s Strategic Package Line-Up
MicroStar BGA Package Product GuideStrategic Package Lineup: HIJI and Philippines
PITCH (mm) PACKAGE SIZE (mm)
6 × 6 8 × 8 10 × 10
0.5
GJK 80
Qual: 4Q 99
GJJ 167
Qual: 4Q 99
GHZ 151
Qual: Complete
GGF 100
Qual: Complete
8 × 8 10 × 10 12 × 12 15 × 15 16 × 16
0.8
GGV 64
Qual: Complete
GGM 80
Qual: Complete
GGU 144
Qual: Complete
GGW 176
Qual: Complete
1.0 mm PITCHGHC 196
Qual: Complete
GHK 257
Qual: Complete
11 × 11GGM 100 GHH 179 GGW 208 GGW 240 GJG 257
GGT 100
Qual: Complete
GGM 100
Qual: Complete
GHH 179
Qual: Complete
GGW 208
Qual: Complete
GGW 240
Qual: Complete
GJG 257
Qual: Complete
Package Data Sheets
B–2MicroStar BGA Packaging Reference Guide
' "" "" $ &
GJK (S-PBGA-N80) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GJK 80 TOP VIEW DAISY CHAIN NET LIST
H5–H6H7–H8G8–F8E8–D8C8–B8B7–B6
B3–C3D3–E3F3–G3
G4–G5G6–G7F7–E7D7–C7C6–C5C4–D4E4–F4F5–F6E6–D6D5–E5
B5–B4
D E JF G H
INDEXMARK
3
1
2
4
5
BA
8
6
7
9
B1–C1D1–E1F1–G1H1–J1J2–J3J4–J5J6–J7J8–J9H9–G9
A8–A7A6–A5A4–A3A2–B2C2–D2E2–F2G2–H2H3–H4F9–E9
D9–C9B9–A9
C
GJK 80 PIN ASSIGNMENT NET LIST
PIN# BALL#1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
C2
B1
D3
E4
C1
D2
E3
D1
E2
F1
F2
G3
G1
G2
H2
H1
J1
H3
J2
G4
F5
J325
27
26
24
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
H4
J4
H5
F6J5
G6
J6
H6
G7
J7
H7
H8
J8
J9
G8
H9
F7
E6
G9
F8
E7
F9
E8
E9
D7
D9
D8
C7
C9
C8
B8
B9
A9
29
30
28
F4
E1
F3
G5
55
56
57
58
60
59
D6
BALL#PIN# PIN# BALL#61
62
63
64
65
66
67
68
69
70
71
72
73
74
B7
A8
C6
D5
A7
B6
C5
A6
B5
A5
C4
A4
B4
C3
A3
B3
B2
A2
E5
75
76
77
78
80
79
D4
PIN# BALL#
Thermal Characteristics
Productization
Electrical Characteristics
$
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Package Data Sheets
B–3MicroStar BGA Packaging Reference Guide
) $$ $$ &"(!
GJJ (S-PBGA-N167) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GJJ 167 TOP VIEW DAISY CHAIN NET LIST
GJJ 167 PIN ASSIGNMENT NET LIST
B1–C1D1–E1F1–G1H1–J1K1–L1M1–N1A2–B2C2–D2E2–F2G2–H2J2–K2L2–M2N2–N3A3–A4B3–C3D3–E3
F3–G3H3–J3K3–L3M3–M4B4–B5C4–D4E4–F4G4–H4J4–K4L4–L5N4–N5A5–A6C5–C6D5–E5F5–G5H5–J5
K5–K6M5–M6B6–B7D6–D7E6–F6G6–H6J6–J7L6–L7N6–N7A7–A8C7–C8E7–E8H7–H8K7–K8M7–M8B8–B9
D8–D9F8–G8J8–J9L8–L9N8–N9A9–A10C9–C10E9–F9G9–H9K9–K10M9–M10B10–B11D10–E10F10–G10H10–J10L10–L11
N10–N11A11–A12C11–D11E11–F11G11–H11J11–K11M11–M12B12–C12D12–E12F12–G12H12–J12K12–L12N12–N13A13–B13C13–D13E13–F13
G13–H13J13–K13L13–M13
INDEX MARK
3
12
45
BA C D E JF G H K L M N
13121110
8
67
9
NC – F7
B2E5C4A2B3D5A3E6B4C5A4D6B5C6A5E7B6A6D7C7B7A7G8F8A8B8C8
A9D8B9E8
A10C9B10A11D9C10B11A12D10C11A13
BALL#
148
G12106
M764
G222
4241 M2
J5
L136
40393837
K3M1L2J4
35343332
H5K2J3K1
29
3130
2827
H3
H4J2
J1G5
24
2625
23 G4
H2H1
G3
E9125126
8483 M12
J9
B12
167
124123122121120119118117116115114113
112111110109108107
K873
78
8281
7980
77767574
N11
L10N12M11K9
J8M10L9
N10
7172
7069
66
6867
65
L8M9
N9J7
K7
M8N8
L7
F10
C13
D11B13
E10C12
F9D12E11D13
162
166165164163
161160159158
F11
E12
E13G9
G10
F12F13
G11
157156155154153152151150149
D43
F217
21201918
G1F7F6F1
1516
1413
E1F3
F4E2
C18
10
1211
9 E3
F5D1
D27654
E4D3C2B1
12
PIN#
C3
BALL#
129
K1087
K445
105104103102101100999897969594939291908988
59
63626160
5758
5655
M6
N7G6H6N6
N5
L6
K6M5
50
52
5453
51
49484746
N3
L5
J6N4
M4
K5L4M3N2
H12
G13H7H8H13
J13H11
H10J12
143
147146145144
142141
140139
L13
J11
H9K13
K12
J10K11L12M13
134
138137136135
133132131130
8685
PIN#
4344
PIN#
N1L3
BALL# BALL#
N13
L11
128127
PIN#PIN# BALL#PIN# BALL#
Thermal Characteristics
Productization
Electrical Characteristics
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Package Data Sheets
B–4MicroStar BGA Packaging Reference Guide
' "" "" $ &
GHZ (S-PBGA-N151) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GHZ 151 TOP VIEW DAISY CHAIN NET LIST
GHZ 151 PIN ASSIGNMENT NET LIST
VINDEX MARK A
151413121110987654321
NC – E6
B C D E F G H J K L MN P R
B1–B2C1–E5D1–D3E3–E4F1–F4F3–G4G3–H4H1–H3J3–J4K3–K4K1–L4L3–M4M1–M3N3–N4N5–P3P1–P4
R3–R4T1–T3U1–V1U2–V2P5–V3T4–V4R5–T5R6–V6
R8–T7T8–V8R9–T9R10–T10R11–V10R12–T11T12–V12
R13–T13P13–T14R14–V14R15–T15T16–V16V17–V18U17–U18P14–T18R16–R18
N15–N18M15–N16L15–M16L16–L18K15–K16J15–J16
H15–J18
P15–P16R7–T6
G15–H16
C12–D11C13–D12A13–D13C14–D14A15–C15A16–E14A17–B17A18–B18C16–C18D15–D16E15–E18E16–F14F15–F16G16–G18
T U
161718
C10–D10
A5–C5C6–D6A7–C7C8–D7A9–D8C9–D9
A11–C11
A2–A3C3–D4C4–D5
PIN# BALL# BALL#PIN# BALL#PIN# BALL#PIN#
C10
K16
T9
J3
132
94
56
18
V1U1T1
383736
V18V17V16
767574
A18B18C18
114113112
N427
P131
T3R4R3P4
35343332
P3N5N3
302928
M1M3M4L3
26252423
L4K1K3K4
22212019
F15
R13
103
65
V1469
T16R15T15R14
73727170
T14P13T13
686766
E18107
C16D15D16E15
111110109108
E16F14F16
106105104
V12T12R12T11
64636261
R11V10T10R10
60595857
G18G16G15H16
10210110099
H15J18J16J15
98979695
151150
A2A3
D6141
A5145
149148147146
C3D4C4D5
144143142
C5E6C6
140139138137
A7C7D7C8
136135134133
D8A9C9D9
U17
U2
B2
77
39
1
H414
J4H3H1
171615
G3G4F3F1
13121110
D15
F4E3E4D3
9876
E5C1B1
432
R852
R9T8V8
555453
T7R7T6V6
51504948
L1590
K15L16L18
939291
M16M15N16N18
89888786
V443
R6T5R5T4
47464544
P5V3V2
424140
R1881
N15P16P15R16
85848382
P14T18U18
807978
B17115
D11128
131130129
D10C11A11
127126125124
C12D12C13A13
A15119
123122121
120
D13C14D14
C15
118117116
E14A16A17
PIN# BALL#
Thermal Characteristics
Productization
Electrical Characteristics
$
$#
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Package Data Sheets
B–5MicroStar BGA Packaging Reference Guide
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GGM (S-PBGA-N100) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGM 100 TOP VIEW DAISY CHAIN NET LIST
GGM 100 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
J KF G H
B9–A9B8–C8A8–B7A7–C7A6–B6C6–D6A5–B5C5–D5D4–A4
J9–J10H9–H8H10–G9G10–G8F10–F9F8–F7E10–E9E8–E7D7–D10
A3–B3A2–A1
C10–C9B10–A10
D9–D8 B4–C4
C D EA B
10
98
76
54321
J2–K2J3–H3K3–J4K4–H4K5–J5H5–G5K6–J6H6–G6G7–K7J7–H7
B2–B1C2–C3C1–D2D1–D3E1–E2E3–E4F1–F2F3–F4G4–G1G2–G3
K8–J8K9–K10
H1–H2J1–K1
NC – E5,E6,F5,F6
INDEX MARK
7980
787776
PIN# BALL#
94
99100
98979695
93929190898887868584838281
B9A9B8C8A8B7A7C7A6B6C6D6E6A5B5C5D5D4A4B4C4A3B3A2A1
PIN# BALL#
34
3940
3738
3635
BALL#
313233
30
2728
26
29
PIN#
54
5960
55565758
515253
50494847464544434241
PIN#
7475
73727170696867666564636261
B2B1C2C3C1D2D1D3E1E2E3E4E5F1F2F3F4G4G1G2G3H1H2J1K1
J2K2J3H3K3J4K4H4K5J5H5G5F5K6J6H6G6G7K7J7H7K8J8K9K10
123456789
10111213141516171819202122232425
BALL#
J9J10H9H8
H10G9
G10G8F10F9F8F7F6
E10E9E8E7D7
D10D9D8
C10C9B10A10
R (Ω) L (nH) C (pF)
Min. 0.071 1.999 0.296Mean 0.076 2.425 0.440Max. 0.081 2.957 0.589
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Package Data Sheets
B–6MicroStar BGA Packaging Reference Guide
' "" "" $ &
GGV (S-PBGA-N64) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGV 64 TOP VIEW DAISY CHAIN NET LIST
GGV 64 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.071 2.002 0.273Mean 0.076 2.544 0.380Max. 0.082 3.443 0.580
PIN# BALL# BALL#PIN# BALL#PIN# PIN#BALL#
1 – A12 – B13 – C24 – C15 – D46 – D37 – D18 – D29 – E210 – E111 – E312 – F113 – F214 – F315 – G116 – G2
17 – H118 – H219 – G320 – H321 – E422 – F423 – H424 – G425 – G526 – H527 – F528 – H629 – G630 – F631 – H732 – G7
33 – H834 – G835 – F736 – F837 – E538 – E639 – E840 – E741 – D742 – D843 – D644 – C845 – C746 – C647 – B848 – B7
49 – A850 – A751 – B652 – A653 – D554 – C555 – A556 – B557 – B458 – A459 – C460 – A361 – B362 – C363 – A264 – B2
G HE F
H8–G8F7–F8E5–E6E8–E7D7–D8D6–C8C7–C6B8–B7A8–A7B6–A6D5–C5A5–B5
C4–A3B3–C3A2–B2
B4–A4
65
87
CB DA
1234
INDEX MARK
A1–B1C2–C1D4–D3D1–D2E2–E1E3–F1F2–F3G1–G2H1–H2G3–H3E4–F4H4–G4
F5–H6G6–F6H7–G7
G5–H5
$
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B–7MicroStar BGA Packaging Reference Guide
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GGM (S-PBGA-N80) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGM 80 TOP VIEW DAISY CHAIN NET LIST
GGM 80 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.054 1.487 0.215Mean 0.062 1.920 0.315Max. 0.074 2.659 0.428
PIN# BALL# BALL#PIN# BALL#PIN# PIN# BALL#B2B1C2C3C1D2D1D3
J2K2J3H3K3J4K4H4
J9J10H9H8H10G9
G10G8
B9A9B8C8A8B7A7C7
12345678
2122232425262728
4142434445464748
6162636465666768
E2E3F1F2F3G1G2G3H1H2J1
J5H5K6J6H6K7J7H7K8J8K9
F9F8
E10E9E8
D10D9D8C10C9B10
B6C6A5B5C5A4B4C4A3B3A2
1011121314151617181920
3031323334353637383940
5051525354555657585960
7071727374757677787980
E1 K5 F10 A69 29 49 69
H J K
B9–A9B8–C8A8–B7A7–C7A6–B6C6–A5B5–C5
D E F G
J9–J10H9–H8H10–G9G10–G8F10–F9F8–E10E9–E8
A4–B4C4–A3B3–A2
D10–D9D8–C10C9–B10
10
87654321
9
A B C
B2–B1C2–C3C1–D2D1–D3E1–E2E3–F1F2–F3G1–G2G3–H1H2–J1
INDEX MARK
J2–K2J3–H3K3–J4K4–H4K5–J5H5–K6J6–H6K7–J7H7–K8J8–K9
##"
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Package Data Sheets
B–8MicroStar BGA Packaging Reference Guide
& !! !! #%
GGF (S-PBGA-N100) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGF 100 TOP VIEW DAISY CHAIN NET LIST
GGF 100 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.011 0.676 0.102Mean 0.022 1.026 0.172Max. 0.035 1.606 0.339
L MNP RF G H J K
P15–N14N15–M14M15–L14L15–K14K15–J14J15–H14G15–G14
E15–E14D15–D14C15–C14B15–A15
F15–F14
A14–B13A13–B12A12–B11A11–B10
A9–B8A7–B7A6–B6A5–B5A4–B4A3–B3A2–A1
A10–B9
15
13121110987654321
14
A B CD
B1–C2C1–D2D1–E2E1–F2F1–G2G1–H2J1–J2
L1–L2M1–M2N1–N2P1–R1
K1–K2
INDEX MARK
R2–P3R3–P4R4–P5R5–P6R6–P7R7–P8R9–P9R10–P10R11–P11R12–P12R13–P13R14–R15
NC–– H1, R8, H15, A8
E
B1C2C1D2D1E2E1F2F1G2G1H2H1J1J2K1K2L1L2M1M2N1N2P1R1
R2P3R3P4R4P5R5P6R6P7R7P8R8R9P9
R10P10R11P11R12P12R13P13R14R15
P15N14N15M14M15L14L15K14K15J14J15H14H15G15G14F15F14E15E14D15D14C15C14B15A15
A14B13A13B12A12B11A11B10A10B9A9B8A8A7B7A6B6A5B5A4B4A3B3A2
12345678910111213141516171819202122232425
26272829303132333435363738394041424344454647484950
51525354555657585960616263646566676869707172737475
767778798081828384858687888990919293949596979899
PIN# BALL# BALL#PIN# BALL#PIN# BALL#PIN#
100 A1
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Package Data Sheets
B–9MicroStar BGA Packaging Reference Guide
% "$
GGT (S-PBGA-N100) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGT 100 TOP VIEW DAISY CHAIN NET LIST
GGT 100 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.072 2.200 0.254Mean 0.077 2.636 0.398Max. 0.086 3.633 0.582
H J K L
K10J10H10G10F10
D11E9C11D8B11C8
F11
D E F GA CB
87
109
11
1
4
23
5
INDEX MARK
6
K2
H9
L8J7J8H8J9
K3K4K5K6L6
L11
E11E10D10D9C10C9
G11
K11J11G9F9
L1
K7K8L9K9
L7
L2L3L4J6L5
B2
G2H1H3J1
J3J4
F1
C2D2E2F2
L10
A1
G1G3H2H4J2K1
B1C1D1F3E1
NC – E3,J5,H11,A8
PIN#
12345678910
BALL#
11121314151617181920
34
3940
3738
3635
BALL#
313233
30
2728
25
26
29
2223
21
PIN#
24
54
5960
55565758
515253
504948474645
BALL#
44434241
PIN#
74
7980
787776
75
73727170696867666564636261
PIN# BALL#
94
99100
98979695
93929190898887868584838281
A1B2B1C2C1D2E3D1E2F3F2E1F1G1G2G3H1H2H3H4J1J2J3K1J4
L1K2L2K3L3K4J5L4K5J6K6L5L6L7L8K7J7K8J8L9H8K9J9
L10H9
L11K10K11J10J11H10H11G9
G10F9F10G11F11E11D11E10E9
D10C11D9D8C10B11C9C8
A11B10A10B9A9B8A8B7A7C7C6B6A6B5A5C5D4A4B4C4A3B3C3A2D3
""!%
$ $#
Package Data Sheets
B–10MicroStar BGA Packaging Reference Guide
' "" "" $ &
GGU (S-PBGA-N144) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGU 144 TOP VIEW DAISY CHAIN NET LIST
GGU 144 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical CharacteristicsR (Ω) L (nH) C (pF)
Min. 0.052 1.438 0.215Mean 0.055 1.958 0.305Max. 0.062 3.095 0.563
L M NG H J K
C6–D6A5–B5
C7–D7A6–B6
A13–A12
D9–C9
B8–A8B7–A7
B9–A9D8–C8
D10–C10B10–A10
B11–A11
F11–F10E13–E12
G11–G10F13–F12
N13–M13
J10–J11
H12–H13G12–G13
J12–J13H10–H11
K10–K11K12–K13
L12–L13
A2–B2
C5–D5
C4–A3B3–C3
A4–B4
B13–B12
E11–E10
D11–C13C12–C11
D13–D12
10111213
C D E F
6
A
1
4
23
5
B
87
9
INDEX MARK
L7–K7N8–M8L8–K8N9–M9
M3–N3K4–L4M4–N4K5–L5M5–N5K6–L6M6–N6M7–N7
N1–N2A1–B1
H3–H4J1–J2
G3–G4H1–H2
E4–E3
F2–F1G2–G1
E2–E1F4–F3
D4–D3D2–D1
C2–C1
L9–K9N10–M10L10–N11M11–L11
M1–M2
J3–J4
K3–L1L2–L3
K1–K2
N12–M12
A13
BALL#
B11A11
A12
C10
A10B10
D9
B9C9
D10
109
PIN#
111112
110N13
L13L12M13
114115116117118119
K13K12K11
J12J11J10
113K10
D8C8
A8
A7B7
B8
C7
A6D7
C6D6
B6
121122
124125126
123H11H10
G13G12H13H12
127128129
131132
130F13G10G11
F10F11F12
B5
D5C5
A4
C4B4
B3C3
B2A2
A3
134135136137138139
E10E11E12
D11D12D13
141142
144143
C11C12
B12B13
140C13
133 A5E13
120 A9J13
73
PIN#
7576
74
80
7879
818283
77
37383940
PIN#
424344454647
41
M5L5K5N4M4
K4L4
N2M3N3
N1
BALL#
A1
BALL#
C2C1
B11
432
PIN#
D3D2D1E4E3E2
876
11109
5 D4
8586
90
8889
87
919293
9596
94
51525354
4950
555657585960
L6K6
K8L8M8N8K7L7N7M7N6M6
9899
100101102103
105106
108107
104
626364656667
69707172
68L10M10N10K9L9M9
L11
M12N12
M11N11
N961 97
F4F3
F1G2G1
F21413
18171615
G3G4H1
H3H4
H2212019
242322
J2J3J4K1K2K3
282726
313029
L2L3
M2M1
3433
3635
32 L1
25 J1
N54812 E1 84
BALL#
$
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Package Data Sheets
B–11MicroStar BGA Packaging Reference Guide
) $$ $$ &"(!
GHH (S-PBGA-N179) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GHH 179 TOP VIEW DAISY CHAIN NET LIST
GHH 179 PIN ASSIGNMENT NET LISTThermal Characteristics
Productization
Electrical Characteristics
13121110987654321
A B C D E F G H J K L M NINDEX MARK
14
P
B2–B1
C3–C2
C1–D4
D3–D2
D1–E4
E3–E2
E1–F4
F3–F2
F1–F5
G5–G2
G1–G3
H3–H1
H2–H4
H5–J1
J2–J3
J4–K1
K2–K3
J5–L1
L2–L3
K4–M1
M2–K5
N1–P1
N2–P2
M3–N3
P3–L4
M4–N4
P4–L5
M5–N5
P5–L6
M6–N6
P6–K6
K7–N7
P7–M7
M8–P8
N8–L8
K8–P9
N9–M9
L9–P10
N10–M10
K9–P11
N11–M11
L10–P12
N12–K10
P13–P14
N13–N14
M12–M13
M14–L11
L12–L13
L14–K11
K12–K13
K14–J11
J12–J13
J14–J10
H10–H13
H14–H12
G12–G14
G13–G11
G10–F14
F13–F12
F11–E14
E13–E12
F10–D14
D13–D12
E11–C14
C13–E10
B14–A14
B13–A13
C12–B12
A12–D11
C11–B11
A11–D10
C10–B10
A10–D9
C9–B9
A9–E9
E8–B8
A8–C8
C7–A7
B7–D7
E7–A6
B6–C6
D6–A5
B5–C5
E6–A4
B4–C4
D5–A3
B3–E5
F6–A2
NC ––– D8,G4,H11,L7,A2
123456789101112131415161718192021222324252627282930
3132
PIN# BALL#
333435363738394041424344
BALL#PIN# PIN#BALL#PIN# BALL#
45464748495051525354555657585960
616263646566676869707172737475767778798081828384858687888990
919293949596979899
100101102103104105106107108109110111112113114115116117118119120
121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150
151152153154155156157158159160161162163164165166167168169170171172173174175176177178(179
B2B1C3C2C1D4D3D2D1E4E3E2E1F4F3F2F1F5G5G2G1G3G4H3H1H2H4H5J1J2
J3J4K1K2K3J5L1L2L3K4M1M2K5N1P1N2P2M3N3P3L4M4N4P4L5M5N5P5L6M6
N6P6K6K7N7P7M7L7M8P8N8L8K8P9N9M9L9
P10N10M10K9P11N11M11L10P12N12K10P13P14
N13N14M12M13M14L11L12L13L14K11K12K13K14J11J12J13J14J10H10H13H14H12H11G12G14G13G11G10F14F13
F12F11E14E13E12F10D14D13D12E11C14C13E10B14A14B13A13C12B12A12D11C11B11A11D10C10B10A10D9C9
B9A9E9E8B8A8C8D8C7A7B7D7E7A6B6C6D6A5B5C5E6A4B4C4D5A3B3E5F6 (ID ball))A2180
PIN# BALL#BALL#PIN#
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Package Data Sheets
B–12MicroStar BGA Packaging Reference Guide
) $$ $$ &"(!
GGW (S-PBGA-N176) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGW 176 TOP VIEW DAISY CHAIN NET LIST
GGW 176 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.075 1.595 0.204Mean 0.083 2.417 0.298Max. 0.099 3.284 0.425
UMN P R T
B5–C5C6–A5
A8–B8
A7–B7
A6–B6C7–D7
C8–D8
A9–D9C9–B9
A10–D10C10–B10
B12–A12A13–C12
B11–A11D11–C11
C13–B13B14–A14A15–C14
B3–A2C4–A3A4–B4
A16–B15
G H J KA B C D E F
109
11
141312
17
1516
7654321
INDEX MARK
8
N2–N3M3–N1
H1–H4
M1–M2L3–L4L1–L2K3–K4K1–K2J3–J2J1–J4H3–H2
G2–G1G4–G3F2–F1E1–F3E3–E2D2–D1C1–D3
T13–R13R12–U13U12–T12R11–P11U11–T11R10–P10U10–T10
U8–P8
U9–P9R9–T9
R8–T8
T7–U7P7–R7T6–U6U5–R6R5–T5T4–U4U3–R4
R2–T1P3–R1P1–P2
T15–U16R14–U15U14–T14
B1–C2 U2–T3
L
C16–B17D15–C17D17–D16E16–E15F15–E17
K17–K14
H17–H16
F17–F16G15–G14G17–G16H15–H14
J15–J16J17–J14K15–K16
L16–L17L14–L15M16–M17N17–M15N15–N16P16–P17R17–P15T17–R16
1234567891011121314151617181920212223242526272829303132333435
3637383940414243444546474849505152535455565758596061626364656667686970
7172737475767778798081828384858687888990919293949596979899
100101102103104105
106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
PIN# BALL# PIN#BALL# PIN# BALL# PIN# BALL# PIN# BALL#
A6B6C6
B5C5A4B4C4A3B3A2
A5
F17F16F15E17
T13R13U14T14
P3R1R2T1
E15D17D16D15C17C16
A16B15A15C14B14A14
B17
B13
A13C12B12A12D11C11B11A11A10D10C10B10
C13
U15T15U16T17R16R17
P16P17N15N16N17M15
P15
T3U3R4T4U4R5
U5R6T6U6P7R7
T5
M17L14L15L16L17K17
K14K15K16J17J14J15J16
T7U7U8P8R8T8U9P9R9T9
U10T10
P10R10
M16
U2
R14
E16
A9D9C9B9A8B8D8C8A7B7C7D7
H17H16H14H15G17G16G15G14
U11T11R11P11U12T12R12U13
B1C2C1D3
D1E3E2E1F3F2
G4G3G2G1H1H4
F1
H2J1J4J3J2K1K2K4K3L1L2L3L4
H3
D2
M1M2M3
N1N2N3P1P2
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Package Data Sheets
B–13MicroStar BGA Packaging Reference Guide
( ## ## %!'
GGW (S-PBGA-N208) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGW 208 TOP VIEW DAISY CHAIN NET LIST
GGW 208 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.070 1.824 0.217Mean 0.075 2.266 0.278Max. 0.079 3.416 0.433
R9–T9
U8–P9
R8–T8
U7–P8
R7–T7
U6–P7
R6–T6
U5–P6
R5–T5
U4–P5
R4–T4
U2–U3
T2–T3
R3–U1
R2–T1
P2–R1
P1–P3
N1–P4
N3–N2
M1–N4
M3–M2
L1–M4
L3–L2
K1–L4
K3–K2
J1–K4
J3–J2
H1–J4
H3–H2
G1–H4
G3–G2
F1–G4
F3–F2
E1–F4
E3–E2
D1–E4
D3–D2
B1–C1
B2–C2
1615
17
121314
11
BA
123456789
10
INDEX MARK
C3–A1
B3–A2
B4–A3
A4–C4
A5–D4
C5–B5
A6–D5
C6–B6
A7–D6
C7–B7
A8–D7
C8–B8
A9–D8
C9–B9
A10–D9
C10–B10
A11–D10
C11–B11
A12–D11
C12–B12
A13–D12
C13–B13
A14–D13
C14–B14
A16–A15
B16–B15
C15–A17
C16–B17
D16–C17
D17–D15
E17–D14
E15–E16
F17–E14
F15–F16
G17–F14
G15–G16
H17–G14
H15–H16
J17–H14
J15–J16
K17–J14
K15–K16
L17–K14
L15–L16
M17–L14
M15–M16
N17–M14
N15–N16
P17–N14
P15–P16
T17–R17
T16–R16
R15–U17
T15–U16
T14–U15
U14–R14
U13–P14
R13–T13
U12–P13
R12–T12
U11–P12
R11–T11
U10–P11
R10–T10
U9–P10
UTRPNMLKJHGFEDC
PIN# BALL#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PIN# BALL#PIN# BALL#PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL# PIN#BALL#
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
B2
C2
B1
C1
D3
D2
D1
E4
E3
E2
E1
F4
F3
F2
F1
G4
G3
G2
G1
H4
H3
H2
H1
J4
J3
J2
J1
K4
K3
K2
K1
L4
L3
L2
L1
M4
M3
M2
M1
N4
T2
T3
U2
U3
R4
T4
U4
P5
R5
T5
U5
P6
R6
T6
U6
P7
R7
T7
U7
P8
R8
T8
U8
P9
R9
T9
U9
P10
R10
T10
U10
P11
R11
T11
U11
P12
R12
T12
U12
P13
T16
R16
T17
R17
P15
P16
P17
N14
N15
N16
N17
M14
M15
M16
M17
L14
L15
L16
L17
K14
K15
K16
K17
J14
J15
J16
J17
H14
H15
H16
H17
G14
G15
G16
G17
F14
F15
F16
F17
E14
B16
B15
A16
A15
C14
B14
A14
D13
C13
B13
A13
D12
C12
B12
A12
D11
C11
B11
A11
D10
C10
B10
A10
D9
C9
B9
A9
D8
C8
B8
A8
D7
C7
B7
A7
D6
C6
B6
A6
D5
N3
N2
N1
P4
P1
P3
P2
R1
R2
T1
R3
U1
R13
T13
U13
P14
U14
R14
T14
U15
T15
U16
R15
U17
E15
E16
E17
D14
D17
D15
D16
C17
C16
B17
C15
A17
C5
B5
A5
D4
A4
C4
B4
A3
B3
A2
C3
A1
%%$!(
" ' '&
Package Data Sheets
B–14MicroStar BGA Packaging Reference Guide
) $$ $$ &"(!
GGW (S-PBGA-N240) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GGW 240 TOP VIEW DAISY CHAIN NET LIST
GGW 240 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
PIN#BALL#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PIN#BALL# PIN#BALL# PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL#
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
B2
C2
B1
C1
D3
D2
D1
E5
E4
E3
E2
E1
F5
F4
F3
F2
F1
G5
G4
G3
G2
G1
H5
H4
H3
H2
H1
J5
J4
J3
J2
J1
K5
K4
K3
K2
K1
L5
L4
L3
L2
L1
M5
M4
M3
M2
M1
N4
T2
T3
U2
U3
R4
T4
U4
N5
P5
R5
T5
U5
N6
P6
R6
T6
U6
N7
P7
R7
T7
U7
N8
P8
R8
T8
U8
N9
P9
R9
T9
U9
N10
P10
R10
T10
U10
N11
P11
R11
T11
U11
N12
P12
R12
T12
U12
P13
T16
R16
T17
R17
P15
P16
P17
N13
N14
N15
N16
N17
M13
M14
M15
M16
M17
L13
L14
L15
L16
L17
K13
K14
K15
K16
K17
J13
J14
J15
J16
J17
H13
H14
H15
H16
H17
G13
G14
G15
G16
G17
F13
F14
F15
F16
F17
E14
B16
B15
A16
A15
C14
B14
A14
E13
D13
C13
B13
A13
E12
D12
C12
B12
A12
E11
D11
C11
B11
A11
E10
D10
C10
B10
A10
E9
D9
C9
B9
A9
E8
D8
C8
B8
A8
E7
D7
C7
B7
A7
E6
D6
C6
B6
A6
D5
N3
N2
N1
P4
P1
P3
P2
R1
R2
T1
R3
U1
R13
T13
U13
P14
U14
R14
T14
U15
T15
U16
R15
U17
E15
E16
E17
D14
D17
D15
D16
C17
C16
B17
C15
A17
C5
B5
A5
D4
A4
C4
B4
A3
B3
A2
C3
A1
K15–K16
K13–K14
L16–L17
L14–L15
M17–L13
M15–M16
M13–M14
N16–N17
N14–N15
P17–N13
P15–P16
T17–R17
T16–R16
H3–H2
H5–H4
G2–G1
G4–G3
F1–G5
F3–F2
F5–F4
E2–E1
E4–E3
D1–E5
D3–D2
B1–C1
B2–C2
P2–R1
P1–P3
N1–P4
N3–N2
M1–N4
M3–M2
M5–M4
L2–L1
L4–L3
K1–L5
K3–K2
K5–K4
J2–J1
T14–U15
U14–R14
U13–P14
R13–T13
U12–P13
R12–T12
N12–P12
T11–U11
P11–R11
U10–N11
R10–T10
N10–P10
T9–U9
R8–T8
N8–P8
T7–U7
P7–R7
U6–N7
R6–T6
N6–P6
T5–U5
P5–R5
U4–N5
R4–T4
U2–U3
T2–T3
9
INDEX MARK
2345678
1615
17
121314
1110
EDCBA KJHGF
D16–C17
D17–D15
E17–D14
E15–E16
F17–E14
F15–F16
F13–F14
G16–G17
G14–G15
H17–G13
H15–H16
H13–H14
J16–J17
C10–B10
E10–D10
B11–A11
D11–C11
A12–E11
C12–B12
E12–D12
B13–A13
D13–C13
A14–E13
C14–B14
A16–A15
B16–B15
B4–A3
A4–C4
A5–D4
C5–B5
A6–D5
C6–B6
E6–D6
B7–A7
D7–C7
A8–E7
C8–B8
E8–D8
B9–A9
RPNML UT
J14–J15
K17–J13
J4–J3
H1–J5
R3–U1
R2–T1
R15–U17
T15–U16
P9–R9
U8–N9
C15–A17
C16–B17
D9–C9
A10–E9
C3–A1
B3–A2
&&%")
# ( !('
Package Data Sheets
B–15MicroStar BGA Packaging Reference Guide
( ## ## %!'
GHC (S-PBGA-N196) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GHC 196 TOP VIEW DAISY CHAIN NET LIST
GHC 196 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
R (Ω) L (nH) C (pF)
Min. 0.078 2.174 0.256Mean 0.092 3.288 0.470Max. 0.123 6.418 1.071
E6
C6
B6
A6
D6
E7
D7
B7
A7
C7
E8
BALL#
A12
C11A13
B11
A14
B12
B13
C12
C13
B14
D13
G13
G14
G12
H10
H12
H14
H13
H11
J10
J11
J14
M12
N12
P13
N11
M11
P12
L11
P11
N10
P10
M10
167
166
165
164
163
162
161
160
159
158
157
141
140
139
138
137
136
135
134
133
132
131
115
114
113
112
111
110
109
108
107
106
105
89
88
87
86
85
84
83
82
81
80
79
PIN#BALL#PIN#BALL#PIN#BALL#PIN#
C3
B3
A2
B4
C4
A3
D4
A4
B5
A5
C5
C8
A8
B8
D8
E9
D9
A9
B9
C9
E10
D10
C10
J13
J12
K10
K11
K12
K14
K13
L14
M14
L12
N14
L13
A10
B10
D12
C14
D11
D14
E13
E14
E12
E11
F10
F12
F13F14
F11
G10
P14
M13
179
178
177
176
175
174
173
172
171
170
169
156
155
154
153
152
151
150
149
148
147
146
145
144
143
130
129
128
127
126
125
124
123
122
121
120
119
118
117
104
103
102
101
100
99
98
97
96
95
94
93
92
91
D5A11G11N13 16814211690
L7
K6
L6
P6
N6
M6
K5
L5
M5
P5
N5
L1
K2
K1
K3
K4
J5
J3
J2
J1
J4
H5
E3
E1
E2
D1
C1
D3
B1
D2
A1
C2
B2
63
62
61
60
59
58
57
56
55
54
53
37
36
35
34
33
32
31
BALL#PIN#BALL#PIN#
30
29
28
27
11
10
9
8
7
6
5
4
3
2
1
BALL#PIN#
P4
P3
M4
P2
N4
P1
N3
N2
M3
M2
N1
L2
L10
K9
M9
N9
P9
L9
K8
L8
N8
P8
M8
K7
M7
P7
L3
M1
H4
H2
H1H3
G5
G3
G1
G2
G4
F5
F4
F1
F2
F3
78
77
76
75
74
73
72
71
70
69
68
67
66
65
52
51
50
49
48
47
46
45
44
43
42
41
40
39
26
25
24
23
22
21
20
19
18
17
16
15
14
13
N7L4E4 643812
Internal connection – E5,F6,F7,F8,F9,G6,G7,G8,G9,H6,H7,H8,H9,J6,J7,J8,J9
INDEX MARK
14
PNMLKJHGFEDCBA
13
12
11
10
9
8
7
6
5
4
2
1
3
C8A8
B8D8
E9D9
A9B9
C9E10
D10C10
J13J12
K10K11
K12K14
K13L14
M14L12
N14L13
P4P3
M4P2
N4P1
N3N2
M3M2
N1L2
B3A2
B4C4
A3D4
A4B5
A5C5
D5E6
C6B6
A6D6
E7D7
B7A7
C7E8
A10B10
A11A12
C11A13
B11A14
B12B13
C12C13
B14D13
D12C14
D11D14
E13E14
E12E11
F10F12
F13F14
F11G10
G11G13
G14G12
H10H12
H14H13
H11J10
J11J14
P14M13
N13M12
N12P13
N11M11
P12L11
P11N10
P10M10
L10K9
M9N9
P9L9
K8L8
N8P8
M8K7
M7P7
N7L7
K6L6
P6N6
M6K5
L5M5
P5N5
L3M1
L4L1
K2K1
K3K4
J5J3
J2J1
J4H5
H4H2
H1H3
G5G3
G1G2
G4F5
F4F1
F2F3
E4E3
E1E2
D1C1
D3B1
D2A1
C2B2
Internal connection – E5,F6,F7,F8,F9,G6,G7,G8,G9,H6,H7,H8,H9,J6,J7,J8,J9
NC – C3
%%$!(
" ' '&
Package Data Sheets
B–16MicroStar BGA Packaging Reference Guide
F10E10
B9
F9C9
E9A8
A9
F8
A7E8
C7
A6F7
B7
C8
E7C6A5F6
E6B5
A4
A3B4
B3
C3A2
C4
C5
B6
B8
225
228227
231232
230229
226
235234
239238237236
241
243242
246245244
240
250249248
251
253252
256255254
247
233
A18B18
B17
B16A17
A16C15
C16
B15
C14A15
E13
F12A14
B14
F13
B13A13E12C12
C13
A12
B11
E11C11
A10
C10B10
F11
A11
B12
E14
193
200199198197196195194
207206205204203202
214213212211210209208
221220219218217216
224223222
215
201
K15K14
J14J17J18
H19J15
J19
G19H15H14
F19G14G17G18
H17
F17E19
G15F18
F15E18F14
C19D18D19
B19C17
C18D17
E17
H18
161
168167166165164163162
175174173172171170
182181180179178177176
189188187186185184
192191190
183
169
V18V19
U18U19T18T19R17
T17
N14R18R19P17
N15P19M14
P18
N18N19M15M17
N17
M19
L18L17L15
K19K18K17
L14
L19
M18
P15
129
136135134133132131130
143142141140139138
150149148147146145144
157156155154153152
160159158
151
137
P10R10
V11
P11U11
R11W12V12U12P12
W13R12
U13
W14P13
V13
W11
R13U14W15P14V15R14
W16
W17V16
V17
U17W18
U16
U15
V14
97
1041031021011009998
111110109108107106
118117116115114113112
125124123122121120
128127126
119
105
W2V2
V3
V4W3
U5W4
U4
P7V5
U6W5
R7
P8W6
V6
V7W7R8U8
U7
W8
V9
R9U9
W10
U10V10
P9
W9
V8
R6
65
72717069686766
797877767574
86858483828180
939291908988
969594
87
73
L1
M1
K6K5
L2
L6L3
L5
N1
P1
R1
T1
U1
M3M6M5
N3N6
N2
N5P3
P6R2P5
T2
U2
U3V1
T3
R3
P2
M2
33
40393837363534
474645444342
54535251504948
616059585756
646362
55
41
B2B1
C2C1D2D1E3
D3
G6E2E1F3F2G5F1H6
G2G1H5H3
G3
H1J1J2J3J5J6K1K2K3
H2
F5
1
8765432
151413121110
22212019181716
292827262524
323130
23
9
* %% %% '#)"
GHK (S-PBGA-N257) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GHK 257 TOP VIEW DAISY CHAIN NET LIST
GHK 257 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
B2–B1
D3–C2
C1–D2
D1–E3
F5–G6
E2–E1
F3–F2
G5–F1
H6–G3
G2–G1
H5–H3
H2–H1
J1–J2
J3–J5
J6–K1
K2–K3
K5–K6
L1–L2
L3–L6
L5–M1
M2–M3
M6–M5
N1–N2
N3–N6
G
654321
A B C D E F H J K L M N P TR U V W
17
1516
1413121110
987
1918
V1–U3
T3–U2
T2–U1
R3–T1
R2–P5
R1–P6
N5–P3
P1–P2
V16–W17
W18–U17
U16–V17
U15–W16
V15–R14
W15–P14
R13–U14
W14–V14
U13–P13
W13–V13
P12–R12
V12–U12
R11–W12
U11–P11
W11–V11
R10–P10
V10–U10
P9–W10
U9–R9
W9–V9
W4–U5
V8–W8
R8–U8
V7–W7
P8–U7
R6–P7
V5–W5
U6–V6
R7–W6
U4–V3
W3–V4
V2–W2
B19–C17
D17–C18
D18–C19
E17–D19
E18–F15
E19–F14
G15–F17
F19–F18
G17–G14
G19–G18
H14–H15
H18–H17
J15–H19
J17–J14
J19–J18
K15–K14
K18–K17
L14–K19
L17–L15
L19–L18
M18–M19
M15–M17
N18–N19
M14–N17
N15–P19
P17–P18
R18–R19
P15–N14
T19–R17
U19–T18
T17–U18
V18–V19
B4–A3
A2–C3
C4–B3
C5–A4
B5–E6
A5–F6
E7–C6
A6–B6
C7–F7
A7–B7
F8–E8
B8–C8
E9–A8
C9–F9
A9–B9
E10–F10
B10–C10
F11–A10
C11–E11
A11–B11
A16–C15
B12–A12
E12–C12
B13–A13
F12–C13
E13–A14
C14–B14
B15–A15
E14–F13
A17–B16
C16–B17
B18–A18
NC–E5
INDEX MARK
ID BALL – E5
PIN#BALL# PIN#BALL# PIN#BALL# PIN#BALL# PIN#BALL# PIN#BALL# PIN#BALL# PIN#BALL#
'' &
#*
$! ) " )(
Package Data Sheets
B–17MicroStar BGA Packaging Reference Guide
F9
B9
E9
D9
A9
E10
D10
A8
F8
B8
E8
A7
G7
D8
D7
B7
E7
A6
D6
B6
F7
F6
E6
A5
D5
B4
A4
B5
D4
A3
B3
A2
231
230
229
228
227
226
225
238
237
236
235
234
233
232
245
244
243
242
241
240
239
252
251
250
249
248
247
246
256
255
254
253
A17
A18
B18
D15
B16
A16
B17
A15
B15
E15
B14
A14
D14
E14
B13
E13
F13
A12
F12
D13
A13
E12
D12
B12
E11
B11
A11
D11
A10
F10
F11
B10
193
195
194
197
199
198
196
200
201
206
205
204
203
202
211
213
212
210
209
208
207
215
214
216
218
219
217
220
221
224
223
222
J14
K15
K16
J15
J16
J18
J19
H18
H19
H14
G19
G13
H15
H16
G15
G16
G18
F16
F18
F19
G14
E19
F14
F15
D18
D19
E16
E18
C18
D16
C19
B19
163
162
161
167
166
165
164
170
169
168
174
173
172
171
177
176
175
181
180
179
178
184
183
182
188
187
186
185
191
190
189
192
U19
V19
V18
R16
T18
T19
U18
R18
R19
R15
P18
P19
P16
P15
N18
N15
N14
M19
M14
N16
N19
M15
M16
M18
L15
L18
L19
L16
K19
K14
L14
K18
131
130
129
135
134
133
132
138
137
136
142
141
140
139
145
144
143
149
148
147
146
152
151
150
156
155
154
153
159
158
157
160
P11
R10
T10
R11
T11
V11
W11
V12
W12
P12
W13
N13
R12
T12
R13
T13
V13
T14
V14
W14
P13
W15
P14
R14
V16
W16
T15
V15
V17
T16
W17
W18
99
98
97
103
102
101
100
106
105
104
110
109
108
107
113
112
111
117
116
115
114
120
119
118
124
123
122
121
127
126
125
128
W3
W2
V2
V4
T5
W4
V3
V5
W5
R5
V6
W6
T6
R6
V7
R7
P7
W8
P8
T7
W7
R8
T8
V8
R9
V9
W9
T9
W10
P10
P9
V10
67
66
65
71
70
69
68
74
73
72
78
77
76
75
81
80
79
85
84
83
82
88
87
86
92
91
90
89
95
94
93
96
L6
K5
K4
L5
L4
L2
L1
M2
M1
M6
N1
N7
M5
M4
N5
N4
N2
P4
P2
P1
N6
R1
P6
P5
T2
T1
R4
R2
U2
T4
U1
V1
35
34
33
39
38
37
36
42
41
40
46
45
44
43
49
48
47
53
52
51
50
56
55
54
60
59
58
57
63
62
61
64
3
2
1
7
6
5
4
10
9
8
14
13
12
11
17
16
15
21
20
19
18
24
23
22
28
27
26
25
31
30
29
32
C1
B1
B2
E4
D2
D1
C2
E2
E1
E5
F2
F1
F4
F5
G2
G5
G6
H1
H6
G4
G1
H5
H4
H2
J5
J2
J1
J4
K1
K6
J6
K2
* %% %% '#)"
GJG (S-PBGA-N257) PLASTIC BALL GRID ARRAY
NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. MicroStar BGA configuration
MicroStar BGA is a trademark of Texas Instruments.
GJG 257 TOP VIEW DAISY CHAIN NET LIST
GJG 257 PIN ASSIGNMENT NET LIST
Thermal Characteristics
Productization
Electrical Characteristics
INDEX MARK G
654321
A B C D E F H J K L M N P TR U V W
17
1516
1413121110
987
1918
B2–B1
C1–C2
D1–D2
E4–E5
E1–E2
F5–F4
F1–F2
G6–G5
G2–G1
G4–H6
H1–H2
H4–H5
J4–J1
J2–J5
J6–K6
K1–K2
K4–K5L6–L1
L2–L4
L5–M6
M1–M2
M4–M5
N7–N1
N2–N4
U2–V1
U1–T4
T1–T2
R2–R4
P6–R1
P4–P5
P1–P2
N5–N6
W16–V16
V17–W18
W17–T16
V15–T15
P14–W15
T14–R14
W14–V14
R13–P13
V13–T13
N13–W13
T12–R12
W12–V12
R11–P12
V11–T11
P11–W11
T10–R10
W10–V10
P9–P10
V9–R9
T9–W9
T5–R5
T8–R8
W8–V8
T7–P8
V7–W7
W5–V5
R6–T6
W6–V6
P7–R7
W3–V3
W4–V4
V2–W2
C18–B19
C19–D16
D19–D18
E18–E16
F14–E19
F16–F15
F19–F18
G15–G14
G18–G16
G13–G19
H16–H15
H19–H18
J15–H14
J18–J16
J14–J19
K16–K15
K19–K18
L14–K14
L18–L15
L16–L19
M16–M15
M19–M18
N16–M14
N18–N19
N14–N15
P19–P18
P15–P16
R19–R18
R16–R15
T19–T18
U19–U18V18–V19
A4–B4
B3–A2
A3–D4
B5–D5
F6–A5
D6–E6
A6–B6
E7–F7
B7–D7
G7–A7
D8–E8
A8–B8
E9–F8
B9–D9
F9–A9
D10–E10
A10–B10
F11–F10
B11–E11
D11–A11
D15–E15
D12–E12
A12–B12
D13–F12
B13–A13
F13–E13
A14–B14
E14–D14
A15–B15
A16–B16
A17–B17
B18–A18
ID BALL–C3
1PIN MARK – C3
PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL# PIN# BALL# PIN#BALL# PIN#BALL#
'' &
#*
$! ) " )(
Package Data Sheets
B–18MicroStar BGA Packaging Reference Guide
Notes
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