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MICROELECTRONICS ELCT 703 (W19)
LECTURE 4 OP-AMP DESIGN
Dr. Eman Azab
Assistant Professor
Office: C3.315
E-mail:
eman.azab@guc.edu.egDR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
1
OP-AMPS: INTRODUCTIONCircuit Modeling
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
2
IDEAL OP-AMP Operational amplifiers are voltageamplifiers with very high gain
Differential Input/Single output circuitis the most famous op-amp structure
Ideal op-amp have the followingSpecs:
Infinite Differential voltage gain
Zero Common-mode voltage gain
Infinite Input Resistance
Zero Input Currents
Zero Output Resistance
Infinite Bandwidth (Gain is constant all over thefrequency Spectrum)
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
3
πππ’π‘ = π΄ππ π1 β π2 + π΄ππππ1 + π2
2
π΄ππ = β π΄πππ = 0
π ππ = β π ππ’π‘ = 0
π΄ππ π = πΆπππ π‘.
πππ+ = 0 πππβ = 0
IDEAL OP-AMP Ideal Op-amp can be modeled usingthe following circuit:
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
4
Figure from Sedra/Smith Copyright Β© 2010 by Oxford University Press, Inc.
πππ’π‘ = π΄ππ π1 β π2 + π΄ππππ1 + π2
2
π΄ππ = β π΄πππ = 0
π ππ = β π ππ’π‘ = 0
π΄ππ π = πΆπππ π‘.
πππ+ = 0 πππβ = 0
EX.: TWO STAGE CMOS OP-AMP
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
5
Figure from Sedra/Smith Copyright Β© 2010 by Oxford University Press, Inc.
EX.: BJT 741 OP-AMP
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
6
CMOS TWO-STAGE OP-AMP
Circuit Realizations of
Op-amp
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
7
CALCULATING THE VOLTAGE GAIN The two stages are realized using MOS transistors asfollows:
First stage amplifier is a differential amplifier: Q1-Q2 with active loadsQ3-Q4 and biasing current source Q5- Q8
Second stage amplifier is a Common Source amplifier Q6 with activeload Q7
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
8
CALCULATING THE VOLTAGE GAIN The two stage CMOS op-amp can be modeled as follows:
Gm1 & Gm2 is the trans-conductance gains of the 1st and 2nd stage
respectively
R1 & R2 is the output resistances of the 1st and 2nd stage respectively
C1 & C2 is the parasitic capacitances of the 1st and 2nd stage respectively
Cc is used as a compensation capacitance to control the bandwidth
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
9
Figure from Sedra/Smith Copyright Β© 2010 by Oxford University Press, Inc.
CALCULATING THE VOLTAGE GAIN The model parameters are derived at the mid-band (Allcapacitors are open circuit)
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
10
ππ1 = βππ1,2π 1 π1 β π2
π 1 = πππ 2 ββ πππ 4
πππ’π‘ = βππ6π 2ππ1
π 2 = πππ 6 ββ πππ 7
πΊπ1 = ππ1,2
πΊπ2 = ππ6
π΄ππ = ππ1,2ππ6π 1π 2
CALCULATING THE VOLTAGE GAIN Op-amp High frequency gain is given by:
The transfer function is characterized by two poles and onezero
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
11
π΄ππ π =πΊπ1πΊπ2π 1π 2 1 β
πΆππΊπ2
π
1 + π πΆπΆ + πΆ2 π 2 + πΆπΆ + πΆ1 π 1 + πΊππ 1π 2πΆπΆ + π 2π 1π 2 πΆπΆπΆ1 + πΆπΆπΆ2 + πΆ1πΆ2
CALCULATING THE VOLTAGE GAIN Op-amp High frequency gain is given by:
CC controls the bandwidth of the op-amp!
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
12
π΄ππ π =π΄ππ 1 β
π ππ§
1 +π ππ1
1 +π ππ2
π΄ππ = πΊπ1πΊπ2π 1π 2
ππ§ =πΊπ2
πΆπππ1 β
1
πΊπ2π 1π 2πΆπ
ππ2 β πΊπ2πΆπ
πΆ1πΆ2 + πΆπΆ πΆ1 + πΆ2β
πΊπ2
πΆ1 + πΆ2
NON-IDEAL OP-AMP
Deviation of the real op-amp from Ideal behavior:
Rin: finite input Resistance
Rout: finite output Resistance
AVd(S): finite frequency dependent voltage gain
IBIAS, IOS, VOS : represent offset currents and voltage respectively
Due to mismatch of transistors and transistors biasing
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
13
Figure from Gray/Meyer Copyright Β© by John Wiley & Sons, Inc.
πΌπ΅πΌπ΄π =πΌπ΅1 + πΌπ΅2
2
πΌππ = πΌπ΅1 β πΌπ΅2
πππ = πππ’π‘ @πππ = 0
NON-IDEAL OP-AMP
Deviation of the real op-amp fromIdeal behavior:
Finite Common mode rejection ratio (CMRR)
Finite Power Supply Rejection Ratio (PSRR+
and PSRR-)
A+ and A- is the small signal gain between vout and vddand vss respectively
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
14
Figure from Gray/Meyer Copyright Β© by John Wiley & Sons, Inc.
πΆππ π =π΄πππ΄ππ
πππ π + =π΄πππ΄+
πππ π β =π΄πππ΄β
NON-IDEAL OP-AMP Modeling of the Deviation of the real op-amp from Idealbehavior:
DR. EMAN AZAB
ELECTRONICS DEPT., FACULTY OF IET
THE GERMAN UNIVERSITY IN CAIRO
15
Figure from Gray/Meyer Copyright Β© by John Wiley & Sons, Inc.
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