hercules overview
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8/3/2019 Hercules Overview
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Overview
Texas Instruments
Hercules Family
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8/3/2019 Hercules Overview
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Hercules Family
Suited for applications with IEC 61508 SIL-3and other standards
Hardware safety functions
Processor BIST
Memory Protection ( MPU + ECC/ Parity )
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Roadmap
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Families
TMS470M Family Cortex M3 @ 80 MHz Value ( ABS, Passive Safety )
Hercules TMS570LS Safety MCU family 280 DMIPS @ 180 MHz Transportation, Medical IEC 61508 SIL-3 Certified
Hercules RM4x Safety MCU family 350 DMIPS @ 220MHz Industrial, medical
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Hercules RM4x Safety MCU family
350 DMIPS
Up to 220MHz ,floating point
Industrial, medical Ethernet, CAN
Lock-Step CPUs / fail safe detection logic
Applications : Safe PLCs Case study :RM48Lx30
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http://www.ti.com/lit/ds/spns176/spns176.pdfhttp://www.ti.com/lit/ds/spns176/spns176.pdf -
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Hercules RM4x Safety MCU family
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ARM Cortex-R4
Thumb-2 instructions
MPU with 12 regions
Optional Parity and ECC on all RAMs
Launched in May 2006
Binary compatibility with ARM9 &ARM11
320DMPIS@200Mhz
8 Stage Pipeline
http://www.arm.com/products/processors/cortex-r/cortex-r4.php
Hercules RM4x Safety MCU family
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http://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.php -
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Architecture RM48Lx30
3MB Flash
256KB RAM
2 N2HET ( Next Generation End Timer )
44 IO / 2 x 24 Channel 12 Bit ADC
I2C, DCANs SPI, MibSPI, LIN, SCI
Hercules RM4x Safety MCU family
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Safety Architecture
Dual CPUs in lockstep
CPU and Memory BIST
ECC Flash & SRAM Parity on peripheral memories
Loop back capability on Ios
ECLK frequency external indicator MPU built into DMA
ESM Error Signaling Module
Hercules RM4x Safety MCU family
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Compatible Operating Systems I
Sciopta Real-Time Operating Systems Safe Memory Management
No Shared Memory
Safety-Certified Data Transfer SIL3
http://www.sciopta.com/products/safetykrn.html
Micrim C/OS-II Kernel SIL3/SIL4
http://micrium.com/page/products/rtos/os-ii
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http://www.sciopta.com/products/safetykrn.htmlhttp://micrium.com/page/products/rtos/os-iihttp://micrium.com/page/products/rtos/os-iihttp://micrium.com/page/products/rtos/os-iihttp://micrium.com/page/products/rtos/os-iihttp://www.sciopta.com/products/safetykrn.html -
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Compatible Operating Systems II
WITTENSTEIN SAFERTOS
First certified by TV SD in 2007 : SIL 3
LM3S9B96 supplied with SAFERTOS in ROM
Full life cycle evidence
Design History File
http://www.wittenstein-us.com/Embedded-
RTOS/SAFERTOS.html
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http://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.html -
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Software Development for Safety
http://www.ti.com/lit/wp/spry180/spry180.pdf
Using a OS, software cycle can be reused from itto application software cycle
Use of COTS HW/SW to achieve SIL 3 and evenSIL4
Commercial products using only C to implement
RTOS RTOS can address the risks of using C
Application Compiler x OS Compiler Issue
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http://www.ti.com/lit/wp/spry180/spry180.pdfhttp://www.ti.com/lit/wp/spry180/spry180.pdf -
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HAL Code Generator tool
IO pin configuration via graphical interface
Check out the demo in site:
http://www.ti.com/tool/halcogen Example Given :
Change PLL setting without rewriting code
http://www.ti.com/lit/an/spna121a/spna121a.pdf
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http://www.ti.com/tool/halcogenhttp://www.ti.com/tool/halcogenhttp://www.ti.com/lit/an/spna121a/spna121a.pdfhttp://www.ti.com/lit/an/spna121a/spna121a.pdfhttp://www.ti.com/lit/an/spna121a/spna121a.pdfhttp://www.ti.com/lit/an/spna121a/spna121a.pdfhttp://www.ti.com/tool/halcogenhttp://www.ti.com/tool/halcogen -
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Evaluation Material Founded
Evaluation Kit
RM48L950
Full Schematics
Code Composer Studio v4.x HALCoGen
http://www.ti.com/tool/tmdxrm48hdk
$199.00
Demo examples
Evaluation Stick
RM48L950
Code Composer Studio v4.x
HALCoGen http://www.ti.com/tool/tm
dxrm48usb#descriptionArea
$79.00
Demo examples
Similar Prices for other Families
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http://www.ti.com/tool/tmdxrm48hdkhttp://www.ti.com/tool/tmdxrm48hdkhttp://www.ti.com/tool/tmdxrm48usbhttp://www.ti.com/tool/tmdxrm48usbhttp://www.ti.com/tool/tmdxrm48usbhttp://www.ti.com/tool/tmdxrm48usbhttp://www.ti.com/tool/tmdxrm48usbhttp://www.ti.com/tool/tmdxrm48hdkhttp://www.ti.com/tool/tmdxrm48hdk -
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Bibliography
http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931
http://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.html
http://www.ti.com/lit/wp/spry180/spry180.p
df http://www.arm.com/products/processors/co
rtex-r/cortex-r4.php
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http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.ti.com/lit/wp/spry180/spry180.pdfhttp://www.ti.com/lit/wp/spry180/spry180.pdfhttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.arm.com/products/processors/cortex-r/cortex-r4.phphttp://www.ti.com/lit/wp/spry180/spry180.pdfhttp://www.ti.com/lit/wp/spry180/spry180.pdfhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://www.wittenstein-us.com/Embedded-RTOS/SAFERTOS.htmlhttp://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931http://focus.ti.com/mcu/docs/mcuprodoverview.tsp?sectionId=95&tabId=2835&familyId=1931
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