efficient pattern matching algorithm for memory architecture

Author : Cheng-Hung Lin , Shih-Chieh ChangPublisher ： Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Efficient Pattern Matching Algorithm

for Memory Architecture

In order to accommodate the increasing number of attack patterns and meet the throughput requirement of networks, a successful network intrusion detection system must have a memory-efficient pattern-matching algorithm and hardware design.

This paper presented a memory-efficient pattern matching algorithm which can significantly reduce the number of states and transitions by merging pseudo-equivalent states while maintaining correctness of string matching. In addition, the new algorithm is complementary to other memory reduction approaches and provides further reductions in memory needs.

更改 match vector 成 pathVec 與 ifFinal ,

define similar states as pseudo-equivalent states(have identical input transitions , failure

transitions, and ifFinal bit , but different next states.)

Add a register, called preReg

Example two patterns, “abcdefghijklm” and

“abcwsghidefxyklm.”label the substrings “abc”, “def”, “ghi”, and “klm” as “α” ”β” ”γ” ”δ” Pattern become” αβγjδ” and “αwsγβxyδ”Longest common subsecquence between two patterns are “ α β δ ” or ” α γ δ ”Calculate largest sharing gain