ece 2372 modern digital system design section 4.2 decoders 1
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Decodersn – 2n Decoder: n-input lines (n-bit word input) and 2n output lines. For each possible word, one (and only one) output is asserted to a logical 1, all other lines will remain at logical 0.
x0 y0
x1
xn
y1
y2n 1
n – 2n Decoder
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DecodersParallel 2-Bit Decoder (with inputs A and B, and outputs m0, m1, m2, and m3) is described by the
truth table: A m0 B m1 2 – 4
Decoder m2 m3
B A m0 m1 m2 m3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1
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DecodersB A m0 m1 m2 m3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1
m0 = B–
A–
m1 = B–
A
m2 = B A–
m3 = B A
5
Decoders• Enable Controls provide a
selection to either inhibit (disable) or allow (enable) the decoder output.
m0 = B–
A–
E
m1 = B–
A E
m2 = B A–
E
m3 = B A E
m 0 m 0
A B
m 1 m 0
m 2 m 0
m 3 m 0
E 7
74139 2-Line-to-4-Line Decoder/Demultiplexer
A B
G
Y0 Y1 Y2 Y3
74139
Enable Select Outputs G B A Y0 Y1 Y2 Y3 L L L L H H H L L H H L H H L H L H H L H L H H H H H L H H H H H
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74138 3-Line-to-8-Line Decoder/Demultiplexer
Enable Select Outputs G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H L L L L L L H H H H H H H H L L L L H H L H H H H H H H L L L H L H H L H H H H H H L L L H H H H H L H H H H H L L H L L H H H H L H H H H L L H L H H H H H H L H H H L L H H L H H H H H H L H H L L H H H H H H H H H H L H H H H H H H H H H H H H H H H H H L H H H H H H H H
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74154 4-Line-to-16-Line Decoder/Demultiplexer
A B
G1
Y0 Y1 Y2 Y3
74154
Y4 Y5 Y6 Y7
G2
C D
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
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74154 4-Line-to-16-Line Decoder/Demultiplexer
En Select Outputs G1
G2
D C B A 0 1 2 3 4 5 6 7 8 9 10
11
12
13
14
15
L L L L L L L H H H H H H H H H H H H H H H L L L L L H H L H H H H H H H H H H H H H H L L L L H L H H L H H H H H H H H H H H H H L L L L H H H H H L H H H H H H H H H H H H L L L H L L H H H H L H H H H H H H H H H H L L L H L H H H H H H L H H H H H H H H H H L L L H H L H H H H H H L H H H H H H H H H L L L H H H H H H H H H H L H H H H H H H H L L H L L L H H H H H H H H L H H H H H H H L L H L L H H H H H H H H H H L H H H H H H L L H L H L H H H H H H H H H H L H H H H H L L H L H H H H H H H H H H H H H L H H H H L L H H L L H H H H H H H H H H H H L H H H L L H H L H H H H H H H H H H H H H H L H H L L H H H L H H H H H H H H H H H H H H L H L L H H H H H H H H H H H H H H H H H H H L H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H 26
Applications of Decoders • Implementing Logic Functions Using Decoders:• The Decoder selects an output line corresponding
to the minterm represented by the binary value of the input word.
• This can be used to implement any switching function, often with fewer integrated circuits.
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Applications of Decoders• Consider the (simplified) 3-Line-to-8-Line
Decoder and the switching function:
A m0 B C
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
a b c m2
m3
m4
m5 m6
m7
m1
f (c, b, a) = m1 + m4 + m6
f (c, b, a) = m1 + m4 + m6
f (c, b, a) = m1 m4 m6
f (c, b, a) = m1 m4 m6
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Applications of Decoders
f (c, b, a) = m1 + m4 + m6 = m1 m4 m6
f (c, b, a)
A B C
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
a b c
m4
m6
m1
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Applications of Decoders• Consider the (simplified) 3-Line-to-8-Line
Decoder and the switching function:
f (c, b, a) = M2 M5 M7 M0 M1 M2 M3 M4 M5 M6 M7
A B C
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
a b c
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Applications of Decoders• Recall, the 4-person vote-tallying machine may be
implemented by:
T = m3 + m5 + m6 + m9 + m10 + m12
P = m7 + m11 + m13 + m14 + m15
F = m0 + m1 + m2 + m4 + m8
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Applications of Decoders• Address Decoding: One of 2n – 1 devices is
selected when the address of that device is broadcast over a common data bus and decoded by the decoder.
A0
Device 0
A1 An
n – 2n Decoder
Data Bus
Device 1
Device 2n 1
34
Applications of Decoders• BCD to Decimal Decoders: The input is a BCD
word (DCBA), the output is one of the output lines (Y0 – Y9). The inputs are related to the outputs by
the truth table (note don’t-cares).
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D C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1
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Applications of Decoders• Display Decoders: LED displays require
decoders to illuminate the appropriate LED for a given code word.
• An LED emits light when it is forward biased and current flows from anode to cathode. Typically a current limiting resistor must be included in series with the LED.
R
V i
+
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Applications of Decoders• A number of LEDs (as in a display) may be
connected common anode (LEDs illuminate with logical 0 input).
+VCC
a b c d e f g
38
Applications of Decoders• A number of LEDs (as in a display) may be may
be connected common cathode (LEDs illuminate with logical 1 input).
a b c d e f g
39
Applications of Decoders• In a seven-segment display the individual LEDs
are arranged:
a
b
c d
e
f g
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Inputs Outputs X3 X2 X1 X0 a b c d e f g 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 0 1 1 0 0 0 0 0 0 1 0 1 1 0 1 1 0 1 0 0 1 1 1 1 1 1 0 0 1 0 1 0 0 0 1 1 0 0 1 1 0 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 0 1 0 x x x x x x x 1 0 1 1 x x x x x x x 1 1 0 0 x x x x x x x 1 1 0 1 x x x x x x x 1 1 1 0 x x x x x x x 1 1 1 1 x x x x x x x 42
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