boolean logic

Post on 24-Jan-2016

57 Views

Category:

Documents

0 Downloads

Preview:

Click to see full reader

DESCRIPTION

Boolean logic. Introduction to Computer Yung-Yu Chuang. with slides by Sedgewick & Wayne ( introcs.cs.princeton.edu ), Nisan & Schocken ( www.nand2tetris.org ) and Harris & Harris (DDCA). Boolean Algebra. Based on symbolic logic, designed by George Boole - PowerPoint PPT Presentation

TRANSCRIPT

Boolean logic

Introduction to ComputerYung-Yu Chuang

with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken (www.nand2tetris.org) and Harris & Harris (DDCA)

2

Boolean Algebra

Based on symbolic logic, designed by George BooleBoolean variables take values as 0 or 1.Boolean expressions created from:

NOT, AND, OR

3

NOT

NOT

Digital gate diagram for NOT:

X X’

4

AND

AND

Digital gate diagram for AND:

XY XY

5

OR

OR

Digital gate diagram for OR:

X+Y

6

Operator PrecedenceExamples showing the order of operations: NOT > AND > OR

Use parentheses to avoid ambiguity

7

Defining a function

Description: square of x minus 1Algebraic form : x2-1Enumeration:

x f(x)

1 0

2 3

3 8

4 15

5 24

: :

8

Defining a function

Description: number of days of the x-th month of a non-leap yearAlgebraic form: ?Enumeration:

x f(x)1 312 283 314 305 316 307 318 319 30

10 3111 3012 31

9

Truth Table

Truth table. Systematic method to describe Boolean

function. One row for each possible input combination. N inputs 2N rows.

AND truth table

0 0

0 1

1 0

1 1

0

0

0

1

x y x y

10

Proving the equivalence of two functions

Prove that x2-1=(x+1)(x-1)

Using algebra: (you need to follow some rules) (x+1)(x-1) = x2+x-x-1= x2-1

Using enumeration: x (x+1)(x-1)

x2-1

1 0 0

2 3 3

3 8 8

4 15 15

5 24 24

: : :

11

Important laws

x + 1 = 1 x + 0 = xx + x = 1

x . 1 = xx . 0 = 0x . x = 0

DeMorgan Law

x . y = x + y

x + y = y + x x + (y+z) = (x+y) + z

x . y = y . xx . (y . z) = (x . y) .z

x . (y+z) = xy + xz

Chapter 2 <12>

• Y = AB + AB

Simplifying Boolean EquationsExample 1:

Chapter 2 <13>

• Y = AB + AB = B(A + A) = B(1) = B

Simplifying Boolean EquationsExample 1:

Chapter 2 <14>

• Y = A(AB + ABC)

Example 2:

Simplifying Boolean Equations

Chapter 2 <15>

• Y = A(AB + ABC) = A(AB(1 + C)) = A(AB(1)) = A(AB)

= (AA)B = AB

Example 2:

Simplifying Boolean Equations

Chapter 2 <16>

• Y = AB = A + B

• Y = A + B = A B

AB

Y

AB Y

AB

Y

AB Y

DeMorgan’s Theorem

Chapter 2 <17>

• Backward:– Body changes– Adds bubbles to inputs

• Forward:– Body changes– Adds bubble to output

AB

YAB

Y

AB

YAB

Y

Bubble Pushing

Chapter 2 <18>

AB

YCD

• What is the Boolean expression for this circuit?

Bubble Pushing

Chapter 2 <19>

AB

YCD

• What is the Boolean expression for this circuit?

Y = AB + CD

Bubble Pushing

Chapter 2 <20>

AB

C

D

Y

• Begin at output, then work toward inputs

• Push bubbles on final output back

• Draw gates in a form so bubbles cancel

Bubble Pushing Rules

Chapter 2 <21>

AB

C Y

D

Bubble Pushing Example

Chapter 2 <22>

AB

C Y

D

no outputbubble

Bubble Pushing Example

Chapter 2 <23>

bubble oninput and outputA

B

C

D

Y

AB

C Y

D

no outputbubble

Bubble Pushing Example

Chapter 2 <24>

AB

C

D

Y

bubble oninput and outputA

B

C

D

Y

AB

C Y

D

Y = ABC + D

no outputbubble

no bubble oninput and output

Bubble Pushing Example

25

Truth Tables (1 of 3)

A Boolean function has one or more Boolean inputs, and returns a single Boolean output.A truth table shows all the inputs and outputs of a Boolean function

Example: X Y

26

Truth Tables (2 of 3)

Example: X Y

27

Truth Tables (3 of 3)

When s=0, return x; otherwise, return y.

Example: (Y S) (X S)

Two-input multiplexer

28

Truth Table for Functions of 2 Variables

Truth table. 16 Boolean functions of 2 variables.

ZERO

Truth table for all Boolean functions of 2 variables

y

0 0

0 1 0

1 0 0

1 1 0

0

0

1

0

0

1

0

0

x

0

0

1

1

AND

0

0

0

1

y

0

1

0

1

XOR

0

1

1

0

OR

0

1

1

1

x

0

NOR

Truth table for all Boolean functions of 2 variables

y

0 1

0 1 0

1 0 0

1 1 0

y'

1

0

1

0

x'

1

1

0

0

1

0

1

1

EQ

1

0

0

1

1

1

0

1

NAND

1

1

1

0

ONE

1

1

1

1

x

0

every 4-bit value represents one

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 29

All Boolean functions of 2 variables

30

Truth Table for Functions of 3 Variables

Truth table. 16 Boolean functions of 2 variables. 256 Boolean functions of 3 variables. 2^(2^n) Boolean functions of n variables!

AND

some functions of 3 variables

z

0 0

0 1 0

1 0 0

1 1 0

y

0

x

0

0

0

0

0

0 1

1 0

1 1

01

1

1

1

0

0

0

1

OR

0

1

1

1

1

1

1

1

MAJ

0

0

0

1

0

1

1

1

ODD

0

1

1

0

1

0

0

1

every 4-bit value represents one

every 8-bit value represents one

every 2n-bit value represents one

31

Sum-of-Products

Sum-of-products. Systematic procedure for representing a Boolean function using AND, OR, NOT.

Form AND term for each 1 in Boolean function. OR terms together.

x'yz

expressing MAJ using sum-of-products

z xyz' xyzxy'zMAJyx

0

0

0

1

0

1

1

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

x'yz + xy'z + xyz' + xyz

0

0

0

1

0

1

1

1

proves that { AND, OR, NOT }are universal

32

Universality of AND, OR, NOT

Fact. Any Boolean function can be expressed using AND, OR, NOT.

{ AND, OR, NOT } are universal. Ex: XOR(x,y) = xy' + x'y.

Exercise. Show {AND, NOT}, {OR, NOT}, {NAND}, {NOR} are universal.Hint. DeMorgan's law: (x'y')' = x + y.

x'

Expressing XOR Using AND, OR, NOT

y

0 1

1 1

0 0

1 0

x'y

0

1

0

0

x'y + xy'

0

1

1

0

xy'

0

0

1

0

y'

1

0

1

0

x XOR y

0

1

1

0

x

0

0

1

1

NOT xx'x AND yx yx OR y

MeaningNotation

x + y

From Math to Real-World implementation

We can implement any Boolean function using NAND gates only.

We talk about abstract Boolean algebra (logic) so far.

Is it possible to realize it in real world?

The technology needs to permit switching and conducting. It can be built using magnetic, optical, biological, hydraulic and pneumatic mechanism.

33

Implementation of gates

Fluid switch(http://www.cs.princeton.edu/introcs/lectures/fluid-computer.swf)

35

Digital Circuits

What is a digital system? Analog: signals vary continuously. Digital: signals are 0 or 1.

Why digital systems? Accuracy and reliability. Staggeringly fast and cheap.

Basic abstractions. On, off. Wire: propagates on/off value. Switch: controls propagation of on/off values

through wires.

0.0V0.5V

2.8V3.3V

0 1 0

36

Wires

Wires. On (1): connected to power. Off (0): not connected to power. If a wire is connected to a wire that is on, that

wire is also on. Typical drawing convention: "flow" from top,

left to bottom, right.

0

powerconnection

1

1

1

37

Controlled switch. [relay implementation] 3 connections: input, output, control. Magnetic force pulls on a contact that cuts

electrical flow. Control wire affects output wire, but output

does not affect control; establishes forward flow of information over time.

Controlled Switch

X

X

Relay

38

39

Circuit Anatomy

40

Logic Gates: Fundamental Building Blocks

41

NOT

42

NOT

1

0

0

1

43

OR

44

Series relays = NOR

0 10 0

101 1

0

0

0

1

45

OR

46

AND

47

AND

48

Logic Gates: Fundamental Building Blocks

49

What about parallel relays?

0

11

0

0

1

=NAND

50

Can we implement AND/OR using parallel relays?

Now we know how to implement AND,OR and NOT. We can just use them as black boxes without knowing how they were implemented. Principle of information hiding.

51

Multiway Gates

Multiway gates. OR: 1 if any input is 1; 0 otherwise. AND: 1 if all inputs are 1; 0 otherwise. Generalized: negate some inputs.

Multiway gates. OR: 1 if any input is 1; 0 otherwise. AND: 1 if all inputs are 1; 0 otherwise. Generalized: negate some inputs.

52

Multiway Gates

Multiway gates. Can also be built from 2-way gates (less

efficient but implementation independent) Example: build 4-way OR from 2-way ORs

53

Multiway Gates

54

Translate Boolean Formula to Boolean Circuit

Sum-of-products. XOR.

55

Translate Boolean Formula to Boolean Circuit

Sum-of-products. XOR.

56

Translate Boolean Formula to Boolean Circuit

Sum-of-products. XOR.

Gate logic

Xor(a,b) = Or(And(a,Not(b)),And(Not(a),b)))

Implementation

Xora

bout

0 0 00 1 11 0 11 1 0

a b out

Interface

ODD Parity Circuit

ODD(x, y, z). 1 if odd number of inputs are 1. 0 otherwise.

59

ODD Parity Circuit

ODD(x, y, z). 1 if odd number of inputs are 1. 0 otherwise.

x'y'z

Expressing ODD using sum-of-products

z xy'z' xyzx'yz'ODDyx

0

1

1

0

1

0

0

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

1

x'y'z + x'yz' + xy'z' + xyz

0

1

1

0

1

0

0

1

60

ODD Parity Circuit

ODD(x, y, z). 1 if odd number of inputs are 1. 0 otherwise.

61

ODD Parity Circuit

ODD(x, y, z). 1 if odd number of inputs are 1. 0 otherwise.

62

Expressing a Boolean Function Using AND, OR, NOT

Ingredients. AND gates. OR gates. NOT gates. Wire.

Instructions. Step 1: represent input and output signals with

Boolean variables. Step 2: construct truth table to carry out

computation. Step 3: derive (simplified) Boolean expression

using sum-of products. Step 4: transform Boolean expression into

circuit.

63

Translate Boolean Formula to Boolean Circuit

Sum-of-products. Majority.

64

Translate Boolean Formula to Boolean Circuit

Sum-of-products. Majority.

65

Translate Boolean Formula to Boolean Circuit

Sum-of-products. Majority.

66

Translate Boolean Formula to Boolean Circuit

Sum-of-products. Majority.

67

Simplification Using Boolean Algebra

Every function can be written as sum-of-product

Many possible circuits for each Boolean function.

Sum-of-products not necessarily optimal in:– number of switches (space)– depth of circuit (time)

68

Boolean expression simplification

Karnaugh map

Chapter 2 <69>

• Boolean expressions can be minimized by combining terms

• K-maps minimize equations graphically• PA + PA = P

C 00 01

0

1

Y

11 10AB

1

1

0

0

0

0

0

0

C 00 01

0

1

Y

11 10AB

ABC

ABC

ABC

ABC

ABC

ABC

ABC

ABC

B C0 00 11 01 1

A0000

0 00 11 01 1

1111

11000000

Y

Karnaugh Maps (K-Maps)

Chapter 2 <70>

C 00 01

0

1

Y

11 10AB

1

0

0

0

0

0

0

1

B C0 00 11 01 1

A0000

0 00 11 01 1

1111

11000000

Y

• Circle 1’s in adjacent squares

• In Boolean expression, include only literals whose true and complement form are not in the circle

Y = AB

K-Map

Chapter 2 <71>

C 00 01

0

1

Y

11 10AB

ABC

ABC

ABC

ABC

ABC

ABC

ABC

ABC

1

B C Y0 0 00 1 01 01 1 1

Truth Table

C 00 01

0

1

Y

11 10ABA

0000

0 0 00 1 01 0 01 1 1

1111

K-Map

3-Input K-Map

Chapter 2 <72>

C 00 01

0

1

Y

11 10AB

ABC

ABC

ABC

ABC

ABC

ABC

ABC

ABC

1 0

B C Y0 0 00 1 01 01 1 1

Truth Table

C 00 01

0

1

Y

11 10ABA

0000

0 0 00 1 01 0 01 1 1

1111

0

1

1

1

0

0

0

K-Map

Y = AB + BC

3-Input K-Map

Chapter 2 <73>

• Every 1 must be circled at least once• Each circle must span a power of 2 (i.e. 1, 2,

4) squares in each direction• Each circle must be as large as possible• A circle may wrap around the edges• A “don't care” (X) is circled only if it helps

minimize the equation

K-Map Rules

Chapter 2 <74>

01 11

01

11

10

00

00

10AB

CD

Y

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

4-Input K-Map

Chapter 2 <75>

01 11

1

0

0

1

0

0

1

101

1

1

1

1

0

0

0

1

11

10

00

00

10AB

CD

Y

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

4-Input K-Map

Chapter 2 <76>

01 11

1

0

0

1

0

0

1

101

1

1

1

1

0

0

0

1

11

10

00

00

10AB

CD

Y

Y = AC + ABD + ABC + BD

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

4-Input K-Map

Chapter 2 <77>

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

01

11

10

00

00

10AB

CD

Y

K-Maps with Don’t Cares

Chapter 2 <78>

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

1

0

0

X

X

X

1

101

1

1

1

1

X

X

X

X

11

10

00

00

10AB

CD

Y

K-Maps with Don’t Cares

Chapter 2 <79>

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

1

0

0

X

X

X

1

101

1

1

1

1

X

X

X

X

11

10

00

00

10AB

CD

Y

Y = A + BD + C

K-Maps with Don’t Cares

80

Example

xy z

81

Simplification Using Boolean Algebra

Many possible circuits for each Boolean function.

Sum-of-products not necessarily optimal in:– number of switches (space)– depth of circuit (time)

MAJ(x, y, z) = x'yz + xy'z + xyz' + xyz = xy + yz + xz.

82

Layers of Abstraction

Layers of abstraction. Build a circuit from wires and switches.

[implementation] Define a circuit by its inputs and outputs. [API] To control complexity, encapsulate circuits.

[ADT]

83

Layers of Abstraction

Layers of abstraction. Build a circuit from wires and switches.

[implementation] Define a circuit by its inputs and outputs. [API] To control complexity, encapsulate circuits.

[ADT]

Specification

Step 1: identify input and output Step 2: construct truth table Step 3: derive (simplified) Boolean expression using

sum-of products. Step 4: transform Boolean expression into

circuit/implement it using HDL.

You would like to test the gate before packaging.

HDL

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 86

a b out 0 0 00 1 0 1 0 0 1 1 1

a b out 0 0 00 1 0 1 0 0 1 1 1

And.cmp

load And.hdl,output-file And.out,compare-to And.cmp,output-list a b out;set a 0,set b 0,eval,output;set a 0,set b 1,eval,output;set a 1,set b 0,eval,output;set a 1, set b 1, eval, output;

load And.hdl,output-file And.out,compare-to And.cmp,output-list a b out;set a 0,set b 0,eval,output;set a 0,set b 1,eval,output;set a 1,set b 0,eval,output;set a 1, set b 1, eval, output;

And.tstAnd.hdl

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

Example: Building an And gate

Contract:

When running your .hdl on our .tst, your .out should be the same asour .cmp.

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 87

Building an And gate

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

And.hdl

Interface: And(a,b) = 1 exactly when a=b=1

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 88

Implementation: And(a,b) = Not(Nand(a,b))

Building an And gate

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

And.hdl

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 89

Implementation: And(a,b) = Not(Nand(a,b))

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

CHIP And

{ IN a, b;

OUT out;

// implementation missing

}

And.hdl

Building an And gate

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 90

CHIP And

{ IN a, b;

OUT out;

Nand(a = a, b = b, out = x);

Not(in = x, out = out)

}

CHIP And

{ IN a, b;

OUT out;

Nand(a = a, b = b, out = x);

Not(in = x, out = out)

}

Implementation: And(a,b) = Not(Nand(a,b))

Building an And gate

And.hdl

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 91

Hardware simulator (demonstrating Xor gate construction)

test script

HDL program

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 92

Hardware simulator

HDL program

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 93

HDL program

Hardware simulator

output file

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 94

Project materials: www.nand2tetris.org

Project 1 web site

And.hdl , And.tst , And.cmp files

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 95

Project 1 tips

Read the Introduction + Chapter 1 of the book

Download the book’s software suite

Go through the hardware simulator tutorial

Do Project 0 (optional)

You’re in business.

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 96

Gates for project #1 (Basic Gates)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 97

Gates for project #1

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 98

Gates for project #1 (Multi-bit version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 99

Gates for project #1 (Multi-way version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 100

Gates for project #1 (Multi-way version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 101

Gates for project #1 (Multi-way version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 102

Gates for project #1 (Multi-way version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 103

Perspective

Each Boolean function has a canonical representation

The canonical representation is expressed in terms of And, Not, Or

And, Not, Or can be expressed in terms of Nand alone

Ergo, every Boolean function can be realized by a standard PLD consisting of Nand gates only

Mass production

Universal building blocks,unique topology

Gates, neurons, atoms, …

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 104

End notes: Canonical representation

Whodunit story: Each suspect may or may not have an alibi (a), a motivation to commit the crime (m), and a relationship to the weapon found in the scene of the crime (w). The police decides to focus attention only on suspects for whom the proposition Not(a) And (m Or w) is true.

)(),,( wmawmas Truth table of the "suspect" function

Canonical form:

wmawmawmawmas ),,(

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 105

End notes: Canonical representation (cont.)

)(),,( wmawmas

wmawmawmawmas ),,(

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 106

End notes: Programmable Logic Device for 3-way functions

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 107

Two-level logic: ANDs followed by ORs

Example: Y = ABC + ABC + ABCBA C

Y

minterm: ABC

minterm: ABC

minterm: ABC

A B C

End notes: Programmable Logic Device for 3-way functions

top related