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5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 1/43
5. Low-Power OpAmps
Francesc Serra Graells
francesc.serra.graells@uab.catDepartament de Microelectrònica i Sistemes Electrònics
Universitat Autònoma de Barcelona
paco.serra@imb-cnm.csic.esIntegrated Circuits and Systems
IMB-CNM(CSIC)
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 2/43
Low-Voltage vs Low-Current1
Subthreshold Operation2
Class-AB Output Stages3
Rail-to-Rail Topologies4
Inverter-Based Pseudo-DifferentialMulti-Stages Architectures
5
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 3/43
Low-Voltage vs Low-Current1
Subthreshold Operation2
Class-AB Output Stages3
Rail-to-Rail Topologies4
Inverter-Based Pseudo-DifferentialMulti-Stages Architectures
5
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 4/43
Low-Voltage vs Low-Current
OpAmp overall power consumption:
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 5/43
Low-Voltage vs Low-Current
OpAmp overall power consumption:
Low-voltage circuit techniques:Rail-to-rail
Alternative supply sources(battery, solar cell, scavenging)Poor power scaling
Limited by technology
Inverter-basedSupply multipliersBack gate ...
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 6/43
Low-Voltage vs Low-Current
OpAmp overall power consumption:
Low-voltage circuit techniques:Rail-to-rail
Alternative supply sources(battery, solar cell, scavenging)Poor power scaling
Limited by technology
Inverter-basedSupply multipliersBack gate ...
Low-current circuit techniques:Subthreshold
Strong power savings
Limited by noise and bandwidth
Class-ABDynamic biasingDuty cycle ...
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 7/43
Low-Voltage vs Low-Current
OpAmp overall power consumption:
Low-voltage circuit techniques:Rail-to-rail
Alternative supply sources(battery, solar cell, scavenging)Poor power scaling
Limited by technology
Inverter-basedSupply multipliersBack gate ...
Low-current circuit techniques:Subthreshold
Strong power savings
Limited by noise and bandwidth
Class-ABDynamic biasingDuty cycle ...
Conflicts can arise between low-current and low-voltagedesign techniques!
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 8/43
Low-Voltage vs Low-Current1
Subthreshold Operation2
Class-AB Output Stages3
Rail-to-Rail Topologies4
Inverter-Based Pseudo-DifferentialMulti-Stages Architectures
5
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 9/43
Optimizing MOSFET Biasing
Each transistor has its own purposeand requirements!
M1
M7
M2
M8
M4
M5
M6M3e.g. single-endedtwo-stage Miller
OpAmp
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 10/43
Optimizing MOSFET Biasing
Each transistor has its own purposeand requirements!
M1
M7
M2
M8
M4
M5
M6M3e.g. single-endedtwo-stage Miller
OpAmp
good currentmatching
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 11/43
Optimizing MOSFET Biasing
Each transistor has its own purposeand requirements!
M1
M7
M2
M8
M4
M5
M6M3e.g. single-endedtwo-stage Miller
OpAmp
good currentmatching
goodtransconductance
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 12/43
Optimizing MOSFET Biasing
Each transistor has its own purposeand requirements!
M1
M7
M2
M8
M4
M5
M6M3e.g. single-endedtwo-stage Miller
OpAmp
good currentmatching
goodtransconductance
Strong inversionModerate
Weak
Leakage
Forward saturation example(neglecting CLM):
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 13/43
Optimizing MOSFET Biasing
Each transistor has its own purposeand requirements!
Individual operating point selectionby sizing + biasing:
IC-based circuit design:IC>>1 e.g. good current matching
IC<<1 e.g. translinear ex functionsIC~1 optimized transconductance/power
M1
M7
M2
M8
M4
M5
M6M3e.g. single-endedtwo-stage Miller
OpAmp
good currentmatching
goodtransconductance Strong
inversion
Moderate
Weak
inversioncoefficient
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 14/43
Specific Current Generator
IS-based current reference:
By using Ibias for biasing circuits,IC selection is independentfrom technology
proportional toabsolute temperature
(PTAT)
http://dx.doi.org/10.1109/JSSC.2002.806258F. Serra-Graells et al., Sub-1V CMOS Proportional-To-Absolute-Temperature References, IEEE Journal of Solid-State Circuits, 38:1(84-8), Jan 2003
Vptat
MIbias
M3
M1 M2
M5
P 1
1M
M6
M41
N
M71
Ibias Ibias
Vbias weak inversion sat.strong inversion sat.strong inversion cond.
PTATvoltage
IS-basedcurrent
Neglecting CLM
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 15/43
Specific Current Generator
IS-based current reference:
By using Ibias for biasing circuits,IC selection is independentfrom technology
http://dx.doi.org/10.1109/JSSC.2002.806258F. Serra-Graells et al., Sub-1V CMOS Proportional-To-Absolute-Temperature References, IEEE Journal of Solid-State Circuits, 38:1(84-8), Jan 2003
Vptat
MIbias
M3
M1 M2
M5
P 1
1M
M6
M41
N
M71
M8X
M9Y
Vref
XIbias Ibias Ibias
Vbias weak inversion sat.strong inversion sat.strong inversion cond.
As a side effect, temperaturecompensated voltage referencescan be also obtained:
PTATvoltage
IS-basedcurrent
thermalcompensated
voltage
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 16/43
Low-Voltage vs Low-Current1
Subthreshold Operation2
Class-AB Output Stages3
Rail-to-Rail Topologies4
Inverter-Based Pseudo-DifferentialMulti-Stages Architectures
5
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 17/43
Output Operation Class
OpAmp power investment:
noiseperformance
drivingcapability
Output stage operation modes:
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 18/43
Output Operation Class
OpAmp power investment:
Class-A
noiseperformance
drivingcapability
Output stage operation modes:
Class-B
Class-AB Class-C
Class-DClass-E/F
Class-G/H
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 19/43
Basic CMOS Topologies
Inverter-like stage: Push-pull type stage:
MP
MN MP
MN
Class-ABmodulation
index
MN and MPstatic bias current
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 20/43
Basic CMOS Topologies
Inverter-like stage: Push-pull type stage:
MP
MN MP
MN
Class-ABmodulation
index
High voltage gain
Intrinsic high output impedance (1/gmd)
Suitable for capacitive loads only
Optimized full-scale
Unity voltage gain
Intrinsic low output impedance (1/gms)
Suitable for any type of load impedance
Reduced full-scale
Biasing circuitry to control Ibias against PVT (CMOS process,supply voltage and temperature) corners and to reach highClass-AB m-values?
MN and MPstatic bias current
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 21/43
Class-AB Stage Examples
Translinear loops:
M3
M2
M4
M5
M1
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 22/43
Class-AB Stage Examples
Translinear loops:weak inversion sat.
M3
M2
M4
M5
M1
CW
CCW
strong inversion sat.
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 23/43
Class-AB Stage Examples
Translinear loops:weak inversion sat.
M3
M2
M4
M5
M1
CW
CCW
strong inversion sat.
M4
M1
M10
M8
M9
M7
M5
M2 M3
M6
High supply voltagetypically required...
inverterbasedversion
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 24/43
Class-AB Stage Examples
Class-A + dynamic biasing:
M3 M2
M1
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 25/43
Class-AB Stage Examples
Class-A + dynamic biasing:
Area overhead
highvalue
M3 M2
M1
Noise excess from biasing
discrete time(e.g. SC OpAmps)
continuous time(e.g. RC OpAmps)
M3 M2
M1
M2
M1
DCresponse
ACresponse
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 26/43
Class-AB Stage Examples
Telescopic topologies:
M4
M6
M5
Asymmetricaldifferential pairs
M1
M3
M2
Output range
M1
M3
M2
Constantvoltage bias so
PVT compensatedby symmetry...
M1M2
Classicdifferential pair
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 27/43
Class-AB Stage Examples
Telescopic topologies:
M4
M6
M5
Asymmetricaldifferential pairs
M1
M3
M2
Output range
Half-circuit analysisfor strong inversion
saturation
Full-circuit analysisfor M1=M2
Classicdiff. pair
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 28/43
Low-Voltage vs Low-Current1
Subthreshold Operation2
Class-AB Output Stages3
Rail-to-Rail Topologies4
Inverter-Based Pseudo-DifferentialMulti-Stages Architectures
5
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 29/43
Why Rail-to-Rail?
Optimization of signalfull-scale (VFS) andprobably dynamic range (DR)
inverter-likestage
Required by CMFBin fully differentialsignal processing
MP
MN
Compatibility withlow supply voltages(e.g. battery-powered,energy scavenging)
Necessary at OpAmp input?
Already availableat OpAmp outputwhen no cascodeis used:
Required for certainfeedback configurations!
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 30/43
OpAmp Input Transconductance
Overall gain performance:
Input transconductor for rial-to-rail?
NMOSdifferential
pair
inputtransconductance
outputresistance
PMOSdifferential
pair
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 31/43
OpAmp Input Transconductance
Overall gain performance:
Input transconductor for rial-to-rail?
Complementary differential pair
NMOSdifferential
pair
inputtransconductance
outputresistance
PMOSdifferential
pair
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 32/43
OpAmp Input Transconductance
Overall gain performance:
Non-constant transconductance (gain):
Complementary differential pair
inputtransconductance
outputresistance
NMOS
PMOS
N+PMOS
Specific OpAmpbiasing techniquesare requiredfor rail-to-railcomplementarydifferential pairs
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 33/43
3-Times Current Mirror
Complementary differential pairraw input transconductance:
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 34/43
3-Times Current Mirror
Complementary differential pairraw input transconductance:
Equalization in strong inversion:
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 35/43
3-Times Current Mirror
Equalization in strong inversion:
1 3
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 36/43
3-Times Current Mirror
Non-exact solution
Compact bias control
Equalization in strong inversion:
not truly on/offoperation
1 3
3 1
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based 37/43
Current Switch
Transconductance equalizationsensitivity to referencevoltage
Compact bias control
Equalization in weak inversion:
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
38/43Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based
Low-Voltage vs Low-Current1
Subthreshold Operation2
Class-AB Output Stages3
Rail-to-Rail Topologies4
Inverter-Based Pseudo-DifferentialMulti-Stages Architectures
5
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
39/43Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based
Cascade vs Cascode
Low supply voltageby avoiding cascodingcircuit structures cascode
amplifier
M1
M2
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
40/43Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based
Cascade vs Cascode
Low supply voltageby avoiding cascodingcircuit structures cascode
amplifier
Increase in powerconsumption
OpAmp gain dropmay be compensatedby multistage topologies M1
M2
Multipole frequencycompensation can betricky!
inverteramplifier
M1 M2
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
41/43Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based
3-Stage Nested Miller OTA
Inverter as transconductancebasic building block
M1 M3M2
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
42/43Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based
3-Stage Nested Miller OTA
Inverter as transconductancebasic building block
Increase in powerconsumption
Phase marginsave design
Bandwidth reduction
M1 M3M2
0
1
2
3
4
5
6
7
8
9
10
0 1 2 3 4 5 6 7 8 9 10
5. Low-Power OpAmps
Design of Analog and Mixed Integrated Circuits and Systems F. Serra Graells
43/43Intro Subthreshold Class-AB Rail-to-Rail Inverter-Based
Nested Gm-C Compensation
Combination of nested loops involving:Positive/negative transconductors
Miller compensation capacitors
e.g. 3-stage OTA
Pseudo-differential structures:
top related