1 eel 4783: hdl in digital system design lecture 6: verilog examples prof. mingjie lin
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EEL 4783: HDL in Digital System Design
Lecture 6: Verilog Examples
Prof. Mingjie Lin
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Shift Register
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SR with Parallel Loads
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Barrel SR ------------
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Barrel SR
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Universal RF
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Bi-Directional Bus
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Bi-Directional Bus
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When a FF is created?
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Sync. Data Swapping
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Sync. Data Swapping
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Sync. Data Swapping
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S
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S
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S
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S
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S
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Final issues
• Please fill out the student info sheet before leaving
• Come by my office hours (right after class)
• Any questions or concerns?
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