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The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–1 The 8051 microcontroller. (a) An 8051 die (b) An 8751 with on-chip EPROM (Courtesy Intel Corporation)

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–1 (continued) The 8051 microcontroller. (a) An 8051 die (b) An 8751 with on-chip EPROM (Courtesy Intel

Corporation)

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–2 Block diagram of a microcomputer system

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–3 The central processing unit (CPU)

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–4 Bus activity for an opcode fetch cycle

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–5 Levels of software

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–6 Detailed block diagram of a microcomputer system

The 8051 Microcontroller, 4e

By I. Scott MacKenzie and Raphael C.-W. Phan

© 2007 Pearson Education, Inc.

Pearson Prentice Hall

Upper Saddle River, NJ 07458

FIGURE 1–7 Microcontroller implementation of a simple logic operation FIGURE 1–8 Flowchart for logic gate program