agilent power amplifier design guide

Advanced Design System 2001Power Amplifier DesignGuide

August 2001

ii

NoticeThe information contained in this document is subject to change without notice.

Agilent Technologies makes no warranty of any kind with regard to this material,including, but not limited to, the implied warranties of merchantability and fitnessfor a particular purpose. Agilent Technologies shall not be liable for errors containedherein or for incidental or consequential damages in connection with the furnishing,performance, or us

WarrantyA copy of the specupon request from

Restricted RightsUse, duplication oforth in subparagrSoftware clause atand (c) (2) of the C52.227-19 for othe

Agilent Techno395 Page Mill RPalo Alto, CA 9

Copyright 2001,e of this material.

ific warranty terms that apply to this software product is available your Agilent Technologies representative.

Legendr disclosure by the U. S. Government is subject to restrictions as setaph (c) (1) (ii) of the Rights in Technical Data and ComputerDFARS 252.227-7013 for DoD agencies, and subparagraphs (c) (1)ommercial Computer Software Restricted Rights clause at FARr agencies.

logiesoad

4304 U.S.A.

Agilent Technologies. All Rights Reserved.

Power Amplifier DesignGuide User Manual1 Power Amplifier QuickStart Guide

Using DesignGuides................................................................................................. 1-1Basic Procedures ..................................................................................................... 1-3Selecting the Appropriate Simulation Type............................................................... 1-8

DC and Bias Point Simulations........................................................................... 1-8S-Parameter Simulations.................................................................................... 1-9Nonlinear Si

2 IntroductionList of Available

3 DC and Bias PoDC and Bias PoDC and Bias PoDC and Bias PoDC and Bias PoDC and Bias PoDC and Bias PoDC and Bias Po

3-12DC and Bias PoDC and Bias PoDC and Bias PoDC and Bias PoDC and Bias Po

4 S-Parameter SiS-Parameter SimS-Parameter SimS-Parameter Sim

Parameters.....S-Parameter Sim

Input Power ....5 1-Tone Nonline

1-Tone Nonlinea1-Tone Nonlinea1-Tone Nonlinea1-Tone Nonlinea1-Tone Nonlineaiii

mulations......................................................................................... 1-10

Data Displays.................................................................................. 2-2int Simulations

int Simulation > BJT I-V Curves, Class A Power, Eff., Load, Gm vs. Bias3-2int Simulation > BJT Output Power & Distortion vs. Load R............ 3-4int Simulation > BJT Fmax vs. Bias................................................. 3-5int Simulation > BJT Ft vs. Bias ...................................................... 3-6int Simulation > BJT Noise Figure and S-Parameters vs. Bias ....... 3-7int Simulation > BJT Stability vs. Bias ............................................. 3-11int Simulation > FET I-V Curves, Class A Power, Eff., Load, Gm vs. Bias

int Simulation > FET Output Power & Distortion vs. Load R ........... 3-14int Simulation > FET Fmax vs. Bias ................................................ 3-15int Simulation > FET Ft vs. Bias ...................................................... 3-16int Simulation > FET Noise Figure and S-Parameters vs. Bias....... 3-17int Simulation > FET Stability vs. Bias............................................. 3-21mulationsulations > Noise Figure, S-Parameters, Stability, and Group Delay 4-2ulations > Feedback Network Optimization to Attain Stability ....... 4-7ulations > Gain, Noise Figure, Stability and Group Delay vs. Swept

........................................................................................................ 4-8ulations > Stability, S-Parameters, and Group Delay vs. Frequency and

........................................................................................................ 4-11ar Simulationsr Simulations > Spectrum, Gain, Harmonic Distortion.................... 5-2r Simulations > Spectrum, Gain, Harmonic Distortion (w/PAE) ...... 5-3r Simulations > Spectrum, Gain, Harmonic Distortion vs. Power ... 5-5r Simulations > Spectrum, Gain, Harmonic Distortion vs. Power (w/PAE)5-7r Simulations > Spectrum, Gain, Harmonic Distortion vs. Frequency5-9

iv

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs. Frequency(w/PAE) .................................................................................................................. 5-10

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs. Frequency &Power ..................................................................................................................... 5-12

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs. Frequency &Power (w/PAE) ....................................................................................................... 5-14

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion at X dB GainCompression.......................................................................................................... 5-16

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion at X dB GainCompression v

1-Tone NonlineaCompression (

1-Tone NonlineaCompression (

1-Tone Nonlinea1-Tone Nonlinea1-Tone Nonlinea1-Tone Nonlinea

Compression..1-Tone Nonlinea1-Tone Nonlinea

5-321-Tone Nonlinea

6 2-Tone Nonline2-Tone Nonlinea2-Tone Nonlinea2-Tone Nonlinea2-Tone Nonlinea

6-72-Tone Nonlinea2-Tone Nonlinea

(w/PAE) ..........2-Tone Nonlinea

6-132-Tone Nonlinea

6-152-Tone Nonlinea2-Tone Nonlinea2-Tone Nonlinea

IMD ................s. Freq. ........................................................................................... 5-18r Simulations > Spectrum, Gain, Harmonic Distortion at X dB Gainw/PAE) vs. 1 Param. ....................................................................... 5-20r Simulations > Spectrum, Gain, Harmonic Distortion at X dB Gainw/PAE) vs. 2 Param. ....................................................................... 5-22r Simulations > Noise Figure, Spectrum, Gain, Harmonic Distortion 5-24r Simulations > Large-Signal Load Impedance Mapping................ 5-25r Simulations > Load-Pull - PAE, Output Power Contours .............. 5-26r Simulations > Load-Pull - PAE, Output Power Contours at X dB Gain........................................................................................................ 5-28r Simulations > Source-Pull - PAE, Output Power Contours........... 5-30r Simulations > Harmonic Impedance Opt. - PAE, Output Power & Gain

r Simulations > Harmonic Gamma Opt. - PAE, Output Power & Gain5-35ar Simulationsr Simulations > Spectrum, Gain, TOI and 5thOI Points .................. 6-2r Simulations > Spectrum, Gain, TOI and 5thOI Points (w/PAE) .... 6-3r Simulations > Spectrum, Gain, TOI and 5thOI Points vs. Power.. 6-5r Simulations > Spectrum, Gain, TOI and 5thOI Points vs. Power (w/PAE)

r Simulations > Spectrum, Gain, TOI and 5thOI Points vs. Frequency6-9r Simulations > Spectrum, Gain, TOI and 5thOI Points vs. Frequency........................................................................................................ 6-11r Simulations > Spectrum, Gain, TOI and 5thOI Points vs. 1 Param. (w/PAE)

r Simulations > Spectrum, Gain, TOI and 5thOI Points vs. 2 Param. (w/PAE)

r Simulations > Load-Pull - PAE, Output Power & IMD Contours ... 6-17r Simulations > Source-Pull - PAE, Output Power & IMD Contours 6-20r Simulations > Harmonic Impedance Opt. - PAE, Output Power, Gain &........................................................................................................ 6-23

2-Tone Nonlinear Simulations > Harmonic Gamma Opt. - PAE, Output Power, Gain, & IMD6-26

7 Lumped 2-Element Z-Y Matching NetworksLumped 2-Element Z-Y Matching Networks > Rload, Shunt C/L, Series C/L for Desired Z

7-2Lumped 2-Element Z-Y Matching Networks > Rload, Series C/L, Shunt C/L for Desired Z

7-4Lumped 2-Element Z-Y Matching Networks > Rload, Shunt C/L, Series C/L for Desired Y

7-6Lumped 2-Elem

7-8Lumped 2-Elem

R-C or R-L DeLumped 2-Elem



R-C or R-L De8 Lumped Multi-E

Lumped Multi-Elfor Desired Z ..

Lumped Multi-ElDesired Z .......

Lumped Multi-ElDesired Z .......

Lumped Multi-ElDesired Y .......

Lumped Multi-ElL/C for Desired

Lumped Multi-Elto Match Serie

Lumped Multi-ElMatch Series R

Lumped Multi-ElMatch Series R

Lumped Multi-ElR-C or R-L De

Lumped Multi-ElL/C to Match S

Indexv

ent Z-Y Matching Networks > Rload, Series C/L, Shunt C/L for Desired Y

ent Z-Y Matching Networks > Rload, Shunt C/L, Series C/L to Match Seriesvice.................................................................................................. 7-10ent Z-Y Matching Networks > Rload, Series C/L, Shunt C/L to Match Seriesvice.................................................................................................. 7-12ent Z-Y Matching Networks > Rload, Shunt C/L, Series C/L to Match Shuntvice.................................................................................................. 7-14ent Z-Y Matching Networks > Rload, Series C/L, Shunt C/L to Match Shuntvice.................................................................................................. 7-16lement Z-Y Matching Networksement Z-Y Matching Networks > Rload, Series C/L, Shunt C/L, Series L/C........................................................................................................ 2ement Z-Y Matching Networks > Rload, Shunt C, Series L, Series C for........................................................................................................ 3ement Z-Y Matching Networks > Rload, Series L, Shunt C, Series L/C for........................................................................................................ 5ement Z-Y Matching Networks > Rload, Shunt C, Series L, Shunt C for........................................................................................................ 6ement Z-Y Matching Networks > Rload, Shunt C, Series L, Series C, Shunt Y.................................................................................................... 7ement Z-Y Matching Networks > Rload, Series C/L, Shunt C/L, Series L/Cs R-C or R-L Device........................................................................ 9ement Z-Y Matching Networks > Rload, Shunt C, Series L/C, Series C to-C or R-L Device............................................................................ 10

ement Z-Y Matching Networks > Rload, Series L, Shunt C, Series L/C to-C or R-L Device............................................................................ 12

ement Z-Y Matching Networks > Rload, Shunt C, Series L, Shunt C Shuntvice.................................................................................................. 13ement Z-Y Matching Networks > Rload, Shunt C, Series L, Series C, Shunthunt R-C or R-L Device .................................................................. 14

Chapter 1: Power Amplifier QuickStart GuideThe Power Amplifier QuickStart Guide is intended to help you get started using thePower Amplifier DesignGuide effectively. For detailed reference information, refer tochapters 2 through 8 of this manual.

The Power Amplifier DesignGuide includes many useful simulation setups and datadisplays for power amplifier design. The simulation setups are categorized by thetype of simulation desired and the type of model available. Most of the simulationset-ups are for ananetworks. The Desbut provides somean expanded rang

Note This manumenu preference. method, the appea

Using DesigAll DesignGuidescascading menus oAdvanced Design

The commands in

DesignGuide Devemenu if you haveDeveloper Studio Using DesignGuides 1-1

lysis, but there are some for synthesizing impedance matchingignGuide is not a complete solution for power amplifier designers, useful tools. Subsequent releases of this DesignGuide will includee of features.

al is written describing and showing access through the cascadingIf you are running the program through the selection dialog boxrance and interface will be slightly different.

nGuidescan be accessed in the Schematic or Layout window through eitherr dialog boxes. You can configure your preferred method in the

System Main window. Select the DesignGuide menu.

this menu are as follows:

loper Studio > Start DesignGuide Studio is only available on thisinstalled the DesignGuide Developer Studio. It launches the initialdialog box.

1-2 Using DesignGu

Power Amplifier QuickStart Guide

Add DesignGuide brings up a directory browser in which you can add a DesignGuideto your installation. This is primarily intended for use with DesignGuides that arecustom-built through the Developer Studio.

List/Remove DesignGuide brings up a list of your installed DesignGuides. Select anythat you would like to uninstall and choose the Remove button.

Preferences brings up a dialog box that allows you to:

Disable the DesignGuide menu commands (all except Preferences) in the Mainwindow by ucomplete Deis unchecked

Select your p

Close and restart ides

nchecking this box. In the Schematic and Layout windows, thesignGuide menu and all of its commands will be removed if this box.

referred interface method (cascading menus vs. dialog boxes).

the program for your preference changes to take effect.

Note On PC systems, Windows resource issues might limit the use of cascadingmenus. When multiple windows are open, your system could become destabilized.Thus the dialog box menu style might be best for these situations.

Basic ProceduresThe features and cDesignGuide menshown here.

The first six menuMulti-Element Z-Yfurther categorizeBasic Procedures 1-3

ontent of the Power Amplifier DesignGuide are accessible from theu found in any Advanced Design System Schematic window, as

selections from DC and Bias Point Simulations through LumpedMatching Networks are for selecting simulation setups, which are

d, as explained in subsequent sections of this document. There is a

1-4 Basic Procedure


corresponding set of menu selections under Display Simulation Results. These are forselecting data displays to view your simulation output.

Each of the six menu selections from DC and Bias Point Simulations to LumpedMulti-Element Z-Y Matching Networks have additional selections. The menu forschematics for DC and bias point simulations appears as follows.

Selecting one of thyour current projecurrent-versus-vols

ese menu items, such as BJT I-V Curves, copies a schematic intoct that is set up for generating a bipolar junction transistorstage curves.

The BJT I-V curve schematic appears as follows.

Each schematic haresults are displayschematic is copiethe device and repshould set, such aAfter making mod

Note All schemafirst data display tfrom the device orschematic and runnew data.

Replace the device and/or model withyour own and resimulate.Basic Procedures 1-5

s a sample device that has already been simulated. The simulateded in a data display file that opens automatically after the

d into your project. Modify the BJT by editing its model, or deletelace it with a different one. The red boxes enclose parameters yous the range of base currents and the range of collector voltages.ifications, run a simulation and the data display will update.

tics have a sample device and/or model, or a sample amplifier. Thehat opens after you make a menu selection has pre-simulated data amplifier. You must replace the device or amplifier on the a new simulation. The data display should be updated with the

1-6 Basic Procedure


Following are the results of the simulation.

Most of the informformat that engin

Tips We have min

to modify.

Information enclosed in r

Equations th

Some of the that do havecorrespondins

ation on this data display and on others in the DesignGuide is in aeers can easily understand.

imized the visibility of equation syntaxes that you should not need

about items on a data display that you would want to modify ised boxes.

at you should not need to modify have been hidden.

schematics have more than one corresponding data display. Those a note indicating so. The other data displays are accessed via theg menu selection under Display Simulation Results.

When you select one of the menu picks under Display Simulation Results, ifthere is only one data display that corresponds to the particular schematic, thatdata display will be opened. If there is more than one data display thatcorresponds to that schematic, a dialog box appears, allowing you to select fromseveral different data displays, as shown here.

If you select the mset the default datcorrespond to thethe renamed schemBasic Procedures 1-7

enu command from a schematic that you have renamed, be sure toaset name on the data display window (which will usuallynew name of your schematic) after you have run a simulation from

atic.

1-8 Selecting the Ap


Selecting the Appropriate Simulation TypeThe Power Amplifier DesignGuide is divided into six categories for differentsimulation types. Your design objective and the type of models you have available willdetermine which menu selections you select first.

DC and Bias Point SimulationsIf you have a NonlPoint Simulations

These selections c

I-V curves of

Approximate

Gm, fmax, a

Noise figure propriate Simulation Type

inear FET or BJT model available, you can start with DC and Bias, as shown here.

an be used to determine data such as the following:

a device

class A output power and optimal bias point

nd ft versus bias

and S-parameters versus bias

Optimal source and load impedances for maximum gain or minimum noisefigure, versus bias

Note While this DesignGuide is targeted to power amplifier designers, some of theschematics and data displays are quite useful for small-signal or low-noise amplifierdesigners as well.

S-Parameter SIf you have only Ssimulate an ampliSimulations, as sh

These can be used

Noise figure

Optimal soumaximum ga

Feedback ne

Noise and av

Stability circ

Stability andmodel.)

Group DelaySelecting the Appropriate Simulation Type 1-9

imulations-parameters (possibly with noise data) available, or want tofiers small-signal performance, start with S-Parameterown here.

to determine data such as the following:

and NFmin, maximum available gain, and S-parameters

rce and load impedances to attain the minimum noise figure orin

twork element values to attain stability

ailable gain circles

les and stability factors

S-parameters versus power (actually these require a nonlinear

1-10 Selecting the A


Nonlinear SimulationsIf you have a nonlinear device model available and want the optimal source and loadimpedances at the fundamental frequency (to maximize output power and/orpower-added efficiency), use Load-Pull or Source-Pull schematics in 1-Tone NonlinearSimulations, as shown here.

If you have a nonlimpedances at thepower-added efficiuse Load-Pull or Shere.ppropriate Simulation Type

inear device model available and want the optimal source and load fundamental frequency (to maximize output power and/orency, or minimize third- or fifth-order intermodulation distortion),ource-Pull schematics in 2-Tone Nonlinear Simulations, as shown

If you have a nonlinear device model available and want the optimal source and loadimpedances at the fundamental and harmonic frequencies (to maximize outputpower and/or power-added efficiency), use the Harmonic Impedance Opt or HarmonicGamma Opt schematics in 1-Tone Nonlinear Simulations, as shown here.

The difference betranges of allowed allowed reflection

If you have a nonlimpedances at thepower and/or powethe Harmonic Impschematics in 2-To

Again, the differenthe ranges of allowspecify the alloweSelecting the Appropriate Simulation Type 1-11

ween the two optimizations is that in one case, you specify thereal and imaginary impedances, and in the other, you specify thecoefficients as circular regions on the Smith Chart.

inear device model available and want the optimal source and load fundamental and harmonic frequencies (to maximize outputr-added efficiency, and minimize intermodulation distortion), useedance Optimization or Harmonic Gamma Optimizationne Nonlinear Simulation, as shown here.

ce between the two optimizations is that in one case, you specifyed real and imaginary impedances, and in the other case you

d reflection coefficients as circular regions on the Smith Chart.



If you already have an amplifier design, and you want to characterize the nonlinearperformance over frequency, power, and other swept parameters, select theappropriate schematic from 1-Tone Nonlinear Simulations, as shown here in the firstexample, or 2-Tone Nonlinear Simulation, as shown in the second example.ppropriate Simulation Type

If you want to generate an arbitrary impedance or admittance, or match to a devicesequivalent input or output circuit, using ideal, lumped elements only, use one of theschematics under Lumped 2-Element Z and Y Matching Network, as shown here.Selecting the Appropriate Simulation Type 1-13



Lumped, multi-element matching networks can also be used, as shown here.

Note In the ADSsolutions for netwincludes impedancppropriate Simulation Type

1.3 product suite, E-Syn or the new RF Compiler provide betterork matching applications. The Passive Circuit DesignGuidee matching capabilities.

Chapter 2: IntroductionThe Power Amplifier DesignGuide has many simulation setups and data displaysthat are useful for power amplifier design. The simulation setups are categorized bythe type of simulation desired and the type of model available. Most of the simulationsetups are for analysis, but there are also some for synthesizing impedance matchingnetworks.

Note This manuaoperations. For ad

This manual is org

Reference taappropriate

Chapters formenu (whicheach simulat

Hint The first sixBias Point Simulafor selecting simucorresponding setselecting data disp2-1

l assumes that you are familiar with all of the basic ADS programditional information, refer to the ADS Users Guide.

anized as follows:

bles in this chapter, listing all simulation setups, with links to themanual pages for detailed information

each type of simulation setup, as identified on the DesignGuideis accessed from ADS Schematic window). Detailed information onion setup is included.

selections from the Power Amplifer DesignGuide menu (DC andtions through Lumped Multi-Element Z-Y Matching Networks) arelation setups, as shown in the QuickStart manual. There is aof menu selections under Display Simulation Results. These are forlays to view your simulation output.

2-2 List of Available

Introduction

List of Available Data DisplaysThe tables that follow list all data displays that are included with each simulation.

Table 2-1 shows all data displays included for DC and Bias Point Simulations.

Table 2-1. DC and Bias Point Simulations

Simulation Data DisplaysBJT I-V Curves, Class A Power, Eff., Load,Gm vs. Bias

Class A Power, Load, Efficiency vs. bias

BJT Output Power &BJT Fmax vs. BiasBJT Ft vs. BiasBJT Noise Figure an

BJT Stability vs. BiaFET I-V Curves, ClaGm vs. Bias

FET Output Power &FET Fmax vs. BiasFET Ft vs. BiasFET Noise Figure anData Displays

(BJT_ClassA_calcs.dds)Transconductance vs. bias (BJT_IV_gm.dds)

Distortion vs. Load R BJT_dynamic_LL.ddsBJT_fmax_vs_bias.ddsBJT_ft_vs_bias.dds

d S-Parameters vs. Bias BJT Noise Figure and S-Parameters vs. Bias(BJT_IV_NF_SP.dds)BJT Matching for Noise Figure or Gain(BJT_NF_Matching.dds)Available Gain, Noise, and Stability Circles(Circles_Ga_NF_Stability_BJT.dds)Available Gain, Power Gain, and Stability Circles(Circles_Ga_Gp_Stability_BJT.dds)

s BJT_Stab_vs_bias.ddsss A Power, Eff., Load, Class A Power, Load, Efficiency vs. bias

(FET_ClassA_calcs.dds)Transconductance vs. bias (FET_IV_gm.dds)

Distortion vs. Load R FET_dynamic_LL.ddsFET_fmax_vs_bias.ddsFET_ft_vs_bias.dds

d S-Parameters vs. Bias FET Noise Figure and S-Parameters vs. Bias(FET_IV_NF_SP.dds)FET Matching for Noise Figure or Gain(FET_NF_Matching.dds)Available Gain, Noise, and Stability Circles(Circles_Ga_NF_Stability_FET.dds)Available Gain, Power Gain, and Stability Circles(Circles_Ga_Gp_Stability_FET.dds)

Table 2-2 shows all data displays used for S-Parameter Simulations.

Table 2-2. S-Parameter Simulations

Simulation Data DisplaysNoise Figure, S-Parameters, Stability, andGroup Delay

NFmin, Matching for Gain and Noise Figure(NF_GA_Matching.dds)Available Gain, Noise, and Stability Circles(Circles_Ga_NF_Stability.dds)

Feedback Network OStabilityGain, Noise Figure, vs. Swept Paramete

Stability, S-ParameteFrequency and InputList of Available Data Displays 2-3

Available Gain, Power Gain, and Stability Circles(Circles_Ga_Gp_Stability.dds)Source and Load Stability Circles and Factors(NF_Stab_Circles.dds)S-Parameters on Smith Chart and Polar Plots(S_Params_Quad_Smith_Plr.dds)S-Parameters on Smith Chart and Rect. Plots(S_Params_Quad_dB_Smith.dds)Group Delay (GroupDelay.dds)Noise Figure and Optimal Source Gamma forNFmin (NoiseFigure.dds)

ptimization to Attain Gain_and_Stab_opt.dds

Stability and Group Delayrs

Gain, Noise Figure and Matching vs. SweptParameters (NF_GA_Matching_sweep.dds)Stability Factor and Noise Figure vs. SweptParameters (NF_Stability_sweep.dds)S-Parameters and Gain vs. Swept Parameters(SP_sweep.dds)Group Delay vs. Swept Parameters(GroupDelay_sweep.dds)

rs, and Group Delay vs. Power

Stability and S-Parameters vs. Frequency and InputPower (Stab_vs_freq_pwr.dds)Group Delay versus Frequency and Input Power(GroupDelay_vsFreqPwr.dds)


Introduction

Table 2-3 shows all data displays used for 1-Tone Nonlinear Simulations.

Table 2-3. 1-Tone Nonlinear Simulations

Simulation Data DisplaysSpectrum, Gain, Harmonic Distortion HB1Tone.ddsSpectrum, Gain, Harmonic Distortion (w/PAE) HB1TonePAE.ddsSpectrum, Gain, Harmonic Distortion vs.Power

Spectrum, Gain, Harm. Distortion vs. Power(HB1TonePswp.dds)

Spectrum, Gain, HaPower (w/PAE)Spectrum, Gain, HaFrequencySpectrum, Gain, HaFrequency (w/PAE)Spectrum, Gain, HaFrequency & Power

Spectrum, Gain, HaFrequency & Power

Spectrum, Gain, HaX dB Gain CompresSpectrum, Gain, HaGain Compression vSpectrum, Gain, HaGain Compression (Spectrum, Gain, HaGain Compression (Noise Figure, SpectDistortionLarge-Signal Load ILoad-Pull - PAE, OuLoad-Pull - PAE, OudB Gain CompressioSource-Pull - PAE, OData Displays

rmonic Distortion vs. (HB1TonePAE_Pswp.dds

rmonic Distortion vs. HB1TonePswp.dds

rmonic Distortion vs. HB1TonePAE_Fswp.dds

rmonic Distortion vs. Spectrum, Gain, Harm. Distortion vs. Frequency andPower (HB1ToneFPswp.dds)AM-to-AM, AM-to-PM Distortion vs. Frequency andPower (HB1ToneFPswpAMtoPM.dds)

rmonic Distortion vs.(w/PAE)

Spectrum, Gain, Harm. Distortion vs. Frequency andPower (HB1TonePAE_FPswp.dds)AM-to-AM, AM-to-PM Distortion vs. Frequency andPower (HB1TonePAE_FPswpAMtoPM.dds)

rmonic Distortion atsion

HB1ToneGComp.dds

rmonic Distortion at X dBs. Freq.

HB1ToneGCompFswp.dds

rmonic Distortion at X dBw/PAE) vs. 1 Param.

HB1ToneGComp1swp.dds

rmonic Distortion at X dBw/PAE) vs. 2 Param.

HB1ToneGComp2swp.dds

rum, Gain, Harmonic HB1ToneNoise.dds

mpedance Mapping LoadMapper.ddstput Power Contours HB1Tone_LoadPull.ddstput Power Contours at Xn

HB1Tone_LoadPull_GComp.dds

utput Power Contours HB1Tone_SourcePull.dds

Table 2-4 shows a

Harmonic Impedance Opt. - PAE, OutputPower & Gain

PAE, Output Power, Gain, Dissipation(HarmZopt1tone.dds)Source and Load Harmonic Impedances(HarmZopt1toneSC.dds)Input and Output Waveforms and Dynamic LoadLine (HarmZopt1toneTime.dds)

Harmonic Gamma OGain

SimulationSpectrum, Gain, TOSpectrum, Gain, TO(w/PAE)Spectrum, Gain, TOPowerSpectrum, Gain, TOPower (w/PAE)Spectrum, Gain, TOFrequencySpectrum, Gain, TOFrequency (w/PAE)Spectrum, Gain, TOParam. (w/PAE)Spectrum, Gain, TOParam. (w/PAE)Load-Pull - PAE, OuContours

Table 2-3. 1-Tone Nonlinear Simulations (continued)

Simulation Data DisplaysList of Available Data Displays 2-5

ll data displays used for 2-Tone Nonlinear Simulations.

pt. - PAE, Output Power & PAE, Output Power, Gain, Dissipation(HarmGammaOpt1tone.dds)Source and Load Harmonic Impedances(HarmGammaOpt1toneSC.dds)Input and Output Waveforms and Dynamic LoadLine (HarmGammaOpt1toneTime.dds)

Table 2-4. 2-Tone Nonlinear Simulations

Data DisplaysI and 5thOI Points HB2Tone.ddsI and 5thOI Points HB2TonePAE.dds

I and 5thOI Points vs. HB2TonePswp.dds

I and 5thOI Points vs. HB2TonePAE_Pswp.dds

I and 5thOI Points vs. HB2ToneFswp.dds

I and 5thOI Points vs. HB2TonePAE_Fswp.dds

I and 5thOI Points vs. 1 HB2TonePAE_1swp.dds

I and 5thOI Points vs. 2 HB2TonePAE_2swp.dds

tput Power & IMD Load-Pull - PAE, Output Power & IMD Contours(HB2Tone_LoadPull.dds)Load-Pull - Contours and Spectrum(HB2Tone_LoadPullmore.dds)


Introduction

Table 2-5 shows aNetworks.

Source-Pull - PAE, Output Power & IMDContours

Source-Pull - PAE, Output Power & IMD Contours(HB2Tone_SourcePull.dds)Source-Pull - Contours and Spectrum(HB2Tone_SourcePullmore.dds)

Harmonic Impedance Opt. - PAE, OutputPower, Gain & IMD

PAE, Output Power, Gain, IMD, Dissipation(HarmZopt2tone.dds)

Harmonic Gamma OGain, & IMD

Ta

SimulationRload, Shunt C/L, SeRload, Series C/L, SRload, Shunt C/L, SeRload, Series C/L, SRload, Shunt C/L, Seor R-L DeviceRload, Series C/L, Shor R-L DeviceRload, Shunt C/L, Seor R-L DeviceRload, Series C/L, Sor R-L Device

Table 2-4. 2-Tone Nonlinear Simulations (continued)

Simulation Data DisplaysData Displays

ll data displays used for Lumped 2-Element Z-Y Matching

Source and Load Harmonic Impedances(HarmZopt2toneSC.dds)Input and Output Waveforms and Dynamic Load Line(HarmZopt2toneTime.dds)

pt. - PAE, Output Power, PAE, Output Power, Gain, IMD, Dissipation(HarmGammaOpt2tone.dds)Source and Load Harmonic Impedances(HarmGammaOpt2toneSC.dds)Input and Output Waveforms and Dynamic Load Line(HarmGammaOpt2toneTime.dds)

ble 2-5. Lumped 2-Element Z-Y Matching Networks

Data Displaysries C/L for Desired Z Zdesired1.dds

hunt C/L for Desired Z Zdesired2.ddsries C/L for Desired Y Ydesired1.dds

hunt C/L for Desired Y Ydesired2.ddsries C/L to Match Series R-C Zmatch1.dds

unt C/L to Match Series R-C Zmatch2.dds

ries C/L to Match Shunt R-C Ymatch1.dds

hunt C/L to Match Shunt R-C Ymatch2.dds

Table 2-6 shows all data displays used for Lumped Multi-Element Z-Y MatchingNetworks.

Table 2-6. Lumped Multi-Element Z-Y Matching Networks

Simulation Data DisplayRload, Series C/L, Shunt C/L, Series L/C forDesired Z

Zdesired1M.dds

Rload, Shunt C, Series L, Series C for Desired Z Zdesired2M.ddsRload, Series L, ShuZRload, Shunt C, SerRload, Shunt C, SerDesired YRload, Series C/L, SMatch Series R-C oRload, Shunt C, SerSeries R-C or R-L DRload, Series L, ShuSeries R-C or R-L DRload, Shunt C, SerR-L DeviceRload, Shunt C, SerMatch Shunt R-C orList of Available Data Displays 2-7

nt C, Series L/C for Desired Zdesired3M.dds

ies L, Shunt C for Desired Y Ydesired1M.ddsies L, Series C, Shunt L/C for Ydesired2M.dds

hunt C/L, Series L/C tor R-L Device

Zmatch1M.dds

ies L/C, Series C to Matchevice

Zmatch2M.dds

nt C, Series L/C to Matchevice

Zmatch3M.dds

ies L, Shunt C Shunt R-C or Ymatch1M.dds

ies L, Series C, Shunt L/C to R-L Device

Ymatch2M.dds


IntroductionData Displays

Chapter 3: DC and Bias Point SimulationsThe templates in the DC and Bias Point Simulations menu are concerned withchoosing a bias point, and its effects on output power, gain, noise figure,transconductance, etc.3-1

3-2

DC and Bias Point Simulations

DC and Bias Point Simulation > BJT I-V Curves, Class A Power, Eff.,Load, Gm vs. BiasDescriptionThis simulation setup generates the I-V curves of a BJT. Various data dependent onthe I-V curves, such as transconductance, class A output power, and efficiency arealso shown. Both the base current and the collector-to-emitter voltage are swept.

Needed to Use SchematicNonlinear BJT mo

Main Schematic SSweep ranges for

Data Display OutpClass A Power, Loa

Device I-V cu

Load line setuser-specifia

Maximum alby user.

Given the loVCE:

Optimum delivered

Correspon

Correspon

Correspon

Correspon

Given a diffe

Load line

Resistanc

DC powerdel

ettingbase current and collector voltage

utsd, Efficiency vs. bias (BJT_ClassA_calcs.dds):

rves

by placing a marker on the I-V curves at the knee, and by able maximum VCE.

lowed DC power dissipation curve, with maximum dissipation set

ad line specified by the knee of the I-V curves and the maximum

collector voltage and collector current, for maximum powerto the load while in Class A operation

ding load resistance

ding maximum output power

ding DC power consumption

ding DC-to-RF efficiency

rent bias point, specified by a different marker:

between that marker and the marker at the knee of the I-V curve

e of this load line

consumption at this bias point

Output power, assuming the device remains in Class A operation (AC voltagedoes not exceed user-specified VCE, and does not enter the knee region)

DC-to-RF efficiency at this bias point

Device beta versus base current at the VCE specified by one of the markers

Note The estimate of DC-to-RF efficiency and output power are onlyapproximate, since no high-frequency effects are modeled in this simulation.

TransconductanceBJT_curve_tracer

Device I-V

DC transc

DC transc

DC transc

Collector c

Table of tr

Schematic NameBJT_curve_trac

Data display namBJT_ClassA_ca

BJT_IV_gm.dd3-3

vs. bias (BJT_IV_gm.dds) data display also uses the data from the schematic, and outputs:

curves

onductance (Gm) versus VCE

onductance (Gm) versus IBB and VCE

onductance (Gm) versus collector current

urrent versus base current at one VCE

ansconductance values

er

e(s)lcs.dds

s

3-4


DC and Bias Point Simulation > BJT Output Power & Distortion vs. LoadRDescriptionThis simulation setup generates the I-V curves of a BJT and simulates the powerdelivered to a load resistor as a function of the resistance value, at one bias point.


Main Schematic SSweep ranges for frequency for outp

Data Display Outp Device I-V cu

Load lines fo

Power delive

Output powe

Schematic NameBJT_dynamic_LL

Data Display NamBJT_dynamic_LL

NoteThe load power simfrequency is increno impedance matdel

ettingsbase current, collector voltage and load resistance; bias point andut power versus load resistance simulation

utsrves

r each of the load resistances

red to the load as a function of load resistance

r and harmonic distortion at each load resistance

e(s).dds

ulations will show less than optimal results as the simulationased, because only a resistive load is presented to the device. Also,ching is included at the input.

DC and Bias Point Simulation > BJT Fmax vs. BiasDescriptionThis simulates the maximum frequency of oscillation (the frequency at which themaximum available gain drops to 0 dB), versus bias current, for a particular value ofVCE. It should help you determine how high in frequency a device can be used.


Main Schematic SVCE, base current

Data Display Outp The maximu

dB(S21) vers

The maximuyou move to

Schematic NameBJT_fmax_vs_bia

Data Display NamBJT_fmax_vs_bia3-5

del

ettings sweep limits, and frequency range for S-parameter simulation

utsm available gain versus base current and frequency

us base current and frequency

m frequency of oscillation, which is dependent on a marker thatselect the value of collector current

s

e(s)s.dds

3-6


DC and Bias Point Simulation > BJT Ft vs. BiasDescriptionThis simulates a devices ft, the frequency at which the short-circuit current gaindrops to unity, versus bias current, for a particular value of VCE. It should help youdetermine how high in frequency a device can be used.



Data Display Outp Short circuit

Frequency abias current

Schematic NameBJT_ft_vs_bias

Data Display NamBJT_ft_vs_bias.dddel


uts current gain versus base current and frequency

t which the short-circuit current gain drops to 0 dB, at the collector specified by a movable marker

e(s)s

DC and Bias Point Simulation > BJT Noise Figure and S-Parameters vs.BiasDescriptionThis simulates the S-parameters and noise parameters of a device, versus biasvoltage and current, at a single frequency. You specify the collector voltage sweeprange and the base current sweep range, and the single frequency for S-parameterand noise analysis. The optimal source and load impedances for minimum noisefigure and for maxpower gain circles

Needed to Use ScNonlinear BJT mo

Main Schematic SSweep ranges for analysis.

Data Display OutpBJT Noise Figure

Minimum no

dB(S21), dB(current

DC I-V curve

Maximum av

dB(S21) versmarker on th

VCE, IC, DCminimum nocurves.

BJT Matching for No Minimum no

Associated poutput conju3-7

imum gain are computed, as well as the available gain circles,, noise circles, and source and load stability circles.

hematicdel

ettingsbase current and collector voltage and frequency for S-parameter

utsand S-Parameters vs. Bias (BJT_IV_NF_SP.dds):

ise figure versus VCE and base current

S12), dB(S11), and dB(S22) versus collector voltage and base

s

ailable gain versus base current and collector voltage

us collector current at a collector voltage selected by moving ae I-V curve

power consumption, S-parameters, maximum available gain, andise figure at a bias point selected by moving a marker on the I-V

ise Figure or Gain (BJT_NF_Matching.dds):ise figure versus collector voltage and base current

ower gain (with input matched for minimum noise figure andgately matched) versus collector voltage and base current

3-8


Minimum noise figure versus collector current at a collector voltage selected bymoving a marker on the I-V curves.

DC I-V curves

Smith chart with traces of the optimal source reflection coefficients forminimum noise figure, and the following reflection coefficients (gammas) at theselected bias point:

Gamma source for minimum noise figure

Gamma lominimum

Gamma s

Gamma lo

Listing colummarker on th

VCE

IC

Approxim

S-parame

Maximum

Minimum

Sopt for mphase

Zopt for m

Associatefigure and

Correspon

Source anregard to

Input andohms

Stability fad for maximum power gain when input is terminated for noise figure

ource for simultaneous conjugate match (without regard to noise)

ad for simultaneous conjugate match (without regard to noise)

ns of data corresponding to the bias point selected by moving ae I-V curves:

ate DC power consumption

ters, dB

available power gain, dB

noise figure, dB

inimum noise figure in polar coordinates and in magnitude and

inimum noise figure

d power gain in dB, if the input is matched for minimum noise then the output is matched for maximum power gain

ding load impedance for associated power gain

d load impedances for simultaneous conjugate matching (withoutnoise)

output impedances when source and load are terminated in 50

actor, K

Frequency of the S-parameter simulations

Available Gain, Noise, and Stability Circles (Circles_Ga_NF_Stability_BJT.dds):

All at one bias point selected by moving a marker on the devices I-V curves:

Stability factor, K, and source stability circles. Note that the Smith Chartsize is fixed, so if the stability circles are far outside the Smith Chart, theywill not be displayed. If you change the Smith Chart scaling to Auto Scale,the circles will be visible.

Available

Minimumnoise figusource im

Maximumsimultane

Noise figu

Noise figusource imSmith Chnoise and

Available Gain, Po(Circles_Ga_Gp_S

All at one bias poi

Stability facChart size isthey will notthe circles w

Available ga

Maximum avsimultaneou

Transducer pchosen arbituseful if you3-9

gain and noise circles

noise figure, source impedance (Zopt) required to achieve thisre, and the optimal load impedance for power transfer when thepedance is Zopt

available gain, and the source and load impedances required forous conjugate matching (only valid if K>1)

re with the simultaneous conjugate match condition

re, transducer power gain, and optimal load impedance if thepedance is chosen arbitrarily by moving a marker (GammaS) on aart. This is useful if you must make some compromise between gain, or if you need to avoid an unstable region.

wer Gain, and Stability Circlestability_BJT.dds):

nt selected by moving a marker on the devices I-V curves:

tor, K, and source and load stability circles. Note that the Smith fixed, so if the stability circles are far outside the Smith Chart,be displayed. If you change the Smith Chart scaling to Auto Scale,

ill be visible.

in and power gain circles, on different Smith Charts

ailable gain, and the source and load impedances required fors conjugate matching (only valid if K>1)

ower gain, and optimal load impedance if the source impedance israrily by moving a marker (GammaS) on a Smith Chart. This is need to avoid an unstable region.

3-10


Transducer power gain, and optimal source impedance if the load impedance ischosen arbitrarily by moving a marker (GammaL) on a Smith Chart. This isuseful if you need to avoid an unstable region.

Schematic NameBJT_IV_NF_SP

Data Display NamesBJT_IV_NF_SP.dds

BJT_NF_Matchin

Circles_Ga_NF_St

Circles_Ga_Gp_Stg.dds

ability_BJT.dds

ability_BJT.dds

DC and Bias Point Simulation > BJT Stability vs. BiasDescriptionThis simulates the S-parameters of a transistor, with the base current swept and theemitter bias voltage constant, to determine the stability factors as a function of basecurrent. It should help you determine the dependence of the stability factor on thebias point.



Data Display Outp Stability me

Stability fac

Geometricalfrequency

Geometricaland frequenc

Schematic NameBJT_Stab_vs_bias

Data Display NamBJT_Stab_vs_bias3-11

del


utsasure, B1, versus base current and frequency

tor, K, versus base current and frequency

ly-derived load stability factor, mu, versus base current and

ly-derived source stability factor, mu_prime, versus base currenty

e(s).dds

3-12


DC and Bias Point Simulation > FET I-V Curves, Class A Power, Eff.,Load, Gm vs. BiasDescriptionThis simulation setup generates the I-V curves of a FET. Various data dependent onthe I-V curves, such as transconductance, class A output power, and efficiency arealso shown. Both the gate and drain voltages are swept.

Needed to Use SchematicNonlinear FET mo


Data Display OutpClass A Power, Loa

Device I-V cu

Load line setuser-specifia

Maximum alby user.

Given the loVDS:

Optimumthe load w

Correspon

Correspon

Correspon

Correspon

Given a diffe

Load line

Resistanc

DC powerdel

ettingsgate and drain voltages

utsd, Efficiency vs. bias (FET_ClassA_calcs.dds):

rves

by placing a marker on the I-V curves at the knee, and by able maximum VDS

lowed DC power dissipation curve, with maximum dissipation set

ad line specified by the knee of the I-V curves and the maximum

drain voltage and drain current, for maximum power delivered tohile in Class A operation

ding load resistance

ding maximum output power

ding DC power consumption

ding DC-to-RF efficiency

rent bias point, specified by a different marker:

between that marker and the marker at the knee of the I-V curve

e of this load line

consumption at this bias point

Output power, assuming the device remains in Class A operation (AC voltagedoes not exceed user-specified VDS, and does not enter the knee region)

DC-to-RF efficiency at this bias point

Note The estimates of DC-to-RF efficiency and output power are onlyapproximate, since no high-frequency effects are modeled in this simulation.

TransconductanceFET_curve_tracer

Device I-V cu

DC transcon

DC transcon

DC transcon

Drain curren

Table of tran

Schematic NameFET_curve_tracer

Data Display NamFET_ClassA_calcs

FET_IV_gm.dds3-13

vs. bias (FET_IV_gm.dds) data display also uses the data from the schematic, and outputs:

rves

ductance (Gm) versus VDS

ductance (Gm) versus VGS and VDS

ductance (Gm) versus drain current

t versus gate voltage at one VDS

sconductance values

e(s).dds

3-14


DC and Bias Point Simulation > FET Output Power & Distortion vs. LoadRDescriptionThis simulation setup generates the I-V curves of a FET and simulates the powerdelivered to a load resistor as a function of the resistance value, at one bias point.


Main Schematic SSweep ranges for frequency for outp

Data Display Outp Device I-V cu

Load lines fo

Power delive

Output powe

Schematic NameFET_dynamic_LL

Data Display NamFET_dynamic_LL

NoteThe load power simsimulation frequedevice. Also, no imdel

ettingsgate voltage, drain voltage and load resistance; bias point andut power versus load resistance simulation

utsrves

r each of the load resistances

red to the load as a function of load resistance

r and harmonic distortion at each load resistance

e(s).dds

ulations are going to show less than optimal results as thency is increased, because only a resistive load is presented to thepedance matching is included at the input.

DC and Bias Point Simulation > FET Fmax vs. BiasDescriptionThis simulates the maximum frequency of oscillation (the frequency at which themaximum available gain drops to 0 dB), versus bias voltage, for a particular value ofVDS. It should help you determine how high in frequency a device can be used.


Main Schematic SVDS, gate voltage

Data Display Outp The maximu

dB(S21) vers

The maximuyou move to

Schematic NameFET_fmax_vs_bia

Data Display NamFET_fmax_vs_bia3-15

del


utsm available gain versus gate voltage and frequency

us gate voltage and frequency

m frequency of oscillation, which is dependent on a marker thatselect the value of drain current

s

e(s)s.dds

3-16


DC and Bias Point Simulation > FET Ft vs. BiasDescriptionThis simulates a devices ft, the frequency at which the short-circuit current gaindrops to unity, versus gate voltage, for a particular value of VDS. It should help youdetermine how high in frequency a device can be used.

Needed to Use SchematicNonlinear FET mode


Data Display Outp Short circuit

Frequency abias current

Schematic NameFET_ft_vs_bias

Data Display NamFET_ft_vs_bias.ddl.


uts current gain versus gate voltage and frequency

t which the short-circuit current gain drops to 0 dB, at the drain specified by a movable marker

e(s)s

DC and Bias Point Simulation > FET Noise Figure and S-Parameters vs.BiasDescriptionThis simulates the S-parameters and noise parameters of a device, versus biasvoltages, at a single frequency. You specify the gate and drain voltage sweep ranges,and the single frequency for S-parameter and noise analysis. The optimal source andload impedances for minimum noise figure and for maximum gain are computed, aswell as the availabstability circles.

Needed to Use ScNonlinear FET mo


Data Display OutpFET Noise Figure

Minimum no

dB(S21), dB(

DC I-V curve

Maximum av

dB(S21) versthe I-V curve

VDS, IDS, Dminimum nocurves.

FET Matching for

Minimum no

Associated poutput conju

Minimum nomoving a ma3-17

le gain circles, power gain circles, noise circles, and source and load

hematicdel

ettingsgate and drain voltages and frequency for S-parameter analysis

uts and S-Parameters vs. Bias (FET_IV_NF_SP.dds):

ise figure versus VGS and VDS

S12), dB(S11), and dB(S22) versus VGS and VDS

s

ailable gain versus VGS and VDS

us drain current at a drain voltage selected by moving a marker ons

C power consumption, S-parameters, maximum available gain, andise figure at a bias point selected by moving a marker on the I-V

Noise Figure or Gain (FET_NF_Matching.dds):

ise figure versus VGS and VDS

ower gain (with input matched for minimum noise figure andgately matched) versus VGS and VDS

ise figure versus drain current at a drain voltage selected byrker on the I-V curves.

3-18


DC I-V curves

Smith chart with traces of the optimal source reflection coefficients forminimum noise figure, and the following reflection coefficients (gammas) at theselected bias point:

Gamma source for minimum noise figure

Gamma load for maximum power gain when input is terminated forminimum noise figure

Gamma s

Gamma lo

Listing colummarker on th

VDS

IDS

Approxim

S-parame

Maximum

Minimum

Sopt for mphase

Zopt for m

Associatefigure and

Correspon

Source anregard to

Input andohms

Stability f

Frequencource for simultaneous conjugate match (without regard to noise)


ns of data corresponding to the bias point selected by moving ae I-V curve:

ate DC power consumption

ters, dB


noise figure, dB


inimum noise figure




output impedances when source and load are terminated in 50

actor, K

y of the S-parameter simulations

Available Gain, Noise, and Stability Circles (Circles_Ga_NF_Stability_FET.dds):

All at one bias point selected by moving a marker on the devices I-V curves:

Stability factor, K, and source stability circles. Note that the Smith Chart size isfixed, so if the stability circles are far outside the Smith Chart, they will not bedisplayed. If you change the Smith Chart scaling to Auto Scale, the circles willbe visible.

Available gain and noise circles

Minimum nofigure, and timpedance is


Noise figure

Noise figure,impedance isChart. This gain, or if yo

Available Gain, Po(Circles_Ga_Gp_S

All at one bias poi

Stability facChart size isthey will notthen the circ

Available ga


Transducer pchosen arbituseful if you

Transducer pchosen arbituseful if you3-19

ise figure, source impedance (Zopt) required to achieve this noisehe optimal load impedance for power transfer when the source Zopt


with the simultaneous conjugate match condition

transducer power gain, and optimal load impedance if the source chosen arbitrarily by moving a marker (GammaS) on a Smith

is useful if you must make some compromise between noise andu need to avoid an unstable region.

wer Gain, and Stability Circlestability_FET.dds):

nt selected by moving a marker on the devices I-V curves:

tor, K, and source and load stability circles. Note that the Smith fixed, so if the stability circles are far outside the Smith Chart,be displayed. If you change the Smith Chart scaling to Auto Scaleles will be visible.

in and power gain circles, on different Smith Charts


ower gain, and optimal load impedance if the source impedance israrily by moving a marker (GammaS) on a Smith Chart. This is need to avoid an unstable region.

ower gain, and optimal source impedance if the load impedance israrily by moving a marker (GammaL) on a Smith Chart. This is need to avoid an unstable region.

3-20


Schematic NameFET_IV_NF_SP

Data Display NamesFET_IV_NF_SP.dds

FET_NF_Matching.dds

Circles_Ga_NF_Stability_FET.dds

Circles_Ga_Gp_Stability_FET.dds

DC and Bias Point Simulation > FET Stability vs. BiasDescriptionThis simulates the S-parameters of a transistor, with the gate voltage swept and thedrain bias voltage constant, to determine the stability factors as a function of gatevoltage. It should help you determine the dependence of the stability factor on thebias point.



Data Display Outp Stability me

Stability fac

Geometricalfrequency

Geometricaland frequenc

Schematic NameFET_Stab_vs_bias

Data Display NamFET_Stab_vs_bias3-21

del


utsasure, B1, versus gate voltage and frequency

tor, K, versus gate voltage and frequency

ly-derived load stability factor, mu, versus gate voltage and

ly-derived source stability factor, mu_prime, versus gate voltagey

e(s).dds

3-22


Chapter 4: S-Parameter SimulationsThe templates in the S-Parameter Simulations are for simulating the small-signalcharacteristics, such as noise figure, available gain, stability, group delay, etc., of adevice or an amplifier. Except for the last one, these simulations do not require anonlinear model, but an amplifier with nonlinear models can be used.4-1

4-2

S-Parameter Simulations

S-Parameter Simulations > Noise Figure, S-Parameters, Stability, andGroup DelayDescriptionThis simulates the S-parameters, noise figure, stability, and group delay of anytwo-port network, versus frequency. You may use it with an S-parameter data file, orwith a nonlinear amplifier model.

Needed to Use SchematicAny linear or nonl

Main Schematic SFrequency sweep

Data Display OutpNFmin, Matching

Minimum no

dB(S21), mamatched for frequency

Stability fac

Smith chart minimum nofrequency se

Gamma s

Gamma lominimum

Gamma s

Gamma lo

Listing colummoving a ma

S-parame

Maximum

Minimuminear model, including measured S-parameters

ettingsrange

uts for Gain and Noise Figure (NF_GA_Matching.dds):

ise figure versus frequency

ximum available gain, and associated gain (when the input isNFmin and the output is then conjugately matched), versus

tor versus frequency

with traces of the optimal source reflection coefficients forise figure, and the following reflection coefficients (gammas) at alected by moving a marker:

ource for minimum noise figure

ad for maximum power gain when input is terminated for noise figure



ns of data corresponding to the frequency point selected byrker:

ters, dB


noise figure, dB

Sopt for minimum noise figure in polar coordinates and in magnitude andphase

Zopt for minimum noise figure

Associated power gain in dB, if the input is matched for minimum noisefigure and then the output is matched for maximum power gain

Corresponding load impedance for associated power gain

Source and load impedances for simultaneous conjugate matching (withoutregard to

Stability f

Available Gain, N

All at one frequen

Stability factfixed, so if thdisplayed. Ifbe visible.

Available ga

Minimum nofigure, and timpedance is


Noise figure

Noise figure,impedance isChart. This gain, or if yo

Available Gain, Po

All at one frequen

Stability facChart size isthey will notthe circles w4-3

noise)

actor, K

oise, and Stability Circles (Circles_Ga_NF_Stability.dds):

cy selected by moving a marker:

or, K, and source stability circles. Note that the Smith Chart size ise stability circles are far outside the Smith Chart, they will not be you change the Smith Chart scaling to Auto Scale, the circles will

in and noise circles

ise figure, source impedance (Zopt) required to achieve this noisehe optimal load impedance for power transfer when the source Zopt


with the simultaneous conjugate match condition

transducer power gain, and optimal load impedance if the source chosen arbitrarily by moving a marker (GammaS) on a Smith

is useful if you must make some compromise between noise andu need to avoid an unstable region.

wer Gain, and Stability Circles (Circles_Ga_Gp_Stability.dds):

cy selected by moving a marker:

tor, K, and source and load stability circles. Note that the Smith fixed, so if the stability circles are far outside the Smith Chart,be displayed. If you change the Smith Chart scaling to Auto Scale,

ill be visible.

4-4


Available gain and power gain circles, on different Smith Charts

Maximum available gain, and the source and load impedances required forsimultaneous conjugate matching (only valid if K>1)

Transducer power gain, and optimal load impedance if the source impedance ischosen arbitrarily by moving a marker (GammaS) on a Smith Chart. This isuseful if you need to avoid an unstable region.

Transducer power gain, and optimal source impedance if the load impedance ischosen arbituseful if you

Source and Load Salso uses the data

Geometricalversus frequstability circ

Smith chart coefficient fomaximum poThese two remarker.

Smith chart figure versusfrequency se

Gamma sour

Gamma loadnoise figure

Gamma sour

Gamma load

Minimum no

Maximum poconjugately m

S-Parameters on Sdisplay also uses trarily by moving a marker (GammaL) on a Smith Chart. This is need to avoid an unstable region.

tability Circles and Factors (NF_Stab_Circles.dds) data display from the NF_SP_Stability schematic, and outputs:

ly-derived source and load stability factors (mu and mu_prime)ency. These are the minimum distances to the source and loadles.

showing source and load stability circles and the source reflectionr minimum noise figure, and the load reflection coefficient forwer gain when the input is terminated for minimum noise figure.flection coefficients are at a frequency point specified by moving a

with the optimal source reflection coefficients for minimum noise frequency, and the following reflection coefficients (gammas) at alected by moving a marker:

ce for minimum noise figure

for maximum power gain when input is terminated for minimum

ce for simultaneous conjugate match (without regard to noise)

for simultaneous conjugate match (without regard to noise)

ise figure at the selected frequency

wer gain if the source is matched for noise and then the output isatched

mith Chart and Polar Plots (S_Params_Quad_Smith_Plr.dds) datahe data from the NF_SP_Stability schematic, and outputs:

S11 and S22 on Smith Charts, also with a circle of constant VSWR

S21 and S12 (linear units) on polar plots

S-Parameters on Smith Chart and Rect. Plots (S_Params_Quad_dB_Smith.dds) datadisplay also uses the data from the NF_SP_Stability schematic, and outputs:

S11 and S22 on Smith Charts, also with a circle of constant VSWR

dB(S21) and dB(S12) on rectangular plots

Group Delay (GrouNF_SP_Stability s

Group Delay

Note This pthe number

Noise Figure and

Minimum nofrequency

Smith chart figure, versufrequency se

Listing colummoving a ma

Minimum

Zopt for m

Schematic NameNF_SP_Stability

Data Display NamNF_GA_Matching

Circles_Ga_NF_St

Circles_Ga_NF_St

NF_Stab_Circles.d4-5

pDelay.dds) data display also uses the data from thechematic, and outputs:

in seconds, versus frequency.

lot may be jagged if measured S-parameter data is simulated, andof measured points is small.

Optimal Source Gamma for NFmin (NoiseFigure.dds):

ise figure and noise figure with the system impedance, Z0, versus

with the optimal source reflection coefficient for minimum noises frequency and the optimal source reflection coefficient at onelected by moving a marker

ns of data corresponding to the frequency point selected byrker:

noise figure, dB

inimum noise figure

es.dds

ability.dds

ability.dds

ds

4-6


S_Params_Quad_Smith_Plr.dds

S_Params_Quad_dB_Smith.dds

GroupDelay.dds

NoiseFigure.dds

S-Parameter Simulations > Feedback Network Optimization to AttainStabilityDescriptionThis schematic optimizes component values in input, output, and feedbackstabilization networks, to stabilize a 2-port network, minimize the minimum noisefigure, and maximize gain (dB(S21).) You may delete components or modify thestructure of the stabilization networks.

Needed to Use ScAny linear or nonl

Main Schematic SType of optimizativalues, and frequeevaluated.

Data Display Outp Geometrical

Gain, dB(S2

Minimum no

Values of opt

Schematic NameGain_and_Stab_op

Data display namGain_and_Stab_op

NoteThe optimization roptimization algorgoals. Noise figureoptimizer might fiThe feedback netwto be adjusted. Forelements) to attainparameters can be4-7

hematicinear model, including measured S-parameters

ettingson algorithm (gradient, random, genetic, etc.), goal weighting, goalncy ranges over which noise figure and gain goals will be

utsly-derived source and load stability factors

1)

ise figure

imized components

t

et.dds

esults may vary substantially, depending on the type ofithm used (set on the Nominal Optimization controller) and on theand gain have been included as optimization goals. Otherwise, the

nd a stable network, but with poor performance as an amplifier.ork topology might be modified, but the data display will also have example, if you use a transmission line (instead of lumped stability and optimize the length and/or width of the line, these displayed on the data display by inserting new listing columns.

4-8


S-Parameter Simulations > Gain, Noise Figure, Stability and Group Delayvs. Swept ParametersDescriptionThis schematic sweeps two parameters in a circuit to determine how gain, noisefigure, matching impedances, stability and group delay depend on the twoparameters. Often this sort of a simulation provides designers with more insight thanan optimization. You must decide which two parameters to sweep, and you maymodify the networ

Needed to Use ScAny linear or nonl

Main Schematic SNetwork topology,for S-parameter si

Data Display OutpGain, Noise Figur(NF_GA_Matchin

Minimum no

dB(S21), mamatched for frequency

dB(S21), mamatched for swept paramselected by a

Stability fac

Smith chart minimum nofrequency se

Gamma s

Gamma lominimum

Gamma sk to be simulated.

hematicinear model, including measured S-parameters

ettingstwo parameters to sweep and their sweep ranges, frequency rangemulation

utse and Matching vs. Swept Parametersg_sweep.dds)

ise figure versus frequency

ximum available gain, and associated gain (when the input isNFmin and the output is then conjugately matched), versus

ximum available gain, and associated gain (when the input isNFmin and the output is then conjugately matched), versus eacheter, with the other parameter held constant, at one frequency marker

tor versus frequency

with traces of the optimal source reflection coefficients forise figure, and the following reflection coefficients (gammas) at alected by moving a marker:

ource for minimum noise figure

ad for maximum power gain when input is terminated for noise figure


Gamma load for simultaneous conjugate match (without regard to noise)

Listing columns of data corresponding to the frequency point selected bymoving a marker:

S-parameters, dB

Maximum available power gain, dB

Minimum noise figure, dB

Sopt for mphase

Zopt for m

Associatefigure and

Correspon

Source anregard to

Stability f

Stability Factor andata display also u

Stability fac

Stability facmoving a ma

Minimum no

Minimum noby moving a

S-Parameters andthe data from the moving a marker:

S-parameter

Minimum no

Maximum av4-9


inimum noise figure




actor, K

d Noise Figure vs. Swept Parameters (NF_Stability_sweep.dds)ses the data from the NF_SP_sweep schematic, and outputs:

tor, K, versus both swept parameters and frequency

tor, K, versus both swept parameters, at one frequency selected byrker

ise figure versus both swept parameters and frequency

ise figure versus both swept parameters, at one frequency selectedmarker

Gain vs. Swept Parameters (SP_sweep.dds) data display also usesNF_SP_sweep schematic, and outputs at a frequency selected by

s versus both parameters

ise figure versus both swept parameters

ailable gain versus both swept parameters

4-10


Group Delay vs. Swept Parameters (GroupDelay_sweep.dds) data display also usesthe data from the NF_SP_sweep schematic, and outputs:

Group delay versus both swept parameters and frequency

Group delay at one combination of the swept parameters, versus frequency

Schematic NameNF_SP_sweep

Data Display NamNF_GA_Matching

NF_Stability_swe

SP_sweep.dds

GroupDelay_swee

NoteSome of the simul1.3 tuning featuremay make it easieparameter values es_sweep.dds

ep.dds

p.dds

ation results on these data displays can be obtained via the ADS. However, these data displays show the results in a format thatr for you to analyze the data and determine what the optimalare.

S-Parameter Simulations > Stability, S-Parameters, and Group Delay vs.Frequency and Input PowerDescriptionThis schematic simulates the large-signal S-parameters of a device, versus frequencyand input power. The stability factor, K, is computed from these S-parameters, usingthe standard formula found in textbooks. This simulation setup differs from theLSSP controller in that small-signal mixer mode is used to inject a small signal at theoutput of the devicgives a much more

Needed to Use ScNonlinear model,

Main Schematic SRanges over which

Data Display OutpStability and S-Pa

S-Parameter

Stability fac

Group Delay versudisplay also uses t

Group delaymarker

Schematic NameStab_vs_freq_pwr

Data Display NamStab_vs_freq_pwr.

GroupDelay_vsFr

NoteThe stability factostability factor at 4-11

e, while the input is being driven by a large signal source. This realistic simulation of S12 and S22.

hematicor an amplifier with nonlinear device models

ettings to sweep the input signal frequency and power

utsrameters vs. Frequency and Input Power (Stab_vs_freq_pwr.dds):

s versus input frequency and input power

tor, K, versus input frequency and input power

s Frequency and Input Power (GroupDelay_vsFreqPwr.dds) datahe data from the Stab_vs_freq_pwr schematic, and outputs:

versus frequency, with the input power selected by moving a

esdds

eqPwr.dds

r is only computed at the frequency of the input signal. Thehigher and lower frequencies is not computed.

4-12


Chapter 5: 1-Tone Nonlinear SimulationsThe templates in the 1-Tone Nonlinear Simulations are for simulating thelarge-signal characteristics of an amplifier or device, such as gain, harmonicdistortion, power-added efficiency, gain compression, etc. Setups for simulating theseversus frequency, power, and arbitrary swept parameters are included. Load- andSource-pull simulations and impedance optimization setups are also included. Thesesimulations do require nonlinear model(s).5-1

5-2

1-Tone Nonlinear Simulations

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic DistortionDescriptionThis is the most basic simulation setup, and it simulates the spectrum, output power,power gain, and harmonic distortion of a device or amplifier. A sample poweramplifier is provided. You must replace this amplifier with your own device oramplifier, and modify the biases, as needed.

Needed to Use SchematicA device or an am

Main Schematic SInput frequency a

Data Display Outp Output spec

Output powe

Transducer pthe source)

Harmonic di

Schematic NameHB1Tone

Data Display NamHB1Tone.ddsplifier using nonlinear model(s)

ettingsnd available source power

utstrum and voltage waveform

r

ower gain (power delivered to the load minus power available from

stortion up to the 5th, in dBc

e

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion(w/PAE)DescriptionThis simulation setup is identical to the HB1Tone schematic, except that it includestwo current probes and named voltage nodes for calculating power-added efficiency. Italso simulates the spectrum, output power, power gain, and harmonic distortion of adevice or amplifier. A sample power amplifier is provided. You must replace thisamplifier with youdescribed in the n

Needed to Use ScA device or an am

Main schematic sInput frequency, a

Data Display Outp Output spec

Output powe


Harmonic di

Power-addedpower)/(DC p

High supply

DC power co

Thermal pow

Schematic NameHB1TonePAE

Data Display NamHB1TonePAE.dds5-3

r own device or amplifier, and you can modify the biases, asotes, below.

hematicplifier using nonlinear model(s)

ettingsvailable source power, and bias settings

utstrum and input and output voltage waveforms

r



efficiency (Pout at fundamental minus Available sourceower consumption)

current

nsumption

er dissipation in the device or amplifier

e

5-4


NoteOnly bias supplies on the highest level schematic will be included in the PAEcalculation. So, for example, if you replace the sample amplifier with one with thebias supplies included in the subcircuit, those supplies will not be included in thePAE calculation. On the highest level schematic, you can delete one of the twosupplies and/or replace the voltage sources with current sources, and the PAEcalculation will still be valid. You can modify the components in the bias network,realizing that the DC power consumption is computed as (the DC voltage at theVs_high node) * (tthe Vs_low node) *he DC current in the Is_high current probe) + (the DC voltage at (the DC current in the Is_low current probe).

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs.PowerDescriptionThis simulation setup is identical to the HB1Tone schematic, except that availablesource power is swept. It simulates the spectrum, output power, power gain, gaincompression, phase distortion, and harmonic distortion of a device or amplifier, allversus available source power. A sample power amplifier is provided. You mustreplace this amplineeded.


Main Schematic SInput frequency asweep is divided inwhen the amplifie

Data Display OutpSpectrum, Gain, H

All versus availab

Output spec

Output powe


Harmonic di

Phase shift alevel), for us

AM-to-AM, AM-to-also uses the data

All versus availab

AM-to-AM, A

Output powe5-5

fier with your own device or amplifier, and modify the biases, as


ettingsnd available source power sweep range. The available source power

to two parts (one coarse, and the other fine), for better resolutionr is being driven into compression.

utsarm. Distortion vs. Power (HB1TonePswp.dds):

le source power:

trum and voltage waveforms

r



nd gain reduction (relative to simulation at lowest input powere in the GComp7 section of S2D data file, for behavioral modeling

PM Distortion vs. Power (HB1TonePswpAMtoPM.dds) data display from the HB1TonePswp schematic, and outputs:

le source power:

M-to-PM, characteristics

r

5-6


Gain

Phase shift and gain reduction (relative to simulation at lowest input powerlevel), for use in the GComp7 section of S2D data file, for behavioral modeling.

Output Voltage waveforms

Schematic NameHB1TonePswp

Data Display NamHB1TonePswp.dd

HB1TonePswpAMess

toPM.dds

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs.Power (w/PAE)Description

This simulation setup is identical to the HB1TonePswp schematic, except that itincludes two current probes and named voltage nodes for calculating power-addedefficiency. It also simulates the spectrum, output power, power gain, gaincompression, high supply current, DC power consumption, thermal dissipation, andharmonic distortiosample power ampdevice or amplifierfollowing page.


Main Schematic SBias settings, inpusource power sweeresolution when th

Data Display OutpAll versus availab

Output spec

Output powe


Harmonic di


High supply

DC power co

Thermal pow

Gain compre5-7

n, of a device or amplifier, all versus available source power. Alifier is provided. You must replace this amplifier with your own, and you can modify the biases, as described in the note on the


ettingst frequency and available source power sweep range. The availablep is divided into two parts, one coarse, and the other fine, for bettere amplifier is being driven into compression.

utsle source power:

trum and input and output voltage waveforms

r




current

nsumption


ssion between any two simulation points specified via markers

5-8


The AM-to-AM, AM-to-PM Distortion vs. Power (HB1TonePswpAMtoPM.dds) datadisplay, accessed by selecting 1-Tone Nonlinear Simulation Results > Spectrum, Gain,Harmonic Distortion vs. Power Results will also display data from theHB1TonePAE_Pswp schematic, but you will have to set the default dataset nameafter opening the data display.

Schematic NameHB1TonePAE_Pswp

Data Display NamHB1TonePAE_Psw

NoteOnly bias suppliescalculation. For exsupplies included calculation. On thand/or replace thestill be valid. You DC power consumDC current in theDC current in theep.dds

on the highest level schematic will be included in the PAEample, if you replace the sample amplifier with one with the biasin the subcircuit, those supplies will not be included in the PAEe highest level schematic, you can delete one of the two suppliesvoltage sources with current sources, and the PAE calculation will

can modify the components in the bias network, realizing that theption is computed as (the DC voltage at the Vs_high node) * (theIs_high current probe) + (the DC voltage at the Vs_low node) * (theIs_low current probe).

1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs.FrequencyDescriptionThis simulation setup is similar to the HB1TonePswp schematic, except that theinput signal frequency is swept. It simulates the spectrum, voltage waveform, outputpower, power gain, group delay, and harmonic distortion of a device or amplifier, allversus frequency. A sample power amplifier is provided. You must replace thisamplifier with you


Main Schematic SInput frequency sw

Data Display OutpAll versus frequen

Output specmarker

Output powe


Harmonic di

Group delay

Schematic NameHB1ToneFswp

Data Display NamHB1ToneFswp.dd5-9

r own device or amplifier, and modify the biases, as needed.


ettingseep range and available source power

utscy:

trum and voltage waveform, at a frequency selected by moving a

r



es

5-10


1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs.Frequency (w/PAE)DescriptionThis simulation setup is identical to the HB1ToneFswp schematic, except that itincludes two current probes and named voltage nodes for calculating power-addedefficiency. It also simulates the spectrum, voltage waveform, output power, powergain, high supply current, DC power consumption, thermal dissipation, andharmonic distortioamplifier is providamplifier, and you


Main Schematic SBias settings, inpu

Data Display OutpAll versus frequen

Output spec

Output powe


Harmonic di


High supply

DC power co

Thermal pow

Schematic NameHB1TonePAE_Fsw

Data Display NamHB1TonePAE_Fswn, of a device or amplifier, all versus frequency. A sample powered. You must replace this amplifier with your own device or can modify the biases, as described in the notes, below.


ettingst frequency sweep range and available source power

utscy:

trum, at a frequency selected by moving a marker

r




current

nsumption


p

ep.dds

NoteOnly bias supplies on the highest level schematic will be included in the PAEcalculation. For example, if you replace the sample amplifier with one with the biassupplies included in the subcircuit, those supplies will not be included in the PAEcalculation. On the highest level schematic, you can delete one of the two suppliesand/or replace the voltage sources with current sources, and the PAE calculation willstill be valid. You can modify the components in the bias network, realizing that theDC power consumption is computed as (the DC voltage at the Vs_high node) * (theDC current in theDC current in the5-11

Is_high current probe) + (the DC voltage at the Vs_low node) * (theIs_low current probe).

5-12


1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs.Frequency & PowerDescriptionThis simulation setup is identical to the HB1TonePswp schematic, except thatfrequency is swept in addition to available source power. It simulates the spectrum,output power, power gain, gain compression, phase distortion, harmonic distortion,and group delay of a device or amplifier, all versus available source power. A samplepower amplifier isamplifier, and mod


Main Schematic Sinput frequency swsource power sweeresolution when th

Data Display OutpSpectrum, Gain, H

All versus av

Output po

Transducfrom the s

Harmonic

Phase shilevel), formodeling

Group delay

Output specmarkers

AM-to-AM, AM-to(HB1ToneFPswpAHB1ToneFPswp s provided. You must replace this amplifier with your own device orify the biases, as needed.


ettingseep range and available source power sweep range. The available

p is divided into two parts, one coarse, and the other fine, for bettere amplifier is being driven into compression.

utsarm. Distortion vs. Frequency and Power (HB1ToneFPswp.dds):

ailable source power, at a frequency selected by moving a marker:

wer

er power gain (power delivered to the load minus power availableource)

distortion up to the 5th, in dBc

ft and gain reduction (relative to simulation at lowest input power use in the GComp7 section of S2D data file, for behavioral

at one input power level selected by moving a marker

trum at one input power and frequency, both selected by moving

-PM Distortion vs. Frequency and PowerMtoPM.dds) data display also uses the data from the

chematic, and outputs:

All versus available source power, at a frequency selected by moving a marker:

AM-to-AM, AM-to-PM, characteristics

Output power

Gain

Phase shift and gain reduction (relative to simulation at lowest input powerlevel), for use in GComp7 section of S2D data file, for behavioral modeling.

Transducer p

Schematic NameHB1ToneFPswp

Data Display NamHB1ToneFPswp.d

HB1ToneFPswpA5-13

ower gain plots, versus frequency

esds

MtoPM.dds

5-14


1-Tone Nonlinear Simulations > Spectrum, Gain, Harmonic Distortion vs.Frequency & Power (w/PAE)DescriptionThis simulation setup is identical to the HB1ToneFPswp schematic, except that itincludes two current probes and named voltage nodes for calculating power-addedefficiency. It simulates the spectrum, output power, power gain, gain compression,phase distortion, harmonic distortion, power-added efficiency, high supply current,DC power consumavailable source pmust replace thisbiases, as describe


Main Schematic SBias settings, inpuThe available sourfine, for better res

Data Display OutpSpectrum, Gain, H(HB1TonePAE_FP

All versus av

Output po

Transducfrom the s

Harmonic

Power-add

DC power

High supp

Thermal d

Input and

Gain compreption, and thermal dissipation of a device or amplifier, all versusower and frequency. A sample power amplifier is provided. Youamplifier with your own device or amplifier, and you can modify thed in the note on the following page.


ettingst frequency sweep range and available source power sweep range.ce power sweep is divided into two parts, one coarse, and the otherolution when the amplifier is being driven into compression.

utsarm. Distortion vs. Frequency and Powerswp.dds):

ailable source power, at a frequency selected by moving a marker

wer

er power gain (power delivered to the load minus power availableource)

distortion up to the 5th, in dBc

ed efficiency

consumption

ly current

issipation

output voltage waveforms

ssion between two power levels selected by markers

Output spectrum at one input power and frequency, both selected by movingm

agilent power amplifier design guide

Documents