EE955/ EE904 Advanced Digital System Design

Assignment 1

Date: 18/08/2013

Last date of Submission: 25/08/2013

Q.1 Implement following logic functions using Multiplexer, ensure

hardware requirement is minimum

a) Full Adder

b) f=m(1,3,5,7)

c) y=AB+BC+ABC

Q.2 Design following code converters

a) BCD to Excess 3

b) 3 bit Binary to gray converter

c) 8421 to gray

Q.3 Design and implement

a)16:1 mux using 4:1 mux

b) 16:1 mux using 4:1 mux ,2:4 decoder and logic gates if required

c) 16:1 mux using three 4:1 mux and one 8:1 mux

Q.4 Design and explain 4 bit ALU ,4 bit carry look ahead adder, serial

adder, n bit multiplier.

Q.5 Write short note on programmable switches in PLA/PAL?ROM.

Q.6 Compare and explain PLA/PAL/Rom

Q.7 Compare and explain CPLD and FPGA.

Q.8 Design and implement mod 5 lock free counter

Q.9 Design and implement FSM using mealy and moore considering

both cases of overlapping allowed and not allowed for the following

sequences

a)1001

b)1010

c)11010

Q.10 Design a sequence detector which either detects sequence 1101 or

1110.

Q.11 Design full adder using PLA and PAL