ACM SIGDA Publications on CDROM

CODES 2000 May 3 – 5, 2000 San Diego, CA

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Cover Page Table of Contents Author Index Session Index

Proceedings of the

Eighth International Workshop on Hardware/Software Codesign

CODES 2000

May 3-5, 2000 San Diego, California

Sponsored by:

ACM SIGDA IEEE Computer Society

ACM SIGSOFT IFIP WG 10.5

With support from:

Message from the Workshop Chairs Hardware/software codesign has become a strategic technique for design of modern electronic systems because it has the potential to bridge the increasing gap between silicon capacity and designer productivity. On the one hand, today’s silicon capacity allows for very complex systems, consisting of a mixture of multiple software and hardware processors including peripheral devices, to be implemented on a single chip (System-On-Chip). On the other hand, many applications have relatively short time-to-market, demanding fast development where numerous parameters such as performance, power consumption, flexibility, reliability, production cost, etc. have to be captured and explored in order to produce a successful product in time. The CODES workshop represents the major international forum for presentation of the latest research and practice in codesign. This year we had 61 submissions from 13 countries. All submissions went through a thorough review process, resulting in 29 papers accepted. Of these, 20 papers were accepted for regular presentation and 9 papers for short presentation. During the workshop each paper is presented as a (regular or short) talk, followed by an interactive poster session. In addition, the workshop program includes two invited talks from industry. As the major international forum for research in codesign, the workshop reflects the current trend in codesign research and practice. This year’s technical program represents several important topics:

• Estimation and optimization techniques for a variety of system quality metrics, such as performance, power consumption and memory issues;

• Issues on IP core design and reuse; • System validation and simulation; • Embedded software optimization and generation; • And the continuing interest in system level modeling and integration, which has been an important

issue from the very beginning of this series of workshops. As last year, the proceedings will be available as hardcopy, on CD-ROM on the ACM SIGDA annual compendium, and on the ACM SIGDA web page

http://www.sigda.acm.org/Archives/ProceedingArchives/. We are grateful for the SIGDA’s forward-looking publication policy, and their accommodating an accelerated schedule enabling the submission deadline to occur only four months before the meeting date. This accelerated schedule was also made possible by the entire submission, review, and final camera-ready submission processes occurring completely electronically via email and the web. We wish to thank the Technical Program Committee for their efforts in reviewing papers and for contributing to a thorough selection process. We would also like to thank Peter Voigt Knudsen for developing a review process tool that was a tremendous help during the selection process. Further information on the workshop, online proceedings, and past and future CODES workshops is at: http://www.it.dtu.dk/codes2000 Welcome to CODES 2000

Jan Madsen Frank Vahid

Program Chair General Chair

CODES 2000 Organizing Committee

General Chair Frank Vahid

University of California, Riverside, USA vahid@cs.ucr.edu

Program Chair Jan Madsen

Technical University of Denmark, Denmark jan@it.dtu.dk

Technical Program Committee

Brian Bailey, Mentor Graphics, USA Gaetano Borriello, University of Washington, USA

Joseph Buck, Synopsys, USA Raul Camposano, Synopsys, USA

Rolf Ernst, University of Braunschweig, GERMANY Daniel Gajski, University of California, Irvine, USA Rajesh Gupta, University of California, Irvine, USA

Joerg Henkel, NEC, USA Xiaobo (Sharon) Hu, University of Notre Dame, USA

Ahmed Jerraya, TIMA Laboratory, FRANCE Kayhan Kucukcakar, Synopsys, USA

Sanjaya Kumar, Honeywell, USA Luciano Lavagno, Politecnico di Torino, ITALY

Jan Madsen, Technical University of Denmark, DENMARK Sri Parameswaran, University of Queensland, AUSTRALIA Wolfgang Rosenstiel, University of Tubingen, GERMANY

Alberto Sangiovanni-Vincentelli, UC Berkeley, USA Donatella Sciuto, Politecnico di Milano, ITALY

Juergen Teich, University of Paderborn, GERMANY Don Thomas, Carnegie-Mellon University, USA

Frank Vahid, University of California, Riverside, USA Diederik Verkest, IMEC, BELGIUM

Kees Vissers, Philips, The NETHERLANDS Wayne Wolf, Princeton University, USA

Hiroto Yasuura, Kyushu University, JAPAN

Table of Contents Papers – (R): regular-presentation paper, (S): short-presentation paper Invited talks Towards a New Standard for System Level Design 2 S. Y. Liao System level modeling and integration On the Roles of Functions and Objects in System Specification (R) 8 A. Jantsch, I. Sander Compaan: Deriving Process Networks from Matlab for Embedded Signal Processing Architectures (R)

13

B. Kienhuis, E. Rijpkema, E. Deprettere Modeling Industrial Embedded Systems with UML (S) 18 J. M. Fernandes, R. J. Machado, H. D. Santos Power estimation Energy Estimation for 32 bit Microprocessors (R) 24 C. Brandolese, W. Fornaciari, F. Salice, D. Sciuto Power Optimization of System Level Buses based on Software Profiling (R) 29 W.Fornaciari, M. Polentarutti, D. Sciuto, C. Silvano Instruction Level Power Estimation for Embedded VLIW Cores (R) 34 M. Sami, D. Sciuto, C. Silvano, V. Zaccaria Low Power Task Scheduling for Multiple Devices (R) 39 Y.-H. Lu, L. Benini, G. De Micheli Memory estimation and optimization Co Design of Interleaved Memory Systems (R) 46 H. Lin, W. Wolf Memory Architecture for Efficient Utilization of SDRAM: A Case Study of the Computation/Memory Access Trade Off (R)

51

T. Gleerup, H. Holten-Lund, J. Madsen, S. Pedersen Storage Requirement Estimation for Data Intensive Applications with Partially Fixed Execution Ordering (S)

56

P. G. Kjeldsberg, F. Catthoor, E. J. Aas Performance estimation and timing analysis Performance Estimation for Embedded Systems with Data and Control Dependencies (R)

62

P. Pop, P. Eles, Z. Peng Program Path Analysis to Bound Cache Related Preemption Delay in Preemptive Real Time Systems (R)

67

H. Tomiyama, N. D. Dutt Fast Performance Prediction for Periodic Task Systems (R) 72 S.(Xiaobo) Hu, G. Quan

Performance Estimation of Multiple Cache IP based Systems: Case Study of an Interdependency Problem and Application of an Extended Shared Memory Model (R)

77

S. Yoo, K. Rha, Y. Cho, J. Jung, K. Choi Software Performance Estimation Strategies in a System Level Design Tool (S) 82 J. R. Bammi, E. Harcourt, W. Kruijtzer, L. Lavagno, M. Lazarescu IP cores and reuse issues A Method To Derive Application Specific Embedded Processing Cores (R) 88 O. Hebert, I. C. Kraljic, Y. Savaria Linking Codesign and Reuse in Embedded Systems Design (S) 93 M. Meerwein, C. Baumgartner, W. Glauert Parameterized System Design (S) 98 T. Givargis, F. Vahid Extended Design Reuse Trade Offs in Hardware Software Architecture Mapping (S)

103

F. Vermeulen, F. Catthoor, D. Verkest, H. De Man Software code generation and optimization Task Response Time Optimization Using Cost Based Operation Motion (R) 110 B. Tabbara, A. Tabbara, A. Sangiovanni-Vincentelli Heuristic Tradeoffs Between Latency and Energy Consumption in Register Assignment (R)

115

R. Anand, M. Jacome, G. De Veciana Code Compression as a Variable in Hardware/Software Co Design (S) 120 H. Lekatsas, J. Henkel, W. Wolf SoC design and validation A Generic Tool Set for Application Specific Processor Architectures (R) 126 F. Engel, J. Nuhrenberg, G. P. Fettweis Frequency Interleaving as a Co Design Scheduling Paradigme (R) 131 D. Thomas, J. Paul, S. Peffers Automatic Test Bench Generation for Simulation based Validation (R) 136 M. Lajolo, L. Lavagno, M. Rebaudengo, M. S. Reorda, M. Violante Design frameworks and case studies Heterogeneous Modeling and Simulation of Embedded Systems in El Greco (R) 142 J. Buck, R. Vaidyanathan Wireless Protocols Design: Challenges and Opportunities (R) 147 J.L. da Silva Jr., M.Sgroi, F.De Bernardinis, S. Fei Li,

A.Sangiovanni-Vincentelli, J.Rabaey ASDEN: A Comprehensive Design Framework Vision for Automotive Electronic Control Systems (S)

152

R. Todd Hansell, Deborah Wilson, Daniel Dayton A Novel Codesign Methodology for Real-Time Embedded COTS Multiprocessor-Based Signal Processing Systems (S)

157

R. Janka, L. M. Wills

ACM SIGDA 163 ACM SIGSOFT 164 IEEE Computer Society (DATC) 165 Author Index 167

NOTES

ACM SIGDA

SIGDA, Association for Computing Machinery's Special Interest Group on Design Automation, is the premier technical society for design automation professionals - people involved in the development and use of computer-automated tools targeting all phases of electronic design. Our focus encompasses analysis, synthesis, testing, verification, reliability, and design methodologies from system level to physical layout. We are committed to advancing the skills and knowledge of electronic design automation professionals and students throughout the world. Members of SIGDA are students, practitioners, and researchers interested in developing or using design automation tools. They work in industry, government, and academia and represent a broad range of experience. Our members include software engineers, database experts, mathematicians, theoreticians, hardware designers, and process engineers. Your membership in SIGDA presents a unique opportunity to enhance your knowledge, experience, involvement and visibility within the design automation community. It will keep you in touch with key people and activities and provide you with timely and convenient access to information of interest. It will also give you major discounts on renowned design automation conferences worldwide. As a member of SIGDA you will receive the SIGDA biannual newsletter, multimedia CD-ROM presentations and an annual proceedings compendium from the year's major conferences, and discounts on all SIGDA sponsored conferences and workshops. You will also have the option, through the SIGDA member Plus package, to receive the DAC and ICCAD proceedings immediately after each conference. For more information on ACM and SIGDA, please visit: http:www.acm.org or via http:www.sigda.acm.org Lisette Burgos ACM SIG Program Director ACM 1515 Broadway, 17th Floor New York, NY 10036 U.S.A 212-626-0616 burgos@acm.org

ACM SIGSOFT

ACM SIGSOFT focuses on issues relating to all aspects of software engineering, providing a forum for computing professionals from industry, government and academia to examine principles, practices, education, and new research results in software engineering. In addition to CODES, SIGSOFT co-sponsors the International Conference on Software Engineering, the Foundations of Software Engineering conference and a variety of one-time and on-going workshops that bring practitioners, researchers, and educators together to discuss and debate timely issues. SIGSOFT publishes a bimonthly newsletter, Software Engineering Notes, which includes articles submitted by members as well as the popular forum "Risks to the Public", which describes software safety mishaps and concerns. For more information on SIGSOFT and how to become a member: http://www.acm.org/sigsoft.

The Design Automation Technical Committee

The Design Automation Technical Committee (DATC) of the Computer Society, represents professionals involved in using, researching and developing computer-aided techniques in all aspects of design processes for computer & electronic systems. The DATC subcommittees emphasize design processes, libraries, design languages, logic synthesis, verification (including all forms of simulation), manufacturing interfaces, graphics, and database management. The DATC sponsors and co-sponsors about 15 conferences and workshops such as the Workshop on High-Level Synthesis, the International Conference on Computer Aided Design (ICCAD), the Design, Automation and Test in Europe (DATE) Conference and Exhibition, and the Conference on Computer Hardware Description Languages and Their Applications. The DATC works extensively with the many other organizations contributing to Design Automation such as: VHDL International (VI), the Design Automation Standards Subcommittee (DASC), the European SIGVHDL, and Verilog International. The DATC Web Wewsletter offers editorial space for all of these organizations. The DATC publishes the Design Automation TC Newsletter four times a year in Design & Test magazine and the Web-based Newsletter throughout the year. Become a member of DATC, obtain the benefits of an active professional organization, and contribute to the activities of DATC. You can do so using the DATC Web server which can be accessed through: http://www.computer.org/tab/DATC.

NOTES

Author Index

Aas, E. J. 56 Hebert, O. 88 Quan, G. 72 Anand, R. 115 Henkel, J. 120 Rabaey, J. 147 Bammi, J. R. 82 Holten-Lund, H. 51 Rebaudengo, M. 136 Baumgartner, C. 93 Hu, S. (Xiaobo) 72 Reorda, M. S. 136 Benini, L. 39 Jacome, M. 115 Rha, K. 77 Brandolese, C. 24 Janka, R. 157 Rijpkema, E. 13 Buck, J. 142 Jantsch, A. 8 Salice, F. 24 Catthoor, F. 56, 103 Jung, J. 77 Sami, M. 34 Cho, Y. 77 Kienhuis, B. 13 Sander, I. 8 Choi, K. 77 Kjeldsberg, P. G. 56 Sangiovanni-Vincentelli, A. 110, 147 da Silvar Jr., J. L. 147 Kraljic, I. C. 88 Santos, H. D. 18 Dayton, D. 152 Kruijtzer, W. 82 Savaria, Y. 88

De Bernardinis, F. 147 Lajolo, M. 136 Sciuto, D. 24, 29, 34 De Man, H. 103 Lavagno, L. 82, 136 Sgroi, M. 147

De Micheli, G. 39 Lazarescu, M. 82 Silvano, C. 29, 34 De Veciana, G. 115 Lekatsas, H. 120 Tabbara, A. 110 Deprettere, E. 13 Liao, S. Y. 2 Tabbara, B. 110 Dutt, N. D. 67 Lin, H. 46 Thomas, D. 131 Eles, P. 62 Lu, Y.-H. 39 Tomiyama, H. 67 Engel, F. 126 Machado, R. J. 18 Vahid, F. 98 Fei, S. 147 Madsen, J. 51 Vaidyanathan, R. 142 Fernandes, J. M. 18 Meerwein, M. 93 Verkest, D. 103 Fettweis, G. P. 126 Nuhrenberg, J. 126 Vermeulen, F. 103 Fornaciari, W. 24, 29 Paul, J. 131 Violante, M. 136 Givargis, T. 98 Pedersen, S. 51 Wills, L. M. 157 Glauert, W. 93 Peffers, S. 131 Wilson, D. 152 Gleerup, T. 51 Peng, Z. 62 Wolf, W. 46, 120 Hansell, R. T. 152 Polentarutti, M. 29 Yoo, S. 77 Harcourt, E. 82 Pop, P. 62 Zaccaria, V. 34

Session Index Invited talks System level modeling and integration Power estimation Memory estimation and optimization Performance estimation and timing analysis IP cores and reuse issues Software code generation and optimization SoC design and validation Design frameworks and case studies