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    IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. 19, NO. 3, AUGUST 2004 1263

    A Method for Synchronization of PowerElectronic Converters in Polluted and

    Variable-Frequency EnvironmentsMasoud Karimi-Ghartemani , Member, IEEE, and M. Reza Iravani , Fellow, IEEE 

     Abstract—This paper presents a new synchronization methodwhich employs an enhanced phase-locked loop (EPLL) system.The operational concept of the EPLL is novel and based ona nonlinear dynamical system. As compared with the existingsynchronization methods, the introduced EPLL-based syn-chronization method provides higher degree of immunity andinsensitivity to noise, harmonics and other types of pollutionsthat exist in the signal used as the basis of synchronization. Thesalient feature of the EPLL-based synchronization method overconventional synchronization methods is its frequency adaptivitywhich permits satisfactory operation when the centre frequency

    of the base signal varies. The proposed EPLL-based method of synchronization is also capable of coping with the unbalancedsystem scenarios. Structural simplicity of the EPLL-based methodgreatly simplifies its implementation in digital software and/orhardware environments as an integral part of a digital controlplatform for power electronic converters. The primary applicationof the proposed synchronization method is for the distributedgeneration units, e.g., wind generation systems, which utilizepower electronic converters as an integral part of their systems.

     Index Terms—Distributed generators, phase angle estimation,synchronization, PLL, power systems.

    I. INTRODUCTION

    INTERFACING power electronic converters to the utilitygrid, particularly at medium and high voltages, necessitates

    proper synchronization for the purpose of operation andcontrol of the power electronic based apparatus [1], [2]. Thesynchronization is usually carried out with respect to the phaseangle of voltage (or current) signal(s) of the utility system.The signal(s) used for synchronization are often corrupted byharmonics, voltage sags and swells, commutation notches,noise, phase angle jump and unbalanced operating conditions[3]–[8]. A desired synchronization method must detect thephase of the utility signal as fast as possible while adequatelyeliminating the impacts of corrupting sources on the signal.The synchronization process should be updated not only at thesignal zero-crossing, but continuously over the fundamental

    period of the signal [1].The need for improvements in the existing converter syn-

    chronization approaches stems from rapid proliferation of distributed generation (DG) units in electric networks. Aconverter-interfaced DG unit, e.g., a wind generator unit, a

    Manuscript received August 20, 2003.The authors are with the Centre for Applied Power Electronics (CAPE),

    Department of Electrical and Computer Engineering, University of Toronto,Toronto, ON M5S 3G4, Canada (e-mail: [email protected]; [email protected]).

    Digital Object Identifier 10.1109/TPWRS.2004.831280

    photovoltaic-based unit and a micro-turbine-generator unit,under both grid-connected and micro-grid (islanding) scenariosrequires converter synchronization under polluted and/orvariable -frequency environment.

    This paper presents a new synchronization method which notonly demonstrates a superior performance as compared with theexisting methods with respect to corrupting factors of the signal,it also provides frequency adaptivity and tolerance to unbal-anced system conditions. The main building block of the syn-chronization method is an enhanced phase-locked loop (EPLL)

    systemwhich operates as a nonlinear dynamical system [9]. An-other salient feature of the proposed method is the simplicity of structure which renders itself for digital implementation in bothsoftware environment, e.g., a DSP, or a digital hardware envi-ronment, e.g., FPGA or ASIC, as an integral part of a digitalcontrol platform for power electronic converters.

    The paper is organized as follows. Section II is devotedto a brief study of the existing synchronization schemes.They are categorized into two general branches of open-loopand closed-loop strategies. Principles of operation of fouropen-loop and two closed-loop methods are explained andtheir advantages and shortcomings are described. The proposedmethod of synchronization is presented in Section III. Sec-

    tion IV is devoted to overview the EPLL system which is themain building block of the proposed synchronization method.Performance of the method is investigated with referenceto different conditions and its advantages over the existingmethods are shown in Section V. Some properties of the methodwhich make it advantageous for digital implementation areexplained in Section VI. Section VII provides a comparisonsummary and conclusions are stated in Section VIII.

    II. EXISTING METHODS OF SYNCHRONIZATION

    This section outlines various existing methods of synchro-

    nization. They are categorized into  open-loop and  closed-loop

    methods. Open-loop methods directly estimate phase angle of the voltage based on -frame signals. In closed-loop methods,

    while the -frame voltages are being processed, the estimation

    of the phase is adaptively updated through a loop mechanism.

    This loop is aimed at locking the estimated value of the phase

    angle to its actual value.

     A. Open-Loop Synchronization Methods

    In an ideal case that no distortion/unbalance is present,

    represent the grid voltages for which the transformed

    0885-8950/04$20.00 © 2004 IEEE

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    KAR IM I- GHART EM ANI AND I RAVANI : A ME THOD FOR S YNCHRONI ZAT ION OF P OW ER ELE CT RONI C CONVERTE RS 1 265

    Fig. 3. Block diagram of the three-phase PLL system.

    should also take into account the PLL environment. More

    specifically, distortion types, noise level, and the rates of phase

    and frequency variations should not be overlooked.

    2) Extended Three-Phase PLL-Based Method:   The major

    disadvantage of the three-phase PLL is its sensitivity to grid

    voltage unbalance. Some attempts have been made to extendthis method for unbalanced voltages based on the concept of 

    symmetrical components.

    Although the concept of symmetrical components is origi-

    nally defined with respect to phasors, one can extend it to the

    signals as functions of time. The idea is to replace the com-

    plex phasor with a phase-shift operator in

    time domain [6]. The phase-shift operator of 90-degree is easier

    to implement [7]. Using , one

    can derive the time-domain positive sequence components. The

    time-domain positive sequence system is defined as

    (2)

    where superscript stands for the fundamental component

    Rewriting (2) in terms of 90-degree phase-shift operator yields

    (3)

    In (3), is a 90-degree phase-shift operator. A block dia-

    gram of the positive sequence extractor based on (3) is shown

    in Fig. 4, [7]. This block diagram is a modified version of the

    one presented in [7]. In [7], (5) does not fully take care of unbal-

    ance. More specifically, it ignores the unbalance at some points.

    The filters in Fig. 4 should be all-pass and generate a 90-degree

    phase-shift at the center frequency . A simple first-order filter

    such as can be used for this purpose.

    The idea of using the positive sequence component for robust

    phase detection, under unbalanced conditions, is conceptually

    Fig. 4. Positive sequence extractor based on all-pass filters with 90-degreephase shift at the center frequency.

    interesting. However, the method of [7] for detecting the instan-

    taneous positive sequence has the following shortcomings.

    1) All-pass filters are not frequency-adaptive. Therefore,

    they can not make appropriate 90-degree phase shift

    when the frequency varies from its nominal value of .

    2) All-pass filters do not block harmonics and distortions.

    Therefore, the performance of the phase detection scheme

    to some degree is compromised. A low-pass filter is rec-

    ommended to be used after -component extraction to re-

    duce the impact of harmonics, [7].

    III. PROPOSED METHOD OF SYNCHRONIZATION

    A block diagram of the proposed method is shown in Fig. 5.

    The positive sequence component is extracted by the first block 

    and then is passed to the EPLL to estimate its phase angle. In

    other words, this structure is based on extracting the positive se-quence of the input voltages and then extracting the phase angle

    based on this component. This strategy considers the effect of 

    all three phases of the system while maintaining adequate in-

    sensitivity with respect to unbalanced conditions.

    The block diagram for extracting the positive sequence com-

    ponent is also shown in Fig. 5. This unit is comprised of three

    EPLLs and arithmetic operations. The EPLLs adaptively extract

    the fundamental components of the system voltages and their

    90-degree phase-shifted versions. The arithmetic blocks receive

    the fundamental components and the corresponding 90-degree

    phase-shifted components and calculates the positive sequence

    component of the utility voltages based on (3). The computa-

    tional procedure is the same as the computational unit  shown inFig. 4.

    Advantages of this method with respect to the extended three-

    phase PLL-based method are as follows. The all-pass filters

    are replaced with EPLLs in the proposed structure. EPLL is

    an adaptive notch filter whose frequency moves based on the

    center frequency of the grid. This prevents sensitivity of the

    method with respect to frequency variations which is a major

    deficiency of the method of [7]. Moreover, since the EPLL is a

    bandpass filter rather than an all-pass filter, the extracted posi-

    tive sequence is highly distortion-free. Indeed, the input signal

    undergoes two stages of filtering: one in the positive sequence

    extraction stage and then in the phase estimation stage.

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    1266 IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. 19, NO. 3, AUGUST 2004

    Fig. 5. Block diagram of the proposed method of phase detection.

    Fig. 6. EPLL Structure.

    IV. EPLL SYSTEM

    This section is devoted to the EPLL of [9] which isused asthe

    building block of the proposed synchronization scheme of this

    paper. EPLL is well suitedfor powersystem applications since it

    not only provides an output signal whose phase is locked to that

    of the fundamental component of the input signal, the output

    signal is also locked to the fundamental component of the input

    signal in its amplitude and frequency. In other words, EPLL

    is capable of providing an on-line estimate of the fundamentalcomponent of the input signal while following its variations in

    amplitude, phase, and frequency.

    In addition to the on-line estimate of the fundamental compo-

    nent, EPLL also provides an on-line estimate of the basic param-

    eters of this component including its amplitude, phase, and fre-

    quency. This is the salient feature of EPLL. Another important

    feature of EPLL is that it provides the 90-degree phase-shifted

    version of the fundamental component. This is readily done by

    EPLL since it directly estimates the phase angle of the funda-

    mental component of its input.

    An implementation of EPLL of [9] is shown in Fig. 6, in ac-

    cordance with the conventional PLL structure which consists of 

    a PD, LF, and VCO. The input signal is compared with itsextracted smooth version to generate an error signal

    which is used by LF to generate a driving signal for VCO.

    The basic structure of Fig. 6 has three independent internal

    parameters: , and . Parameter dominantly

    controls the speed of convergence of amplitude . Parameters

    and control the rates of convergence of phase

    and frequency. A low-pass filter can be incorporated after the

    integration unit in the VCO to obtain a smoother estimate of 

    the phase angle when the utility signal is distorted.

    The EPLL is originally applicable to a single-phase signal.

    All the previous methods, except EKF, are suited only for three-

    phase situations. However, four units of similar EPLL units are

    Fig. 7. Performance comparison of five existing methods and the EPLL-basedmethod in the presence of noise.

    Fig. 8. Performance comparison of five existing methods and the EPLL-basedmethod in the presence of harmonics.

    linked together in the proposed synchronization method to build

    a three-phase structure which is highly immune to distortions

    and unbalanced conditions.

    V. PERFORMANCE  EVALUATION

    Performance of the EPLL-based method of synchronization

    is evaluated by means of a number of simulations.

    Fig. 7 shows the steady-state error which occurs in phase

    angle detection due to the presence of noise. For a high

    signal-to-noise-ratio (SNR) of 0 dB, the error is almost 5degrees and decreases to less than one degree as SNR goes

    above 10 dB. Among the existing methods, the LPF-based

    method generates the largest error while the EKF-based,

    the PLL-based, the SVF-based, and the LSE-based methods

    perform better, respectively. Comparing with the conventional

    three-phase PLL-based method, the proposed method performs

    almost twice as good.

    The proposed method provides a highly distortion-free esti-

    mate of the phase angle in the presence of harmonic pollution. A

    set of study results are shown in Fig. 8. The input signal is com-

    prised of a fundamental component and a fifth harmonic com-

    ponent. The amplitude of this harmonic is taken as the variable,

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    KAR IM I- GHART EM ANI AND I RAVANI : A ME THOD FOR S YNCHRONI ZAT ION OF P OW ER ELE CT RONI C CONVERTE RS 1 267

    Fig. 9. Response of the EPLL-based method to a phase jump of 10 degrees at  ms.

    Fig. 10. Response of the EPLL-based method to a frequency jump of 5 Hz at  ms.

    and its effect on the steady-state performance is shown. As the

    parameter varies from zero to 0.4, a maximum error of almost

    0.2 degrees is generated by the EPLL-based method. The LSE-

    based method generates an error which is almost twice. Theerror associated with the conventional three-phase PLL-based

    method is around 20 times larger.

    Effects of jumps in phase and frequency are shown by Figs. 9

    and 10. A phase jump of 10 degrees occurs in the input signal at

    time msec and the error in tracking this variation by the

    EPLL-based method is shown in Fig. 9. A transient error with

    a peak of about 10 degrees is observed which dies out in a few

    cycles. In Fig. 10, a frequency step of 5 Hz occurs in the input

    voltage at time msec and the error introduced in the

    estimated phase angle using the EPLL-based method is shown.

    Similarly, a transient error is generated which decays to zero in

    a few cycles. The EPLL-based method adaptively follows the

    phase and frequency variations with no steady-state errors.Unbalance tolerance is another main feature of the

    EPLL-based synchronization scheme. In Fig. 11, a 50% voltage

    sag occurs simultaneously in phases and at msec.

    The method is able to adjust itself to the new condition with

    no steady-state error. In a very significant unbalance scenario

    (Fig. 12), a random voltage sag is imposed on all three phases

    of the utility voltages. Fig. 12(a) shows the input signals. The

    estimated phase angle has no steady-state error, Fig. 12(b).

    In the last case, a step-up of 10 degrees occurs in the phase

    angle of at ms. Fig. 13 shows that the method

    adjusts itself to the new condition within a few cycles and no

    steady-state error.

    Fig. 11. Response of the EPLL-based method to 50% voltage sag on phases  and     at    ms.

    Fig. 12. Response of the EPLL-based method to a random voltage sag on allthree phases at    m: (a) input signals and (b) error in estimated phaseangle.

    Fig. 13. Response of the EPLL-based method when the phase angle of   undergoes a 10-degree step-up at    ms.

    The proposed system is employed for synchronization pur-

    pose in a DG system to investigate micro-grid operational sce-

    narios [17]. The system of Fig. 14 is a single-line diagram of a

    three-phase system which is used to investigate micro-grid op-

    erational scenarios [17]. The basic configuration and parameters

    come from the IEEE Standard 399-1997. This system is com-

    posed of a 13.8 kV, three-feeder distribution subsystem which

    is connected to a large network through a 69-kV radial line. A

    combination of conventional and nonconventional loads ( to

    ) are supplied through three radial feeders. Loads to

    are composed of linear RL loads. Load is a diode-rectifier

    load. The aggregate of and constitutes a sensitive load

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    1268 IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. 19, NO. 3, AUGUST 2004

    Fig. 14. Single-line diagram of the DG system.

    within the distribution system. The system includes two gen-

    eration units: DG1 (5 MVA) and DG2 (2.5 MVA) located on

    the first and third feeders. A voltage-source converter (VSC) is

    utilized by DG2 as an interface to control exchange of active

    and reactive powers for the sensitive load [17]. Conventional

    three-phase PLL [3], [15] is optimally set and its performance

    is compared with the proposed EPLL-based system in this sec-

    tion. To make the comparison, both the PLL and the EPLL areused to measure the frequency. The DG1 speed is used as an

    index to judge accuracy and convergence. The power system is

    modeled in PSCAD/EMTDC environment and the EPLL-based

    system is simulated in Matlab/Simulink and is properly inter-

    faced to the power system.

    A line-to-ground fault occurs on the 69-kV line at s.

    The fault is cleared by triple-pole operation of CBs at both ends

    of the line, five cycles after the fault inception, i.e., at

    s, and a micro-grid is formed due to the accidental islanding.

    The islanding phenomenon is detected five cycles after the CBs

    open, i.e., at s, at which time the micro-grid control

    strategy of the DG units is activated. Results of frequency and

    phase angle estimation are shown in Fig. 15 that confirms closebehavior of the PLL and EPLL. However, the zoomed version

    of the graph over the fault period, Fig. 16, reveals that the PLL

    is not capable of providing an accurate estimate for frequency

    neither for phase angle. The reason isdue to the presence of fault

    which makes the voltages unbalanced. Oscillatory behavior in

    estimated frequency by the PLL is observed [Fig. 16(a)] even

    though some low-pass filters are already employed to smoothen

    its response. On the contrary, the EPLL is capable of providing

    a smooth and accurate estimate of the frequency [Fig. 16(a)].

    Similar error is also observed in the estimated phase angle by

    the PLL, which is shown in Fig. 16(b).

    Another case study investigates the micro-grid for-

    mation and its electrical transients due to a permanentline-to-line-to-line-to-ground (L-L-L-G) fault on the 69-kV

    line. The time intervals corresponding to fault clearing, is-

    landing detection and reclosure attempts are the same as those

    of the previous case studies except that system islanding is

    detected in two cycles (as opposed to five cycles in the previous

    cases). Islanding detection in two cycles is possible in this case

    because of the severe voltage drop due to the L-L-L-G fault.

    Fig. 17 shows the estimated frequency and phase angle by the

    PLL and the EPLL. The EPLL provides more accurate results

    with better transient response. A zoomed version of this graph

    is shown in Fig. 18 for better view of the performance of PLL

    and EPLL during unbalanced conditions.

    Fig. 15. Temporary line-to-ground fault at      s, islanding at    s, and reclosure at      s: (a) DG1 speed, estimated frequency by PLL,and estimated frequency by EPLL and (b) difference between estimated phaseangles by PLL and EPLL.

    Fig. 16. Zoomed version of Fig. 15 over the fault period of [0.5 0.583] s.

    Fig.17. Three-phase line-to-ground fault. (a) DG1 speed, estimatedfrequencyby PLL, and estimated frequency by EPLL. (b) Difference between estimatedphase angles by PLL and EPLL.

    VI. DIGITAL IMPLEMENTATION

    This section studies advantages of the EPLL-based method

    from the standpoint of digital implementation. The proposed

    method is fundamentally comprised of a number of EPLLs. The

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    KAR IM I- GHART EM ANI AND I RAVANI : A ME THOD FOR S YNCHRONI ZAT ION OF P OW ER ELE CT RONI C CONVERTE RS 1 269

    Fig. 18. Zoomed version of Fig. 17.

    continuous-time differential equations governing an EPLL are

    derived from the block diagram of Fig. 6 as

    (4)

    where d ot o n top s tands f or t ime d erivative, is

    the error signal, is the input signal,

    is its fundamental component, and , and are the

    amplitude, frequency, and phase angle, respectively.

    A discrete-time version of (4) can be derived based on the first

    approximation of the derivative for digital implementation pur-

    poses. The investigations show that the first-order approximated

    system adequately maintains the desired properties of the algo-

    rithm due to the structural robustness of the EPLL. Assuming

    sampling period of , the discrete-time recursive equations are

    (5)

    where , and are called

    step sizes. These equations resemble the LMS algorithm used

    in signal processing applications. The LMS algorithm is known

    for its simple structure and efficient performance in many ap-

    plications.

    Equations (5) are well suited for implementation on software

    (e.g., DSP) platforms or hardware (e.g., FPGA or ASIC) plat-

    forms due to their simplicity of structure. An important feature

    of this algorithm is that its three parameters arequalitative parameters. These parameters are directly related to

    , and , respectively. This indicates that small varia-

    tions of these parameters do not affect theperformance of EPLL.

    This is very important in fixed-point implementations for which

    bit-length limitations exist.

    The feasibility of the EPLL algorithm is verified in laboratory

    using the TMS320C6711 Texas Instruments™   floating point

    platform. It comprises an on-board power supply, peripherals

    providing A/D and D/A units and the shell program through

    which the DSP is controlled. The C programming language is

    used to write the code. Fig. 19 shows a distorted signal whose

    phase angle is extracted by the proposed method.

    Fig. 19. Implementation on DSP: (a) distorted input and (b) extracted phaseangle.

    Further evaluations have been carried out regarding the per-

    formance of the discrete version of the synchronization method

    using Fixed-Point Blockset in Matlab Simulink environment.

    The results confirm that the method performs well even when

    it is implemented with a relatively low number of bits, e.g., 8 or

    10 bits.

    VII. SUMMARY OF COMPARISONThis section provides a qualitative comparison of the EPLL-

    based method with the existing synchronization methods. The

    methods are compared from the following standpoints.

    •   Noise immunity.

    •  Distortion/disturbance rejection.

    •  Phase angle adaptivity.

    •   Frequency adaptivity.

    •  Unbalance robustness.

    •  Structural simplicity (ease of design, tuning and imple-

    mentation),

    An index is defined with respect to each item to relatively com-

    pare performances of the methods. The possible range of per-formance is divided into six regions, as follows.

    •   (0)  Lacking: means that the method takes no account of 

    that parameter and hence the performance of the method is

    completely prone to that specific parameter. For example,

    the LPF-based method does not consider frequency varia-

    tions and its performance with respect to frequency varia-

    tions is not acceptable.

    •   (1) Bad : means that although the method has not taken that

    parameter into consideration in its structure, nevertheless,

    its performance can be acceptable in some scenarios. Ex-

    amples of this are all the open-loop methods with respect

    to unbalance. Although they do not consider any precau-

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    1270 IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. 19, NO. 3, AUGUST 2004

    TABLE ICOMPARISON OF THE SYNCHRONIZATION METHODS

    tions for unbalanced conditions, nevertheless, due to the

    symmetry of the to transformation, they may re-

     ject impact of some types of unbalance.

    •   (2) Average: means that the method inherently has the ten-

    dency to improve its performance in this regard but it can

    not reach the desired level, even though, some improve-

    ments are achieved. For example, the extended SVF-based

    method tries to accommodate frequency variations but it

    can not perform a satisfactory job.

    •   (3) Good : means that the performance is  “good enough”.For example, most of the methods offer a  good  harmonic

    rejection. This is as far as some ordinary applications are

    concerned, but the estimated value may not be sufficiently

    precise for more crucial applications.

    •   (4) Very Good : means that the method performs very well,

    however, there might still be some room for improvement.

    •   (5) Excellent : means that the method performs as good as

    possible for the prescribed application and no further im-

    provement is desired with regard to this specific factor. For

    example, all the methods properly follow the step changes

    in the phase angle. No more improvement in this regard is

    needed.

    Table I shows the comparison results. Major shortcomingsof the existing methods can be summarized as follows. The

    LPF-based method is not capable of adjustment to frequency

    variations. Its performance is also affected by the utility voltage

    unbalance. The SVF-based method has the same shortcomings

    as the LPF-based method while it performs better with respect

    to utility distortions and noise. The main drawback of the three-

    phase PLL method is that it cannot accommodate voltage un-

    balance. Although the extended three-phase PLL method elim-

    inates this shortcoming, it is sensitive to frequency variations.

    The introduced EPLL-based method has no major shortcoming

    comparable to the other methods.

    VIII. CONCLUSION

    A new synchronization method is proposed and its perfor-

    mance is evaluated. The method is based on an EPLL system

    which offers structural simplicity and robustness. The EPLL-

    based method of synchronization is immune to noise, harmonics

    and other types of distortion. It is capable of coping with unbal-

    anced conditions and it is frequency adaptive. Its structural sim-

    plicity and robustness makes it suitable for digital implementa-

    tion as an integral part of digital controller platforms for power

    electronic converters.

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    [17] F. Katiraei, M. R. Iravani, and P. W. Lehn, “Micro-grid autonomous op-eration during and subsequent to islanding process,” IEEE Trans. Power Syst., to be published.

    Masoud Karimi-Ghartemani (M’01) received the B.Sc. and M.Sc. degrees inelectrical engineering from Isfahan University of Technology, Isfahan, Iran, in1993 and 1995 and the Ph.D. degree in electrical engineering from Universityof Toronto, Toronto, ON, Canada, in 2004.

    He was with the Center for Applied Power Electronics (CAPE), Departmentof Electrical and Computer Engineering, University of Toronto, from 1998 to2001. His research is focused on developing control and signal processing algo-rithms for power systems protection, control and power quality.

    M. Reza Iravani (M’85–F’03) received the B.Sc. degree fromTehranPolytech-nique University, Tehran, Iran, in 1976 and the M.Sc. and Ph.D. degrees fromthe University of Manitoba, Winnipeg, MB, Canada, in 1981 and 1985, respec-tively, all in electrical engineering.

    He started his career as a Consulting Engineer in 1976. Presently, he is a Pro-fessor at the University of Toronto, Toronto, ON, Canada. His research interestsinclude power electronics and power system dynamics and control.