9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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AIDA Frontend Electronics progress report.

•Mezzanine to FEE64 connection.•Mezzanine Layout•FEE64 layout•Digital channel analogue buffering.•PowerPC external memory•Power supply structure•Parts cost

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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Mezzanine connectionsASIC bonding works best if the

underneath of the pcb is flat and clean of components.

These Samtec FSI connectors only require gold plated pads on the mezzanine board.

Locators on the connectors and 15 bolts will provide alignement.

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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Mezzanine layoutD

iscr

imin

ato

rs

Linear regulatorsDAC and monitors

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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FEE64 Layout

Virtex5 16Mx64SDRAM

GbitEthernet

Dual buffer

FADC

Connectsto FADCs and ASICs

Connectsto DDR2 SDRAM

Virtex5 bank layout

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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Digital channel analogue buffering

Preamp output referenced to the VREF from the ASIC and converted to differential signal centered about the ADC reference.

ASIC reference buffered once for 16 channels.

Input from ASIC

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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PowerPC external memory

• 16M x 64 bit DDR2 SDRAM to hold LINUX operating system, and data buffers. (400Mhz)

• Flash memory to hold FPGA fabric program and the Linux boot loader software. (Xilinx device)– Flash memory will hold a “golden” copy of each and

allow later versions to be written by the Linux system. And be selected automatically for at power-up with a “fallback” to the “golden” copy in case of failure.

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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Power supply structure

Input30V@4.64A139.2 watts

3mmx3mm

Rated 5A per pin

9th October 2008 AIDA FEE progress report P.J.Coleman-Smith

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Parts cost

Submitted BOM to assembler.Cost per FEE64 £1300 when making

6– Includes supported pricing for Xilinx

parts.