8051 TimersELE-475 Microprocessor Systems Design
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ELE-475 Microprocessor Systems Design
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Timers and TMOD register
The 8051 has two timers, each 16-bit but addressed as two bytes (TH0 and TL0 for timer 0, TH1 and TL1 for timer 1)
There is a register TMOD that sets the operating modes for both timers
TMOD
GATE
C/T
M1
M0
Timer 1
Timer 0
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ELE-475 Microprocessor Systems Design
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M1 and M0 select the timer mode
Mode 0 uses the high byte as an 8-bit counter and the low byte as a 5-bit pre-scaler
Mode 1 uses the high and low bytes as 16 bits for counting or timing
Mode 2 uses the high byte to hold a value which is loaded into the low byte every time the low byte overflows
Mode 3 allows the bytes to be used for separate timer events
M1
M0
Mode
0
0
0
ELE-475 Microprocessor Systems Design
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The C/T TMOD bit
C/T determines whether the timer is for delay generation (C/T = 0) or an event counter (C/T = 1) with counter input from Tx input pin
As a timer the timer register counts machine cycles (clock frequency divided by 12).
The count in the register that will indicate a particular elapsed time therefore depends on the clock frequency
A clock frequency of 11.0592 MHz is often used as this allows reliable serial communication with PCs, but makes timing in minutes or seconds more complex
Examples of TMOD instructions
MOV TMOD, #01H ; loads 00000001 (mode 1 as timer of timer 0)
MOV TMOD, #51H ; loads 01010001 (mode 1 as counter for timer 0
;and mode 1 as timer for timer 0)
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The GATE TMOD bit
Timers are started and stopped by setting and clearing the TRx bit
Changing these bits only starts or stops the timer if the GATE bit in TMOD = 0
If the GATE bit = 1, then the timer is started or stopped by external hardware interrupt signals (see later)
If the clock frequency is 11.0592 MHz, then the machine cycle length = 12/(11.0592 x 106) = 1.085 ms
Each count in the register therefore represents 1.085 ms
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Using the timers
Values from 0000 to FFFFH can be loaded into the timer registers
The timer is then started with SETB TR0 or SETB TR1 depending on whether timer 0 or timer 1 is to be used.
The timer will then count up to FFFFH and then roll over to 0000. The TF (timer flag) bit is set when it rolls over, TF0 or TF1 depending on the timer.
A delay can be programmed by setting an initial value in the timer register, starting the timer and monitoring TF. The delay time would be the time taken to increment the timer from the initial value to FFFFH
If initially 147AH was loaded to the register and the clock frequency was 11.0592 MHz the delay until TF was set would be (FFFFH-147AH) x 1.085 ms = EB85H x 1.085 ms = 60293 x 1.085 ms = 65.4 ms
Finished here 28 Jan 09
ELE-475 Microprocessor Systems Design
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Problem sheet Q9
What values would you initially load into the TH0 and TL0 registers if you are using a clock frequency of 11.0592 MHz and you want to have a delay of 65 ms?
15FB
ELE-475 Microprocessor Systems Design
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MOV TH0, #14H ; load 14H to high byte
CPL P1.5 ; toggle bit 5 of port 1
ACALL DELAY ; call subroutine DELAY
SJMP HERE ; start again
;------------------delay using timer 0
AGAIN: JNB TF0, AGAIN ; monitor when timer 0 rolls over
CLR TR0 ; stop timer 0
CLR TF0 ; clear timer 0 flag
RET
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Generating long delays
The maximum time if the timer starts at 0000 until TF is set for 11.0592 MHz clock is FFFFH x 1.085 ms = 71.1 ms
To generate longer delays the number of times the timer register rolls over must be counted.
Example
AGAIN: MOV TL1, #08H ;TL1=08, low byte of timer
MOV TH1, #01H ;TH1=01,Hi byte
SETB TR1 ;start the timer 1
BACK: JNB TF1, BACK ;stay until timer rolls over
CLR TR1 ;stop timer 1
CLR TF1 ;clear timer flag 1
DJNZ R3, AGAIN ;if R3 not zero then reload timer
Total time is 200 x (65535-264) x 1.085 ms = 14.16 s
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Using mode 2
In mode 2 values of 8 bits are loaded into the TH register.
The value is then automatically copied to the TL register
The timer is started in the same way as for mode 1 and TL is incremented. When it reaches FFH, TF is set and the initial value is automatically copied from TH to TL.
TF must then be cleared and the count up will repeat
Example
MOV TH1, #5 ;TH1=5
SETB TR1 ;start the timer 1
BACK: JNB TF1, BACK ;stay till timer rolls over
CPL P1.0 ;comp. P1.0 to get hi, lo
CLR TF1 ;clear timer flag 1
SJMP BACK ;mode 2 is auto-reload
ELE-475 Microprocessor Systems Design
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Using the registers as counters
If the C/T bit in the TMOD register is set to 1 the timer registers will count the number of pulses that are fed to the timer pins (pins 14 (T0) and 15 (T1) on the 40-pin package – see later).
Hence for timer 1, when C/T = 1 each pulse on pin 15, which is also pin 5 of port 3, will increment the timer 1 register
Suppose packages of pills were going along a conveyor and a photocell produced a pulse every time a package passed it
An 8051 is required to count the packages and output the count to port 2 (only 8 bits can be transferred to port 2, so use mode 2 )
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MOV TMOD, #01100000B ;counter 1, mode 2,C/T=1 ; external pulses
MOV TH1, #0 ;clear TH1
SETB P3.5 ;make T1 input
AGAIN: SETB TR1 ;start the counter
BACK: MOV A,TL1 ;get copy of count TL1
MOV P2, A ;display it on port 2
JNB TF1, Back ;keep doing it if TF=0
CLR TR1 ;stop the counter 1
CLR TF1 ;make TF=0
SJMP AGAIN ;keep doing it
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TCON register
TF and TR are bits in the TCON (timer control) register that also has bits connected with interrupts (see later)
Hence TR0 is also TCON.4, TF0 is TCON.5, TR1 is TCON.6 and TF1 is TCON.7
TCON is bit-addressable
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Use of GATE in timer mode
If the GATE bit is set to 1, start and stop of the timer is by the P3.2 (for timer 0) and P3.3 (for timer 1) pins