8-a 3c strategy for multi-module

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A 3G Strategy for Multi-Module Inverters in Parallel Operation toAchieve an Equal Current DistributionT.-F. Wu, Y.-H. Huang, Y.-K. Chen and Z.-R. Liu

Power Electronics Applied Research Laboratory(PEARL)Department of Electrical EngineeringNational Chung Cheng UniversityMing-Hsiung, Chia-Yi, Taiwan, R.O.C.E-mail: [email protected]: 886-5-2428159; Fax: 886-5-2720862Abstract-A circular chain control (CCC or 3C)strategy f o r multi-module inverters in paralleloperation to ac hieve an e qual current distributionis presented in the paper. In the propo sed invertersystem, al l the modules have the same controlconfiguration and each module includes innercurrent loop and outer voltage loop controls. TheP I controller is adopted as the inner current loopcontroller to expedite the dynamic response; theH " robus t control is adopted to reduce the inter-active effect among the inverters connected inparallel. With the 3C stratea, the modules are incircular chain connection and each module hasan extra control to track the inductor current oits previous module to achieve an equal currentdistribution. Simulation results o a two-modulean d a hree-module inverter systems with differentkinds o loads and with module discrepancy havedemonstrated the feasibility of the proposed con-trol scheme in equal current distribution an d fa stregulation. Hardwave measurements are alsopresented to veri& the theoretical discussion.

I. INTRODUCTIONIn recent years, sinusoidal pulsewidth modu-lated (SPWM) inverters have found their wideapplications in various types of ac power condi-tioning systems, such as automatic voltage regu-lator (AVR) and uninterruptible power supply(UPS). Parallel operation of inverters to obtain alarger power capacity and to improve the system

reliability becomes the trend of power systemdesign. Two or more inverters operating in paral-lel must satisfy the following conditions:1) Proper current distribution among invertersaccording to their capacities, and tight outputregulation.2) Accommondation with various types of loads.

To meet the above conditions, there are severaltypes of control strategies were proposed in theliterature [I]-[ 101. Phase locked loop (PLL) con-trol technique was used to synchronize the outputvoltage among inverters [l], [2], [SI-[lo]. Theresponse to load change, however, is sluggish.Multi-loop control scheme [6] was proposed toimprove its current distribution among invertermodules. For those inverter modules with non-identical component characteristics, certain con-trol strategies are adopted to distribute the outputcurrent among the modules connected in parallel.These strategies can be roughly classified intomaster-slave control (MSC) and central-limitcontrol (CLC). In an MSC controlled system, themaster module is responsible for output voltageregulation, while the slave ones will track the cur-rent command sensed from the master to achievean equal current distribution. For a multi-moduleinverter system with a CLC, all the modules canhave the same configuration and each module willtrack the average current of all the modules toachieve an equal current distribution. Each ofthese two controls has its ow n merits.In this paper, a control algorithm named circu-lar chain control (CCC or 3C) is proposed. Withthis control, the successive module will track thecurrent of its previous module to achieve an equalcurrent distribution. The first module will trackthe last one to form a circular chain connection. Asystem with this control can yield the perform-ance in between those of MSC and CLC. The per-formance of these three controls are qualitativelycharacterized in Table I. Note that in the proposedsystem, each inverter module is regulated by aninner current loop and an outer voltage loop. The

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proposed control method with the inner loop canachieve a fast dynamic response readily. There-fore, amplitude, frequency and phase can be syn-chronized and proper current distribution amonginverters can be achieved. In addition, an H" ' YO -bust control [ I I]-[14] is adopted to reduce inter-active effects among the inverters connected inparallel; thus, the output voltage can be well re-gulated.Table I Comparison among the Performance of theMSC, CLC and CC C controlled inverters in

PerformanceIndex

rise-timeControl Scheme

M SC I CL C I C C C ( 3 C )short I short I short

settling time I long I short I short 11II. .control cost

reliabilityredundancv

smallovershoot I large I sinall I11 steady state error I small I small I

low high moderatelow high highlow hieh high

II rivole I laree I small I moderate II

robustness at1 . v a r i a t i o n o f t h e n u m b e rof modules2 . v a r i a t i o n o f t h e m o d u l echaracteristic

3. load variation

lo w high highlo w high moderatehigh high high4. input voltage variation I high I high I highflexibility I high I low I high

11. CONFIGURATION OF THE MULTI-MODULEINVERTERYSTEMThe proposed multi-module inverter systemcan be conceptually illustrated by Fig. 1, in whichthe detailed schematic of each module and con-

trollers are depicted in Fig. 2. The controllers ofthe proposed system consist of 1) an inner currentloop controller for regulating the inductor current,2) an outer voltage loop controller senses forregulating the amplitude and frequency of a sinu-soidal output voltage. In the proposed system with3C strategy, the inductor current of inverter n-I isused as the reference of inverter n. Note that thereference current of inverter I is obtained fromthat of inverter n. That is, all the inverters form achain. The full-bridge switches and L-C filter areincluded in each inverter module. The 3C algo-rithm is realized with a 16-bit single chip micro-processor (80196KC), which also generates theSPWM driving signals for the switches.

I -

Module 2 I 1

Fig.1 Circuit configuraitionof the proposed multi-module inverter system

80196KC nvertel Controllers

Fig.:! Circuit schematic of a single-module inverterI I I . 3 c STRATEGY FOR MULTI-MODULE

~NVERTERSEach inverter with the 3C strategy includes twocompensators; one is for inner current loop andthe other is for outer voltage loop. PID and H "robust control techniques are adopted to designcompensators for regulating filter-inductor currentand output voltage, respectively.

A . Modeling of Multi-module InvertersInvestigating the dynamic behavior of the pro-posed multi-module iinverters will help to devise asystem with desired performance. This usuallyinvolves deriving small-signal model of the in-verter and designing a suitable controller. Thesmall-signal model of an inverter module withcontollers represented in the block diagram isshown in Fig. 3(a), where Kef is the referencevoltage, v, s the output voltage, vfi is the feed-back voltage, i, is the feedback current, ifl is theinductor current, and G,,(s) and G,,(s ) are theouter loop and inner loop controllers, respectively.H , and H , represent the feedback gains, m, isthe modulation ratio and K,,, is the gain of thepower stage. The small-signal model of the pro-posed two-module inverter system, thus, can bederived, as shown in Fig. 3(b).

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U

I I - I

Fig.3 Control block diagram of (a) the single-moduleinverter (b ) the two-module inverter.It can be observed from Fig. 3(b) that interac-tions between the two modules may occur. Theanalytical expression of the transfer functions ofcontrol to the desired outputs can not be a simpleform. Thus, for practice and simplicity whilewithout loss of physical meaning, numerical solu-tions are used to illustrate the required informa-

tion for controller designs. Figs. 4and 5 show theplots of the magnitudes of control-to-inductorcurrent transfer function ( i, d ) and control-to-output voltage transfer function (V , d ) versusfrequency under several different load conditions,respectively. Note that as shown in Fig. 4, theinner-loop small-signal transfer characteristic ofthe two-inverter system is the same as that of asingle inverter. However, the outer-loop small-signal transfer characteristic of the two-invertersystem is different from that of a single inverter.B. Design o a prope r controller f o r inner

current LoopPID compensation technique has been usedrelatively often in industrial application for itssimplicity and easy implementation. In this study,it is adopted to design a controller for the innercurrent loop. Consider the transfer function of aPID compensator:

(1),(s)= K p + - + K d * SLSwhere K, , is a proportional gain, K , is an integralgain and K , is a derivative one. The derivativepart of a PID compensator can improve the tran-sient response of a system, but it may accentuate

noises at higher frequency. Thus, only an PI com-pensator is designed and implemented in the pro-posed system.1o2

oo 1ooE

I O 2

l req

Fig. 4 The plot of the magnitudes of control-to-inductor current transfer function ( i, d ) ver-sus frequency under several different load con-ditions.15

..........._____.........1 01 - - - - - - - - - - -

F0I O 2 1oo 1o2 1o+ 1Oh

f r e qFig. 5 The plot of the magnitudes of control-to-outputvoltage transfer function (e,, d ) versus fre-quency under several different load conditions.C. Design of a robust controllerf o r outer voltage

A block diagram used to illustrate the proposedH " robust control is depicted in Fig. 6, in whichthe uncertainty-plant is with three uncertainties,the variation of component value, load variationand interaction among the multi-module inverters.In the discussion, the variation of the componentvalue is combined with the variation of the load.The design procedure of robust control is outlinedas follows:1) Augment the plant G(s) with weighting func-

tions W,(s) and W 2 ( s ) based on the desiredperformance indices. The augmented plantP(s) can be conceptually illustrated by Fig. 7 .Generally, weighting function W,(s) is a typi-cal low-pass filter, shaping the sensitivityfunction S at low fi-equency to reject distur-bances and reduce tracking errors. Weightingfunction W,(s) is chosen to be a high-passfilter, shaping T at high frequency to minimizethe instability effects.

loop

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2) Find a robust controller K(s) such that

VI

where S and T denote the sensitivity functionand the complementary sensitivity function, re-spectively.3) Verify if the design is close to the desired per-formance indexes based on the evaluation ofthe singular value bode plot. If it is not weneed to go back to step 1) to select another setof weighting functions and go through allsteps.

1 I I I -Inverted Inverter' Inverter'

1 2 nI I I 1 I

-1 I voe.. >

Fig. 6 Control block diagram of the proposed multi-module inverter with an H" robust controller.

Fig. 7 Illustration of an augmented plant with a robustcontroller.

IV. ILLUSTRATIONXAMPLESTwo examples of a single-module inverter and

a two-module inverter system with PI and H"robust controllers are used to illustrated the previ-ous discussion. The design specifications of theabove examples are given as follows:A. Inner loop

1) phase margin (PM)2 60" and gain margin2) bandwidth2 5 kHz,3) Minimizing the sensitivity to load variation.

(GM)2 40 dB,

B. Outer loop1) PM2 45" and GM 2 40 dB,2) bandwidth2 5 Wz,3) Minimize the sensitivity to load variation andinteraction among the inverters in parallel.

Example 1: Single-M[odule InverterThe electrical specifications and componentvalues of a single module are collected in Table 11.The PI controller of the inner loop can be de -signed according to the bode plot shown in Fig. 4. In addition, weighting functions W, (s) and W, s)of the outer loop are slelected as

and(3)

0 . 4 ~ +1W 2 0 ) = s 6;0010-6 1 . (4)The H " robust controller can be derived withMATLAB Robust Control Toolbox. The innerand outer loops are controlled by PI and H " ro-bust controllers, respectively. With the specifiedparameters, these two controllers are shown asfollows:G d S ) =

1o 4 10114s4 +1 1 6 ~ 1 0 - ~ s ~6 8 4 ~ 1 0 - ~ s ~2 ~ 1 0 - ~ s + 2 2 45 ~ X I O - ' ~ S ~1 ~ ~ x I O - ~ S ~1 6 s + l 6 ~ 1 0 ~ ~

((outer loop) ( 5 )and

( 6 )100G c 2 ( s )= 20 +- inner loop).SSimulated and measured results of such a systemloaded with a resistor are shown in Fig. 8, wherethe voltage and current waveforms are sinusoidaland in phase. They appear highly consistent witheach other.Table 11. Specifications and component values of asingle-module inverter.

output voltage (v) inductor ESRswitching fre- capacitor (c,)

quency (P )output frequency I 60 I H= IcapacitorESR I 0.1 I output power I 1 I MY ]resistance l oad(4 12.1 I n

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100% of the full load

pure resistant loadRL C load7,.,,

(SOVIdiv, SAIdiv, Smsldiv)(a)

100% of the fdl load

module 1 1.35 mH 70 ~ f imodule2 1.3 mH 75 f iinodtile 1 1.35 mH 7 o f lmodule 2 1.3 mH 75 PF

I I

(SOVIdiv, SAIdiv, Smsldiv)(b)Fig. 8 The output voltage an d current waveforms of

the single-module inverter system at the fullload (pure resistantce) (a) simulation (b ) meas-urement.Fig. 9(a) and (b) show the measured outputcurrent and voltage responses to step load change

from 100% to 50% and from 50% to loo%, re-spectively. It can be observed from the waveformsthat a fast regulation can be achieved.Example 2: Parallel Two-Module InverterSystem

To investigate the current distribution betweenmodules, a two-module inverter system with thecircuit parameters collected in Table 111 is simu-lated and implemented. The controllers of thisexample are the same as those in example 1.The voltage and current simulated waveformsfor different kinds of loads are illustrated in Figs.10 and 11 . Fig. 10 shows the results from a sys-tem with pure resistance, Fig. 11 illustrated thosewith a RLC load, and Fig. 12 shows those with ahigh crest factor load. It can be observed fromthese plots that equal current distribution can

be achieved regardless of the types of loads andcomponent discrepancy between modules. Fig. 13shows the simulation results of the output voltageand current responses to a step load change from50% to 100%. In this figure, the output currentchanges dramatically while individual inductorcurrents still precisely follow each other and theoutput voltage is still in tight regulation. Fig. 14illustrates the measured results of the proposedsystem with a pure resistance. These results alsoshow the same output regulation and current dis-tribution as those of the simulated results.rable 1II.Circuitparameters of two module inverters.

load I inverter linductor ( L , ) I apacitor ( C , ) 1

(SOVIdiv, SAIdiv, 20msldiv)(a>

I I(SOVIdiv, SAIdiv, 2Omsldiv)

(b)Fig. 9 Transientresponses of the output current andoutput voltage to a step load change (a) from100% to 50% (b) from 50% to 100%.

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(SOVIdiv, SAIdiv, Sm sldiv)Fig. 10 The output voltage land current waveforms of

the two-module inverter system with a pure re-sistant load ( l , , : load current, i, : output currentof module 1, and i, : output current of module2) .

(5OV/div, 5A/div, Smsldiv)Fig. 11 The output voltage and current waveforms ofthe two-module inverter system with a RL Cload ( I , , : load current, i, : output current ofmodule 1, an d i2 : output current of module 2).

Fig. 12 The output voltage and current waveforms ofthe two-module inverter system with a highcrest factor load ( i , ,: load current, i, : outputcurrent of module 1, an d i2 : output current ofmodule 2).

For further verifying the feasibi l i ty of the pro-posed cont ro l scheme, a three-module invertersys tem wi th an RLC load is s imulated , whoseresul ts are plot ted in Fig . 15. Th e three outputcurrents are t racking each other precisely and th eoutput vol tage waveform sustains s inusoidal .

(SOVIdiv, SAIdiv, Smsldiv)Fig. 13 The output voltage and current waveforms ofthe two-module inverter system with a step loadchange from 50% to 1010% IUC load) in the parallelsystem of two modules (i,, : load current, i, : outputcurrent of module 1, an d i, : output current of module2).

(SOVIdiv, SA ldiv, Sm sldiv)(a >

(SOVIdiv, SA Idiv, Smsldiv)Fig. 14 Measured results of the two-module invertersystem with a pure resistant load: (a) outputvoltage and current (b ) output currents ofmodules 1 an d 2 .

(b )

L _ _ _ _ _ _ _ _ _ _ _ _ 2 _ _ _ _ _ _ J J _ _ _ _ _ L _ _ _ _ _ _I _ _ _ _ _I _ _ _ _ -(SOVIdiv, SA Idiv, Smsldiv)Fig. 15 The output voltage and current waveforms ofthe three-module inverter system with a n RLCload (i,, : load current, i, : output current ofmodule 1, i, : output current of module 2, an d

i, : output current of module 3 ) .

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REFERENCESP. Dobrorolny, J. Woods, and P. D. Ziogas,A Phase-loclted-loop SynchronizationScheme for Parallel Operation of ModularPower Supplies, Proceedings o theJ. F. Clien, C. L. Chu, and 0. L. Huang,The Parallel Operation of Two UPS by theCoupled-Inductor Method, Proceedings ofthe IECON92, pp. 733-736.M. E. Fraser and C. D. Manning,Performance of Average Current ModeControlled PW M UPS Factor Load, Pro-ceedings o the IEEE Power Electronics andVariable-Speed Drives., 1994, pp. 661-667.Y. Y . Tzou, DSP-Based Fully DigitalControl of a PWM DC-AC Converter forAC Voltage Regulation, Proceedings of theMichael J. Ryan and Robrt D. Lorenz, AHigh Performance Sine Wave Inverter Con-troller with Decoupling, Proceedings of theJ. F. Chen and C. L. Chu, CombinationVoltage-Controlled and Current-ControlledPW M Inverters for UPS Parallel Operation,IEEE Trans. on Power Electronics, Vol. 10,No. 5, September 1995, pp. 547-558.A. Tuladhar, H. Jin, T. Unger, and K.Mauch, Parallel Operation of Single PhaseInverter Proceedings of the APEC97, pp.

PESC89, pp. 861-869.

PESC95, pp. 138-144.

PESC9.5, pp. 507-513.

94-100.

V. CONCLUSIONA 3C strategy for inverters in parallel operationto achieve an equal current distribution has beenstudied. Each inverter in the proposed systemconsists of a PI controller to achieve a fast dy-

namic response, and a robust controller to reducethe interactive effects among inverters. It has beenverified that a system with 3C strategy can ac-commondate various types of loads.Simulation results and experiment measure-ments have shown that fast dynamic response,tight output regulation and equal current distribu-tion can be achieved in the proposed multi-module inverter system.

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8-a 3c strategy for multi-module

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