6/12/2015 1 ee5900 robust vlsi computer- aided design vlsi channel routing
Post on 19-Dec-2015
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TRANSCRIPT
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Objectives
• Definition of VLSI channel routing problem• How to perform channel routing for width optimization• Lower bound proof for channel routing• Understand that channel routing problem is difficult to
solve
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Metal layer 1
Via
Routing Anatomy
Topview
3Dview
Metal layer 2
Metal layer 3
Sym
bolic
Layou
t
©Bazargan
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Channel Routing Terminology
Upper boundaryUpper boundary
Lower boundaryLower boundary
TracksTracks
Terminals (Gate Pins)Terminals (Gate Pins)ViaVia
Width Width (# of Horizontal Routing Tracks)(# of Horizontal Routing Tracks)
Assume that there are only one horizontal layer and only one vertical layer, i.e., no overlap among horizontal wires and no
overlap among vertical wires will be allowed.
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Channel Routing Problem - I
• Input: – Two vectors of the same length to represent the pins on two
sides of the channel.– One horizontal layer and one vertical layer.
• Output:– Connect pins of the same net together such that there is no
overlap among horizontal wires and there is no overlap among vertical wires.
– Minimize the channel width.
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Channel Routing Problem - II
00 11 22 22 00 33 00 44
11 22 00 33 33 44 44 00
Example: (01220304) (12033440)where 0 = no terminalRoute all the pins with the same index
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A Channel Routing Example
0 1 4 5 1 6 7 0 4 9 10 10
2 3 5 3 5 2 6 8 9 8 7 9
How good is it?
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Lower Bound on Channel Width00 11 66 11 22 33 55
66 33 55 44 00 22 44
00 11 66 11 22 33 55
66 33 55 44 00 22 44
11 2233
55 4466
LocalLocaldensitydensity 11 33 44 44 44 44 22
Channel density =Channel density =Maximum local densityMaximum local density
Lower bound = 4Lower bound = 4
Lower bound on channel width = Channel density
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Exercise
• Use minimum number of tracks to route the following nets. Is your result the best possible one?
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Lower Bound Always Achievable?
• Is the channel routing lower bound always achievable for any channel routing problem?
11 22 11
22 11 22
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A More Complex Example
# columns =174, # nets=72, density =19
Routing result:number of tracks=20
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Realistic Design
From DAC Knowledge CenterDifferent colors refer to different wire densities. Red color means large
congestion.
# routes actually on a track
max # routes allowed on a track
Congestion=
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Summary
• Definition of VLSI channel routing problem• Channel routing for width optimization• Lower bound for channel routing
– Local Density and Channel Density
• Lower bound is not always achievable• We will discuss about the channel routing computer-
aided design algorithm in the next lecture